| Vitaly Bordug | 42dc75c | 2006-01-20 22:22:36 +0300 | [diff] [blame] | 1 | #ifndef __PQ2ADS_PD_H |
| 2 | #define __PQ2ADS_PD_H |
| 3 | /* |
| 4 | * arch/ppc/platforms/82xx/pq2ads_pd.h |
| 5 | * |
| 6 | * Some defines for MPC82xx board-specific PlatformDevice descriptions |
| 7 | * |
| 8 | * 2005 (c) MontaVista Software, Inc. |
| 9 | * Vitaly Bordug <vbordug@ru.mvista.com> |
| 10 | * |
| 11 | * This file is licensed under the terms of the GNU General Public License |
| 12 | * version 2. This program is licensed "as is" without any warranty of any |
| 13 | * kind, whether express or implied. |
| 14 | */ |
| 15 | |
| 16 | /* FCC1 Clock Source Configuration. These can be redefined in the board specific file. |
| 17 | Can only choose from CLK9-12 */ |
| 18 | |
| 19 | #define F1_RXCLK 11 |
| 20 | #define F1_TXCLK 10 |
| 21 | |
| 22 | /* FCC2 Clock Source Configuration. These can be redefined in the board specific file. |
| 23 | Can only choose from CLK13-16 */ |
| 24 | #define F2_RXCLK 15 |
| 25 | #define F2_TXCLK 16 |
| 26 | |
| 27 | /* FCC3 Clock Source Configuration. These can be redefined in the board specific file. |
| 28 | Can only choose from CLK13-16 */ |
| 29 | #define F3_RXCLK 13 |
| 30 | #define F3_TXCLK 14 |
| 31 | |
| Vitaly Bordug | 42dc75c | 2006-01-20 22:22:36 +0300 | [diff] [blame] | 32 | #endif |