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Durgadoss Rf017fbe2011-02-20 23:05:43 +05301/*
2 * intel_mid_thermal.c - Intel MID platform thermal driver
3 *
4 * Copyright (C) 2011 Intel Corporation
5 *
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 *
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 * Author: Durgadoss R <durgadoss.r@intel.com>
23 */
24
25#define pr_fmt(fmt) "intel_mid_thermal: " fmt
26
27#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/err.h>
30#include <linux/param.h>
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/slab.h>
34#include <linux/pm.h>
35#include <linux/thermal.h>
Mika Westerberg0f48d342012-03-05 15:01:03 -080036#include <linux/mfd/intel_msic.h>
Durgadoss Rf017fbe2011-02-20 23:05:43 +053037
38/* Number of thermal sensors */
Ameya Palande253a0062011-04-01 16:54:11 +030039#define MSIC_THERMAL_SENSORS 4
Durgadoss Rf017fbe2011-02-20 23:05:43 +053040
41/* ADC1 - thermal registers */
Ameya Palande253a0062011-04-01 16:54:11 +030042#define MSIC_ADC_ENBL 0x10
43#define MSIC_ADC_START 0x08
Durgadoss Rf017fbe2011-02-20 23:05:43 +053044
Ameya Palande253a0062011-04-01 16:54:11 +030045#define MSIC_ADCTHERM_ENBL 0x04
46#define MSIC_ADCRRDATA_ENBL 0x05
47#define MSIC_CHANL_MASK_VAL 0x0F
Durgadoss Rf017fbe2011-02-20 23:05:43 +053048
Ameya Palande253a0062011-04-01 16:54:11 +030049#define MSIC_STOPBIT_MASK 16
50#define MSIC_ADCTHERM_MASK 4
51/* Number of ADC channels */
52#define ADC_CHANLS_MAX 15
53#define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)
Durgadoss Rf017fbe2011-02-20 23:05:43 +053054
55/* ADC channel code values */
Ameya Palande253a0062011-04-01 16:54:11 +030056#define SKIN_SENSOR0_CODE 0x08
57#define SKIN_SENSOR1_CODE 0x09
58#define SYS_SENSOR_CODE 0x0A
59#define MSIC_DIE_SENSOR_CODE 0x03
Durgadoss Rf017fbe2011-02-20 23:05:43 +053060
Ameya Palande253a0062011-04-01 16:54:11 +030061#define SKIN_THERM_SENSOR0 0
62#define SKIN_THERM_SENSOR1 1
63#define SYS_THERM_SENSOR2 2
64#define MSIC_DIE_THERM_SENSOR3 3
Durgadoss Rf017fbe2011-02-20 23:05:43 +053065
66/* ADC code range */
Ameya Palande253a0062011-04-01 16:54:11 +030067#define ADC_MAX 977
68#define ADC_MIN 162
69#define ADC_VAL0C 887
70#define ADC_VAL20C 720
71#define ADC_VAL40C 508
72#define ADC_VAL60C 315
Durgadoss Rf017fbe2011-02-20 23:05:43 +053073
74/* ADC base addresses */
Mika Westerberg0f48d342012-03-05 15:01:03 -080075#define ADC_CHNL_START_ADDR INTEL_MSIC_ADC1ADDR0 /* increments by 1 */
76#define ADC_DATA_START_ADDR INTEL_MSIC_ADC1SNS0H /* increments by 2 */
Durgadoss Rf017fbe2011-02-20 23:05:43 +053077
78/* MSIC die attributes */
Ameya Palande253a0062011-04-01 16:54:11 +030079#define MSIC_DIE_ADC_MIN 488
80#define MSIC_DIE_ADC_MAX 1004
Durgadoss Rf017fbe2011-02-20 23:05:43 +053081
82/* This holds the address of the first free ADC channel,
83 * among the 15 channels
84 */
85static int channel_index;
86
87struct platform_info {
Ameya Palande253a0062011-04-01 16:54:11 +030088 struct platform_device *pdev;
89 struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
Durgadoss Rf017fbe2011-02-20 23:05:43 +053090};
91
92struct thermal_device_info {
Ameya Palande253a0062011-04-01 16:54:11 +030093 unsigned int chnl_addr;
94 int direct;
95 /* This holds the current temperature in millidegree celsius */
96 long curr_temp;
Durgadoss Rf017fbe2011-02-20 23:05:43 +053097};
98
99/**
100 * to_msic_die_temp - converts adc_val to msic_die temperature
101 * @adc_val: ADC value to be converted
102 *
103 * Can sleep
104 */
105static int to_msic_die_temp(uint16_t adc_val)
106{
Ameya Palande253a0062011-04-01 16:54:11 +0300107 return (368 * (adc_val) / 1000) - 220;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530108}
109
110/**
111 * is_valid_adc - checks whether the adc code is within the defined range
112 * @min: minimum value for the sensor
113 * @max: maximum value for the sensor
114 *
115 * Can sleep
116 */
117static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
118{
Ameya Palande253a0062011-04-01 16:54:11 +0300119 return (adc_val >= min) && (adc_val <= max);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530120}
121
122/**
123 * adc_to_temp - converts the ADC code to temperature in C
124 * @direct: true if ths channel is direct index
125 * @adc_val: the adc_val that needs to be converted
126 * @tp: temperature return value
127 *
128 * Linear approximation is used to covert the skin adc value into temperature.
129 * This technique is used to avoid very long look-up table to get
130 * the appropriate temp value from ADC value.
131 * The adc code vs sensor temp curve is split into five parts
132 * to achieve very close approximate temp value with less than
133 * 0.5C error
134 */
135static int adc_to_temp(int direct, uint16_t adc_val, unsigned long *tp)
136{
Ameya Palande253a0062011-04-01 16:54:11 +0300137 int temp;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530138
Ameya Palande253a0062011-04-01 16:54:11 +0300139 /* Direct conversion for die temperature */
140 if (direct) {
141 if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
142 *tp = to_msic_die_temp(adc_val) * 1000;
143 return 0;
144 }
145 return -ERANGE;
146 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530147
Ameya Palande253a0062011-04-01 16:54:11 +0300148 if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
149 return -ERANGE;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530150
Ameya Palande253a0062011-04-01 16:54:11 +0300151 /* Linear approximation for skin temperature */
152 if (adc_val > ADC_VAL0C)
153 temp = 177 - (adc_val/5);
154 else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
155 temp = 111 - (adc_val/8);
156 else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
157 temp = 92 - (adc_val/10);
158 else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
159 temp = 91 - (adc_val/10);
160 else
161 temp = 112 - (adc_val/6);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530162
Ameya Palande253a0062011-04-01 16:54:11 +0300163 /* Convert temperature in celsius to milli degree celsius */
164 *tp = temp * 1000;
165 return 0;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530166}
167
168/**
169 * mid_read_temp - read sensors for temperature
170 * @temp: holds the current temperature for the sensor after reading
171 *
172 * reads the adc_code from the channel and converts it to real
173 * temperature. The converted value is stored in temp.
174 *
175 * Can sleep
176 */
177static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp)
178{
Ameya Palande253a0062011-04-01 16:54:11 +0300179 struct thermal_device_info *td_info = tzd->devdata;
180 uint16_t adc_val, addr;
181 uint8_t data = 0;
182 int ret;
183 unsigned long curr_temp;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530184
185
Ameya Palande253a0062011-04-01 16:54:11 +0300186 addr = td_info->chnl_addr;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530187
Ameya Palande253a0062011-04-01 16:54:11 +0300188 /* Enable the msic for conversion before reading */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800189 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
Ameya Palande253a0062011-04-01 16:54:11 +0300190 if (ret)
191 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530192
Ameya Palande253a0062011-04-01 16:54:11 +0300193 /* Re-toggle the RRDATARD bit (temporary workaround) */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800194 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
Ameya Palande253a0062011-04-01 16:54:11 +0300195 if (ret)
196 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530197
Ameya Palande253a0062011-04-01 16:54:11 +0300198 /* Read the higher bits of data */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800199 ret = intel_msic_reg_read(addr, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300200 if (ret)
201 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530202
Ameya Palande253a0062011-04-01 16:54:11 +0300203 /* Shift bits to accommodate the lower two data bits */
204 adc_val = (data << 2);
205 addr++;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530206
Mika Westerberg0f48d342012-03-05 15:01:03 -0800207 ret = intel_msic_reg_read(addr, &data);/* Read lower bits */
Ameya Palande253a0062011-04-01 16:54:11 +0300208 if (ret)
209 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530210
Ameya Palande253a0062011-04-01 16:54:11 +0300211 /* Adding lower two bits to the higher bits */
212 data &= 03;
213 adc_val += data;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530214
Ameya Palande253a0062011-04-01 16:54:11 +0300215 /* Convert ADC value to temperature */
216 ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
217 if (ret == 0)
218 *temp = td_info->curr_temp = curr_temp;
219 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530220}
221
222/**
223 * configure_adc - enables/disables the ADC for conversion
224 * @val: zero: disables the ADC non-zero:enables the ADC
225 *
226 * Enable/Disable the ADC depending on the argument
227 *
228 * Can sleep
229 */
230static int configure_adc(int val)
231{
Ameya Palande253a0062011-04-01 16:54:11 +0300232 int ret;
233 uint8_t data;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530234
Mika Westerberg0f48d342012-03-05 15:01:03 -0800235 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300236 if (ret)
237 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530238
Ameya Palande253a0062011-04-01 16:54:11 +0300239 if (val) {
240 /* Enable and start the ADC */
241 data |= (MSIC_ADC_ENBL | MSIC_ADC_START);
242 } else {
243 /* Just stop the ADC */
244 data &= (~MSIC_ADC_START);
245 }
Mika Westerberg0f48d342012-03-05 15:01:03 -0800246 return intel_msic_reg_write(INTEL_MSIC_ADC1CNTL1, data);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530247}
248
249/**
250 * set_up_therm_channel - enable thermal channel for conversion
251 * @base_addr: index of free msic ADC channel
252 *
253 * Enable all the three channels for conversion
254 *
255 * Can sleep
256 */
257static int set_up_therm_channel(u16 base_addr)
258{
Ameya Palande253a0062011-04-01 16:54:11 +0300259 int ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530260
Ameya Palande253a0062011-04-01 16:54:11 +0300261 /* Enable all the sensor channels */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800262 ret = intel_msic_reg_write(base_addr, SKIN_SENSOR0_CODE);
Ameya Palande253a0062011-04-01 16:54:11 +0300263 if (ret)
264 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530265
Mika Westerberg0f48d342012-03-05 15:01:03 -0800266 ret = intel_msic_reg_write(base_addr + 1, SKIN_SENSOR1_CODE);
Ameya Palande253a0062011-04-01 16:54:11 +0300267 if (ret)
268 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530269
Mika Westerberg0f48d342012-03-05 15:01:03 -0800270 ret = intel_msic_reg_write(base_addr + 2, SYS_SENSOR_CODE);
Ameya Palande253a0062011-04-01 16:54:11 +0300271 if (ret)
272 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530273
Ameya Palande253a0062011-04-01 16:54:11 +0300274 /* Since this is the last channel, set the stop bit
275 * to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800276 ret = intel_msic_reg_write(base_addr + 3,
Ameya Palande253a0062011-04-01 16:54:11 +0300277 (MSIC_DIE_SENSOR_CODE | 0x10));
278 if (ret)
279 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530280
Ameya Palande253a0062011-04-01 16:54:11 +0300281 /* Enable ADC and start it */
282 return configure_adc(1);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530283}
284
285/**
286 * reset_stopbit - sets the stop bit to 0 on the given channel
287 * @addr: address of the channel
288 *
289 * Can sleep
290 */
291static int reset_stopbit(uint16_t addr)
292{
Ameya Palande253a0062011-04-01 16:54:11 +0300293 int ret;
294 uint8_t data;
Mika Westerberg0f48d342012-03-05 15:01:03 -0800295 ret = intel_msic_reg_read(addr, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300296 if (ret)
297 return ret;
298 /* Set the stop bit to zero */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800299 return intel_msic_reg_write(addr, (data & 0xEF));
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530300}
301
302/**
303 * find_free_channel - finds an empty channel for conversion
304 *
305 * If the ADC is not enabled then start using 0th channel
306 * itself. Otherwise find an empty channel by looking for a
307 * channel in which the stopbit is set to 1. returns the index
308 * of the first free channel if succeeds or an error code.
309 *
310 * Context: can sleep
311 *
312 * FIXME: Ultimately the channel allocator will move into the intel_scu_ipc
313 * code.
314 */
315static int find_free_channel(void)
316{
Ameya Palande253a0062011-04-01 16:54:11 +0300317 int ret;
318 int i;
319 uint8_t data;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530320
Ameya Palande253a0062011-04-01 16:54:11 +0300321 /* check whether ADC is enabled */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800322 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300323 if (ret)
324 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530325
Ameya Palande253a0062011-04-01 16:54:11 +0300326 if ((data & MSIC_ADC_ENBL) == 0)
327 return 0;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530328
Ameya Palande253a0062011-04-01 16:54:11 +0300329 /* ADC is already enabled; Looking for an empty channel */
330 for (i = 0; i < ADC_CHANLS_MAX; i++) {
Mika Westerberg0f48d342012-03-05 15:01:03 -0800331 ret = intel_msic_reg_read(ADC_CHNL_START_ADDR + i, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300332 if (ret)
333 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530334
Ameya Palande253a0062011-04-01 16:54:11 +0300335 if (data & MSIC_STOPBIT_MASK) {
336 ret = i;
337 break;
338 }
339 }
340 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530341}
342
343/**
344 * mid_initialize_adc - initializing the ADC
345 * @dev: our device structure
346 *
347 * Initialize the ADC for reading thermistor values. Can sleep.
348 */
349static int mid_initialize_adc(struct device *dev)
350{
Ameya Palande253a0062011-04-01 16:54:11 +0300351 u8 data;
352 u16 base_addr;
353 int ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530354
Ameya Palande253a0062011-04-01 16:54:11 +0300355 /*
356 * Ensure that adctherm is disabled before we
357 * initialize the ADC
358 */
Mika Westerberg0f48d342012-03-05 15:01:03 -0800359 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL3, &data);
Ameya Palande253a0062011-04-01 16:54:11 +0300360 if (ret)
361 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530362
Mika Westerberg1b7ccab2012-03-05 15:01:04 -0800363 data &= ~MSIC_ADCTHERM_MASK;
364 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, data);
365 if (ret)
366 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530367
Ameya Palande253a0062011-04-01 16:54:11 +0300368 /* Index of the first channel in which the stop bit is set */
369 channel_index = find_free_channel();
370 if (channel_index < 0) {
371 dev_err(dev, "No free ADC channels");
372 return channel_index;
373 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530374
Ameya Palande253a0062011-04-01 16:54:11 +0300375 base_addr = ADC_CHNL_START_ADDR + channel_index;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530376
Ameya Palande253a0062011-04-01 16:54:11 +0300377 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
378 /* Reset stop bit for channels other than 0 and 12 */
379 ret = reset_stopbit(base_addr);
380 if (ret)
381 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530382
Ameya Palande253a0062011-04-01 16:54:11 +0300383 /* Index of the first free channel */
384 base_addr++;
385 channel_index++;
386 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530387
Ameya Palande253a0062011-04-01 16:54:11 +0300388 ret = set_up_therm_channel(base_addr);
389 if (ret) {
390 dev_err(dev, "unable to enable ADC");
391 return ret;
392 }
393 dev_dbg(dev, "ADC initialization successful");
394 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530395}
396
397/**
398 * initialize_sensor - sets default temp and timer ranges
399 * @index: index of the sensor
400 *
401 * Context: can sleep
402 */
403static struct thermal_device_info *initialize_sensor(int index)
404{
Ameya Palande253a0062011-04-01 16:54:11 +0300405 struct thermal_device_info *td_info =
406 kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530407
Ameya Palande253a0062011-04-01 16:54:11 +0300408 if (!td_info)
409 return NULL;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530410
Ameya Palande253a0062011-04-01 16:54:11 +0300411 /* Set the base addr of the channel for this sensor */
412 td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
413 /* Sensor 3 is direct conversion */
414 if (index == 3)
415 td_info->direct = 1;
416 return td_info;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530417}
418
419/**
420 * mid_thermal_resume - resume routine
421 * @pdev: platform device structure
422 *
423 * mid thermal resume: re-initializes the adc. Can sleep.
424 */
425static int mid_thermal_resume(struct platform_device *pdev)
426{
Ameya Palande253a0062011-04-01 16:54:11 +0300427 return mid_initialize_adc(&pdev->dev);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530428}
429
430/**
431 * mid_thermal_suspend - suspend routine
432 * @pdev: platform device structure
433 *
434 * mid thermal suspend implements the suspend functionality
435 * by stopping the ADC. Can sleep.
436 */
437static int mid_thermal_suspend(struct platform_device *pdev, pm_message_t mesg)
438{
Ameya Palande253a0062011-04-01 16:54:11 +0300439 /*
440 * This just stops the ADC and does not disable it.
441 * temporary workaround until we have a generic ADC driver.
442 * If 0 is passed, it disables the ADC.
443 */
444 return configure_adc(0);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530445}
446
447/**
448 * read_curr_temp - reads the current temperature and stores in temp
449 * @temp: holds the current temperature value after reading
450 *
451 * Can sleep
452 */
453static int read_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp)
454{
Ameya Palande253a0062011-04-01 16:54:11 +0300455 WARN_ON(tzd == NULL);
456 return mid_read_temp(tzd, temp);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530457}
458
459/* Can't be const */
460static struct thermal_zone_device_ops tzd_ops = {
Ameya Palande253a0062011-04-01 16:54:11 +0300461 .get_temp = read_curr_temp,
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530462};
463
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530464/**
465 * mid_thermal_probe - mfld thermal initialize
466 * @pdev: platform device structure
467 *
468 * mid thermal probe initializes the hardware and registers
469 * all the sensors with the generic thermal framework. Can sleep.
470 */
471static int mid_thermal_probe(struct platform_device *pdev)
472{
Ameya Palande253a0062011-04-01 16:54:11 +0300473 static char *name[MSIC_THERMAL_SENSORS] = {
474 "skin0", "skin1", "sys", "msicdie"
475 };
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530476
Ameya Palande253a0062011-04-01 16:54:11 +0300477 int ret;
478 int i;
479 struct platform_info *pinfo;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530480
Ameya Palande253a0062011-04-01 16:54:11 +0300481 pinfo = kzalloc(sizeof(struct platform_info), GFP_KERNEL);
482 if (!pinfo)
483 return -ENOMEM;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530484
Ameya Palande253a0062011-04-01 16:54:11 +0300485 /* Initializing the hardware */
486 ret = mid_initialize_adc(&pdev->dev);
487 if (ret) {
488 dev_err(&pdev->dev, "ADC init failed");
489 kfree(pinfo);
490 return ret;
491 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530492
Ameya Palande253a0062011-04-01 16:54:11 +0300493 /* Register each sensor with the generic thermal framework*/
494 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
Axel Lin03f89522011-07-06 23:40:51 +0800495 struct thermal_device_info *td_info = initialize_sensor(i);
496
497 if (!td_info) {
498 ret = -ENOMEM;
499 goto err;
500 }
Ameya Palande253a0062011-04-01 16:54:11 +0300501 pinfo->tzd[i] = thermal_zone_device_register(name[i],
Axel Lin03f89522011-07-06 23:40:51 +0800502 0, td_info, &tzd_ops, 0, 0, 0, 0);
503 if (IS_ERR(pinfo->tzd[i])) {
504 kfree(td_info);
505 ret = PTR_ERR(pinfo->tzd[i]);
506 goto err;
507 }
Ameya Palande253a0062011-04-01 16:54:11 +0300508 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530509
Ameya Palande253a0062011-04-01 16:54:11 +0300510 pinfo->pdev = pdev;
511 platform_set_drvdata(pdev, pinfo);
512 return 0;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530513
Axel Lin03f89522011-07-06 23:40:51 +0800514err:
515 while (--i >= 0) {
516 kfree(pinfo->tzd[i]->devdata);
Ameya Palande253a0062011-04-01 16:54:11 +0300517 thermal_zone_device_unregister(pinfo->tzd[i]);
Axel Lin03f89522011-07-06 23:40:51 +0800518 }
Ameya Palande253a0062011-04-01 16:54:11 +0300519 configure_adc(0);
520 kfree(pinfo);
521 return ret;
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530522}
523
524/**
525 * mid_thermal_remove - mfld thermal finalize
526 * @dev: platform device structure
527 *
528 * MLFD thermal remove unregisters all the sensors from the generic
529 * thermal framework. Can sleep.
530 */
531static int mid_thermal_remove(struct platform_device *pdev)
532{
Ameya Palande253a0062011-04-01 16:54:11 +0300533 int i;
534 struct platform_info *pinfo = platform_get_drvdata(pdev);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530535
Axel Lin03f89522011-07-06 23:40:51 +0800536 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
537 kfree(pinfo->tzd[i]->devdata);
Ameya Palande253a0062011-04-01 16:54:11 +0300538 thermal_zone_device_unregister(pinfo->tzd[i]);
Axel Lin03f89522011-07-06 23:40:51 +0800539 }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530540
Ameya Palande239dca92011-04-07 16:30:02 +0300541 kfree(pinfo);
Ameya Palande253a0062011-04-01 16:54:11 +0300542 platform_set_drvdata(pdev, NULL);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530543
Ameya Palande253a0062011-04-01 16:54:11 +0300544 /* Stop the ADC */
545 return configure_adc(0);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530546}
547
Mika Westerberg63483072012-03-05 15:01:03 -0800548#define DRIVER_NAME "msic_thermal"
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530549
550static const struct platform_device_id therm_id_table[] = {
Ameya Palande253a0062011-04-01 16:54:11 +0300551 { DRIVER_NAME, 1 },
Mika Westerberg3fca3d32011-12-15 22:27:59 +0000552 { "msic_thermal", 1 },
Ameya Palande253a0062011-04-01 16:54:11 +0300553 { }
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530554};
555
556static struct platform_driver mid_thermal_driver = {
Ameya Palande253a0062011-04-01 16:54:11 +0300557 .driver = {
558 .name = DRIVER_NAME,
559 .owner = THIS_MODULE,
560 },
561 .probe = mid_thermal_probe,
562 .suspend = mid_thermal_suspend,
563 .resume = mid_thermal_resume,
564 .remove = __devexit_p(mid_thermal_remove),
565 .id_table = therm_id_table,
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530566};
567
Axel Lin73d99a22011-11-26 12:14:37 +0800568module_platform_driver(mid_thermal_driver);
Durgadoss Rf017fbe2011-02-20 23:05:43 +0530569
570MODULE_AUTHOR("Durgadoss R <durgadoss.r@intel.com>");
571MODULE_DESCRIPTION("Intel Medfield Platform Thermal Driver");
572MODULE_LICENSE("GPL");