| Asish Bhattacharya | b86c347 | 2012-02-15 08:31:52 +0530 | [diff] [blame^] | 1 | /* Copyright (c) 2012, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef SITAR_CODEC_DIGITAL_H |
| 14 | #define SITAR_CODEC_DIGITAL_H |
| 15 | |
| 16 | #define SITAR_A_PIN_CTL_OE0 (0x10) |
| 17 | #define SITAR_A_PIN_CTL_OE0__POR (0x00000000) |
| 18 | #define SITAR_A_PIN_CTL_OE1 (0x11) |
| 19 | #define SITAR_A_PIN_CTL_OE1__POR (0x00000000) |
| 20 | #define SITAR_A_PIN_CTL_DATA0 (0x12) |
| 21 | #define SITAR_A_PIN_CTL_DATA0__POR (0x00000000) |
| 22 | #define SITAR_A_PIN_CTL_DATA1 (0x13) |
| 23 | #define SITAR_A_PIN_CTL_DATA1__POR (0x00000000) |
| 24 | #define SITAR_A_HDRIVE_GENERIC (0x18) |
| 25 | #define SITAR_A_HDRIVE_GENERIC__POR (0x00000000) |
| 26 | #define SITAR_A_HDRIVE_OVERRIDE (0x19) |
| 27 | #define SITAR_A_HDRIVE_OVERRIDE__POR (0x00000008) |
| 28 | #define SITAR_A_ANA_CSR_WAIT_STATE (0x20) |
| 29 | #define SITAR_A_ANA_CSR_WAIT_STATE__POR (0x00000044) |
| 30 | #define SITAR_A_PROCESS_MONITOR_CTL0 (0x40) |
| 31 | #define SITAR_A_PROCESS_MONITOR_CTL0__POR (0x00000080) |
| 32 | #define SITAR_A_PROCESS_MONITOR_CTL1 (0x41) |
| 33 | #define SITAR_A_PROCESS_MONITOR_CTL1__POR (0x00000000) |
| 34 | #define SITAR_A_PROCESS_MONITOR_CTL2 (0x42) |
| 35 | #define SITAR_A_PROCESS_MONITOR_CTL2__POR (0x00000000) |
| 36 | #define SITAR_A_PROCESS_MONITOR_CTL3 (0x43) |
| 37 | #define SITAR_A_PROCESS_MONITOR_CTL3__POR (0x00000001) |
| 38 | #define SITAR_A_QFUSE_CTL (0x48) |
| 39 | #define SITAR_A_QFUSE_CTL__POR (0x00000000) |
| 40 | #define SITAR_A_QFUSE_STATUS (0x49) |
| 41 | #define SITAR_A_QFUSE_STATUS__POR (0x00000000) |
| 42 | #define SITAR_A_QFUSE_DATA_OUT0 (0x4A) |
| 43 | #define SITAR_A_QFUSE_DATA_OUT0__POR (0x00000000) |
| 44 | #define SITAR_A_QFUSE_DATA_OUT1 (0x4B) |
| 45 | #define SITAR_A_QFUSE_DATA_OUT1__POR (0x00000000) |
| 46 | #define SITAR_A_QFUSE_DATA_OUT2 (0x4C) |
| 47 | #define SITAR_A_QFUSE_DATA_OUT2__POR (0x00000000) |
| 48 | #define SITAR_A_QFUSE_DATA_OUT3 (0x4D) |
| 49 | #define SITAR_A_QFUSE_DATA_OUT3__POR (0x00000000) |
| 50 | #define SITAR_A_QFUSE_DATA_OUT4 (0x4E) |
| 51 | #define SITAR_A_QFUSE_DATA_OUT4__POR (0x00000000) |
| 52 | #define SITAR_A_QFUSE_DATA_OUT5 (0x4F) |
| 53 | #define SITAR_A_QFUSE_DATA_OUT5__POR (0x00000000) |
| 54 | #define SITAR_A_QFUSE_DATA_OUT6 (0x50) |
| 55 | #define SITAR_A_QFUSE_DATA_OUT6__POR (0x00000000) |
| 56 | #define SITAR_A_QFUSE_DATA_OUT7 (0x51) |
| 57 | #define SITAR_A_QFUSE_DATA_OUT7__POR (0x00000000) |
| 58 | #define SITAR_A_CDC_CTL (0x80) |
| 59 | #define SITAR_A_CDC_CTL__POR (0x00000000) |
| 60 | #define SITAR_A_LEAKAGE_CTL (0x88) |
| 61 | #define SITAR_A_LEAKAGE_CTL__POR (0x00000004) |
| 62 | #define SITAR_A_INTR_MODE (0x90) |
| 63 | #define SITAR_A_INTR_MODE__POR (0x00000000) |
| 64 | #define SITAR_A_INTR_MASK0 (0x94) |
| 65 | #define SITAR_A_INTR_MASK0__POR (0x000000ff) |
| 66 | #define SITAR_A_INTR_MASK1 (0x95) |
| 67 | #define SITAR_A_INTR_MASK1__POR (0x000000ff) |
| 68 | #define SITAR_A_INTR_MASK2 (0x96) |
| 69 | #define SITAR_A_INTR_MASK2__POR (0x000000ff) |
| 70 | #define SITAR_A_INTR_STATUS0 (0x98) |
| 71 | #define SITAR_A_INTR_STATUS0__POR (0x00000000) |
| 72 | #define SITAR_A_INTR_STATUS1 (0x99) |
| 73 | #define SITAR_A_INTR_STATUS1__POR (0x00000000) |
| 74 | #define SITAR_A_INTR_STATUS2 (0x9A) |
| 75 | #define SITAR_A_INTR_STATUS2__POR (0x00000000) |
| 76 | #define SITAR_A_INTR_CLEAR0 (0x9C) |
| 77 | #define SITAR_A_INTR_CLEAR0__POR (0x00000000) |
| 78 | #define SITAR_A_INTR_CLEAR1 (0x9D) |
| 79 | #define SITAR_A_INTR_CLEAR1__POR (0x00000000) |
| 80 | #define SITAR_A_INTR_CLEAR2 (0x9E) |
| 81 | #define SITAR_A_INTR_CLEAR2__POR (0x00000000) |
| 82 | #define SITAR_A_INTR_LEVEL0 (0xA0) |
| 83 | #define SITAR_A_INTR_LEVEL0__POR (0x00000001) |
| 84 | #define SITAR_A_INTR_LEVEL1 (0xA1) |
| 85 | #define SITAR_A_INTR_LEVEL1__POR (0x00000000) |
| 86 | #define SITAR_A_INTR_LEVEL2 (0xA2) |
| 87 | #define SITAR_A_INTR_LEVEL2__POR (0x00000000) |
| 88 | #define SITAR_A_INTR_TEST0 (0xA4) |
| 89 | #define SITAR_A_INTR_TEST0__POR (0x00000000) |
| 90 | #define SITAR_A_INTR_TEST1 (0xA5) |
| 91 | #define SITAR_A_INTR_TEST1__POR (0x00000000) |
| 92 | #define SITAR_A_INTR_TEST2 (0xA6) |
| 93 | #define SITAR_A_INTR_TEST2__POR (0x00000000) |
| 94 | #define SITAR_A_INTR_SET0 (0xA8) |
| 95 | #define SITAR_A_INTR_SET0__POR (0x00000000) |
| 96 | #define SITAR_A_INTR_SET1 (0xA9) |
| 97 | #define SITAR_A_INTR_SET1__POR (0x00000000) |
| 98 | #define SITAR_A_INTR_SET2 (0xAA) |
| 99 | #define SITAR_A_INTR_SET2__POR (0x00000000) |
| 100 | #define SITAR_A_CDC_TX_I2S_SCK_MODE (0xC0) |
| 101 | #define SITAR_A_CDC_TX_I2S_SCK_MODE__POR (0x00000000) |
| 102 | #define SITAR_A_CDC_TX_I2S_WS_MODE (0xC1) |
| 103 | #define SITAR_A_CDC_TX_I2S_WS_MODE__POR (0x00000000) |
| 104 | #define SITAR_A_CDC_DMIC_DATA0_MODE (0xC4) |
| 105 | #define SITAR_A_CDC_DMIC_DATA0_MODE__POR (0x00000000) |
| 106 | #define SITAR_A_CDC_DMIC_CLK0_MODE (0xC5) |
| 107 | #define SITAR_A_CDC_DMIC_CLK0_MODE__POR (0x00000000) |
| 108 | #define SITAR_A_CDC_DMIC_DATA1_MODE (0xC6) |
| 109 | #define SITAR_A_CDC_DMIC_DATA1_MODE__POR (0x00000000) |
| 110 | #define SITAR_A_CDC_DMIC_CLK1_MODE (0xC7) |
| 111 | #define SITAR_A_CDC_DMIC_CLK1_MODE__POR (0x00000000) |
| 112 | #define SITAR_A_CDC_TX_I2S_SD0_MODE (0xC8) |
| 113 | #define SITAR_A_CDC_TX_I2S_SD0_MODE__POR (0x00000000) |
| 114 | #define SITAR_A_CDC_INTR_MODE (0xC9) |
| 115 | #define SITAR_A_CDC_INTR_MODE__POR (0x00000000) |
| 116 | #define SITAR_A_CDC_RX_I2S_SD0_MODE (0xCA) |
| 117 | #define SITAR_A_CDC_RX_I2S_SD0_MODE__POR (0x00000000) |
| 118 | #define SITAR_A_CDC_RX_I2S_SD1_MODE (0xCB) |
| 119 | #define SITAR_A_CDC_RX_I2S_SD1_MODE__POR (0x00000000) |
| 120 | #define SITAR_A_BIAS_REF_CTL (0x100) |
| 121 | #define SITAR_A_BIAS_REF_CTL__POR (0x0000001c) |
| 122 | #define SITAR_A_BIAS_CENTRAL_BG_CTL (0x101) |
| 123 | #define SITAR_A_BIAS_CENTRAL_BG_CTL__POR (0x00000050) |
| 124 | #define SITAR_A_BIAS_PRECHRG_CTL (0x102) |
| 125 | #define SITAR_A_BIAS_PRECHRG_CTL__POR (0x00000007) |
| 126 | #define SITAR_A_BIAS_CURR_CTL_1 (0x103) |
| 127 | #define SITAR_A_BIAS_CURR_CTL_1__POR (0x00000052) |
| 128 | #define SITAR_A_BIAS_CURR_CTL_2 (0x104) |
| 129 | #define SITAR_A_BIAS_CURR_CTL_2__POR (0x00000000) |
| 130 | #define SITAR_A_BIAS_OSC_BG_CTL (0x105) |
| 131 | #define SITAR_A_BIAS_OSC_BG_CTL__POR (0x00000016) |
| 132 | #define SITAR_A_CLK_BUFF_EN1 (0x108) |
| 133 | #define SITAR_A_CLK_BUFF_EN1__POR (0x00000004) |
| 134 | #define SITAR_A_CLK_BUFF_EN2 (0x109) |
| 135 | #define SITAR_A_CLK_BUFF_EN2__POR (0x00000002) |
| 136 | #define SITAR_A_LDO_H_MODE_1 (0x110) |
| 137 | #define SITAR_A_LDO_H_MODE_1__POR (0x00000065) |
| 138 | #define SITAR_A_LDO_H_MODE_2 (0x111) |
| 139 | #define SITAR_A_LDO_H_MODE_2__POR (0x000000a8) |
| 140 | #define SITAR_A_LDO_H_LOOP_CTL (0x112) |
| 141 | #define SITAR_A_LDO_H_LOOP_CTL__POR (0x0000006b) |
| 142 | #define SITAR_A_LDO_H_COMP_1 (0x113) |
| 143 | #define SITAR_A_LDO_H_COMP_1__POR (0x00000084) |
| 144 | #define SITAR_A_LDO_H_COMP_2 (0x114) |
| 145 | #define SITAR_A_LDO_H_COMP_2__POR (0x000000e0) |
| 146 | #define SITAR_A_LDO_H_BIAS_1 (0x115) |
| 147 | #define SITAR_A_LDO_H_BIAS_1__POR (0x0000006d) |
| 148 | #define SITAR_A_LDO_H_BIAS_2 (0x116) |
| 149 | #define SITAR_A_LDO_H_BIAS_2__POR (0x000000a5) |
| 150 | #define SITAR_A_LDO_H_BIAS_3 (0x117) |
| 151 | #define SITAR_A_LDO_H_BIAS_3__POR (0x00000060) |
| 152 | #define SITAR_A_MICB_CFILT_1_CTL (0x128) |
| 153 | #define SITAR_A_MICB_CFILT_1_CTL__POR (0x00000040) |
| 154 | #define SITAR_A_MICB_CFILT_1_VAL (0x129) |
| 155 | #define SITAR_A_MICB_CFILT_1_VAL__POR (0x00000080) |
| 156 | #define SITAR_A_MICB_CFILT_1_PRECHRG (0x12A) |
| 157 | #define SITAR_A_MICB_CFILT_1_PRECHRG__POR (0x00000038) |
| 158 | #define SITAR_A_MICB_1_CTL (0x12B) |
| 159 | #define SITAR_A_MICB_1_CTL__POR (0x00000016) |
| 160 | #define SITAR_A_MICB_1_INT_RBIAS (0x12C) |
| 161 | #define SITAR_A_MICB_1_INT_RBIAS__POR (0x00000024) |
| 162 | #define SITAR_A_MICB_1_MBHC (0x12D) |
| 163 | #define SITAR_A_MICB_1_MBHC__POR (0x00000001) |
| 164 | #define SITAR_A_MICB_CFILT_2_CTL (0x12E) |
| 165 | #define SITAR_A_MICB_CFILT_2_CTL__POR (0x00000040) |
| 166 | #define SITAR_A_MICB_CFILT_2_VAL (0x12F) |
| 167 | #define SITAR_A_MICB_CFILT_2_VAL__POR (0x00000080) |
| 168 | #define SITAR_A_MICB_CFILT_2_PRECHRG (0x130) |
| 169 | #define SITAR_A_MICB_CFILT_2_PRECHRG__POR (0x00000038) |
| 170 | #define SITAR_A_MICB_2_CTL (0x131) |
| 171 | #define SITAR_A_MICB_2_CTL__POR (0x00000016) |
| 172 | #define SITAR_A_MICB_2_INT_RBIAS (0x132) |
| 173 | #define SITAR_A_MICB_2_INT_RBIAS__POR (0x00000024) |
| 174 | #define SITAR_A_MICB_2_MBHC (0x133) |
| 175 | #define SITAR_A_MICB_2_MBHC__POR (0x00000002) |
| 176 | #define SITAR_A_TX_COM_BIAS (0x14C) |
| 177 | #define SITAR_A_TX_COM_BIAS__POR (0x000000e0) |
| 178 | #define SITAR_A_MBHC_SCALING_MUX_1 (0x14E) |
| 179 | #define SITAR_A_MBHC_SCALING_MUX_1__POR (0x00000000) |
| 180 | #define SITAR_A_MBHC_SCALING_MUX_2 (0x14F) |
| 181 | #define SITAR_A_MBHC_SCALING_MUX_2__POR (0x00000080) |
| 182 | #define SITAR_A_TX_SUP_SWITCH_CTRL_1 (0x151) |
| 183 | #define SITAR_A_TX_SUP_SWITCH_CTRL_1__POR (0x00000000) |
| 184 | #define SITAR_A_TX_SUP_SWITCH_CTRL_2 (0x152) |
| 185 | #define SITAR_A_TX_SUP_SWITCH_CTRL_2__POR (0x00000080) |
| 186 | #define SITAR_A_TX_1_2_EN (0x153) |
| 187 | #define SITAR_A_TX_1_2_EN__POR (0x00000000) |
| 188 | #define SITAR_A_TX_1_2_TEST_EN (0x154) |
| 189 | #define SITAR_A_TX_1_2_TEST_EN__POR (0x000000cc) |
| 190 | #define SITAR_A_TX_1_2_ADC_CH1 (0x155) |
| 191 | #define SITAR_A_TX_1_2_ADC_CH1__POR (0x00000044) |
| 192 | #define SITAR_A_TX_1_2_ADC_CH2 (0x156) |
| 193 | #define SITAR_A_TX_1_2_ADC_CH2__POR (0x00000044) |
| 194 | #define SITAR_A_TX_1_2_ATEST_REFCTRL (0x157) |
| 195 | #define SITAR_A_TX_1_2_ATEST_REFCTRL__POR (0x00000000) |
| 196 | #define SITAR_A_TX_1_2_TEST_CTL (0x158) |
| 197 | #define SITAR_A_TX_1_2_TEST_CTL__POR (0x00000038) |
| 198 | #define SITAR_A_TX_1_2_TEST_BLOCK_EN (0x159) |
| 199 | #define SITAR_A_TX_1_2_TEST_BLOCK_EN__POR (0x000000fc) |
| 200 | #define SITAR_A_TX_1_2_TXFE_CLKDIV (0x15A) |
| 201 | #define SITAR_A_TX_1_2_TXFE_CLKDIV__POR (0x000000ee) |
| 202 | #define SITAR_A_TX_1_2_SAR_ERR_CH1 (0x15B) |
| 203 | #define SITAR_A_TX_1_2_SAR_ERR_CH1__POR (0x00000000) |
| 204 | #define SITAR_A_TX_1_2_SAR_ERR_CH2 (0x15C) |
| 205 | #define SITAR_A_TX_1_2_SAR_ERR_CH2__POR (0x00000000) |
| 206 | #define SITAR_A_TX_3_EN (0x15D) |
| 207 | #define SITAR_A_TX_3_EN__POR (0x00000000) |
| 208 | #define SITAR_A_TX_3_TEST_EN (0x15E) |
| 209 | #define SITAR_A_TX_3_TEST_EN__POR (0x000000cc) |
| 210 | #define SITAR_A_TX_3_ADC (0x15F) |
| 211 | #define SITAR_A_TX_3_ADC__POR (0x00000044) |
| 212 | #define SITAR_A_TX_3_MBHC_ATEST_REFCTRL (0x161) |
| 213 | #define SITAR_A_TX_3_MBHC_ATEST_REFCTRL__POR (0x00000000) |
| 214 | #define SITAR_A_TX_3_TEST_CTL (0x162) |
| 215 | #define SITAR_A_TX_3_TEST_CTL__POR (0x00000038) |
| 216 | #define SITAR_A_TX_3_TEST_BLOCK_EN (0x163) |
| 217 | #define SITAR_A_TX_3_TEST_BLOCK_EN__POR (0x000000fc) |
| 218 | #define SITAR_A_TX_3_TXFE_CKDIV (0x164) |
| 219 | #define SITAR_A_TX_3_TXFE_CKDIV__POR (0x000000ee) |
| 220 | #define SITAR_A_TX_3_SAR_ERR (0x165) |
| 221 | #define SITAR_A_TX_3_SAR_ERR__POR (0x00000000) |
| 222 | #define SITAR_A_TX_4_MBHC_EN (0x171) |
| 223 | #define SITAR_A_TX_4_MBHC_EN__POR (0x0000000c) |
| 224 | #define SITAR_A_TX_4_MBHC_ADC (0x173) |
| 225 | #define SITAR_A_TX_4_MBHC_ADC__POR (0x00000044) |
| 226 | #define SITAR_A_TX_4_MBHC_TEST_CTL (0x174) |
| 227 | #define SITAR_A_TX_4_MBHC_TEST_CTL__POR (0x00000038) |
| 228 | #define SITAR_A_TX_4_MBHC_SAR_ERR (0x175) |
| 229 | #define SITAR_A_TX_4_MBHC_SAR_ERR__POR (0x00000000) |
| 230 | #define SITAR_A_TX_4_TXFE_CLKDIV (0x176) |
| 231 | #define SITAR_A_TX_4_TXFE_CLKDIV__POR (0x0000001c) |
| 232 | #define SITAR_A_AUX_COM_CTL (0x180) |
| 233 | #define SITAR_A_AUX_COM_CTL__POR (0x00000034) |
| 234 | #define SITAR_A_AUX_COM_ATEST (0x181) |
| 235 | #define SITAR_A_AUX_COM_ATEST__POR (0x00000000) |
| 236 | #define SITAR_A_AUX_L_EN (0x182) |
| 237 | #define SITAR_A_AUX_L_EN__POR (0x00000000) |
| 238 | #define SITAR_A_AUX_L_GAIN (0x183) |
| 239 | #define SITAR_A_AUX_L_GAIN__POR (0x0000001f) |
| 240 | #define SITAR_A_AUX_L_PA_CONN (0x184) |
| 241 | #define SITAR_A_AUX_L_PA_CONN__POR (0x00000000) |
| 242 | #define SITAR_A_AUX_L_PA_CONN_INV (0x185) |
| 243 | #define SITAR_A_AUX_L_PA_CONN_INV__POR (0x00000000) |
| 244 | #define SITAR_A_AUX_R_EN (0x186) |
| 245 | #define SITAR_A_AUX_R_EN__POR (0x00000000) |
| 246 | #define SITAR_A_AUX_R_GAIN (0x187) |
| 247 | #define SITAR_A_AUX_R_GAIN__POR (0x0000001f) |
| 248 | #define SITAR_A_AUX_R_PA_CONN (0x188) |
| 249 | #define SITAR_A_AUX_R_PA_CONN__POR (0x00000000) |
| 250 | #define SITAR_A_AUX_R_PA_CONN_INV (0x189) |
| 251 | #define SITAR_A_AUX_R_PA_CONN_INV__POR (0x00000000) |
| 252 | #define SITAR_A_CP_EN (0x192) |
| 253 | #define SITAR_A_CP_EN__POR (0x000000e6) |
| 254 | #define SITAR_A_CP_CLK (0x193) |
| 255 | #define SITAR_A_CP_CLK__POR (0x00000029) |
| 256 | #define SITAR_A_CP_STATIC (0x194) |
| 257 | #define SITAR_A_CP_STATIC__POR (0x00000010) |
| 258 | #define SITAR_A_CP_DCC1 (0x195) |
| 259 | #define SITAR_A_CP_DCC1__POR (0x00000052) |
| 260 | #define SITAR_A_CP_DCC3 (0x196) |
| 261 | #define SITAR_A_CP_DCC3__POR (0x00000001) |
| 262 | #define SITAR_A_CP_ATEST (0x197) |
| 263 | #define SITAR_A_CP_ATEST__POR (0x00000000) |
| 264 | #define SITAR_A_CP_DTEST (0x198) |
| 265 | #define SITAR_A_CP_DTEST__POR (0x00000000) |
| 266 | #define SITAR_A_RX_COM_TIMER_DIV (0x19E) |
| 267 | #define SITAR_A_RX_COM_TIMER_DIV__POR (0x000000e8) |
| 268 | #define SITAR_A_RX_COM_OCP_CTL (0x19F) |
| 269 | #define SITAR_A_RX_COM_OCP_CTL__POR (0x0000001f) |
| 270 | #define SITAR_A_RX_COM_OCP_COUNT (0x1A0) |
| 271 | #define SITAR_A_RX_COM_OCP_COUNT__POR (0x00000077) |
| 272 | #define SITAR_A_RX_COM_DAC_CTL (0x1A1) |
| 273 | #define SITAR_A_RX_COM_DAC_CTL__POR (0x00000000) |
| 274 | #define SITAR_A_RX_COM_BIAS (0x1A2) |
| 275 | #define SITAR_A_RX_COM_BIAS__POR (0x00000000) |
| 276 | #define SITAR_A_RX_HPH_BIAS_PA (0x1A6) |
| 277 | #define SITAR_A_RX_HPH_BIAS_PA__POR (0x00000057) |
| 278 | #define SITAR_A_RX_HPH_BIAS_LDO (0x1A7) |
| 279 | #define SITAR_A_RX_HPH_BIAS_LDO__POR (0x00000056) |
| 280 | #define SITAR_A_RX_HPH_BIAS_CNP (0x1A8) |
| 281 | #define SITAR_A_RX_HPH_BIAS_CNP__POR (0x0000008a) |
| 282 | #define SITAR_A_RX_HPH_BIAS_WG (0x1A9) |
| 283 | #define SITAR_A_RX_HPH_BIAS_WG__POR (0x00000060) |
| 284 | #define SITAR_A_RX_HPH_OCP_CTL (0x1AA) |
| 285 | #define SITAR_A_RX_HPH_OCP_CTL__POR (0x000000e8) |
| 286 | #define SITAR_A_RX_HPH_CNP_EN (0x1AB) |
| 287 | #define SITAR_A_RX_HPH_CNP_EN__POR (0x00000080) |
| 288 | #define SITAR_A_RX_HPH_CNP_WG_CTL (0x1AC) |
| 289 | #define SITAR_A_RX_HPH_CNP_WG_CTL__POR (0x000000dc) |
| 290 | #define SITAR_A_RX_HPH_CNP_WG_TIME (0x1AD) |
| 291 | #define SITAR_A_RX_HPH_CNP_WG_TIME__POR (0x00000028) |
| 292 | #define SITAR_A_RX_HPH_L_GAIN (0x1AE) |
| 293 | #define SITAR_A_RX_HPH_L_GAIN__POR (0x00000000) |
| 294 | #define SITAR_A_RX_HPH_L_TEST (0x1AF) |
| 295 | #define SITAR_A_RX_HPH_L_TEST__POR (0x00000001) |
| 296 | #define SITAR_A_RX_HPH_L_PA_CTL (0x1B0) |
| 297 | #define SITAR_A_RX_HPH_L_PA_CTL__POR (0x00000040) |
| 298 | #define SITAR_A_RX_HPH_L_DAC_CTL (0x1B1) |
| 299 | #define SITAR_A_RX_HPH_L_DAC_CTL__POR (0x00000000) |
| 300 | #define SITAR_A_RX_HPH_L_ATEST (0x1B2) |
| 301 | #define SITAR_A_RX_HPH_L_ATEST__POR (0x00000000) |
| 302 | #define SITAR_A_RX_HPH_L_STATUS (0x1B3) |
| 303 | #define SITAR_A_RX_HPH_L_STATUS__POR (0x00000004) |
| 304 | #define SITAR_A_RX_HPH_R_GAIN (0x1B4) |
| 305 | #define SITAR_A_RX_HPH_R_GAIN__POR (0x00000000) |
| 306 | #define SITAR_A_RX_HPH_R_TEST (0x1B5) |
| 307 | #define SITAR_A_RX_HPH_R_TEST__POR (0x00000001) |
| 308 | #define SITAR_A_RX_HPH_R_PA_CTL (0x1B6) |
| 309 | #define SITAR_A_RX_HPH_R_PA_CTL__POR (0x00000040) |
| 310 | #define SITAR_A_RX_HPH_R_DAC_CTL (0x1B7) |
| 311 | #define SITAR_A_RX_HPH_R_DAC_CTL__POR (0x00000000) |
| 312 | #define SITAR_A_RX_HPH_R_ATEST (0x1B8) |
| 313 | #define SITAR_A_RX_HPH_R_ATEST__POR (0x00000000) |
| 314 | #define SITAR_A_RX_HPH_R_STATUS (0x1B9) |
| 315 | #define SITAR_A_RX_HPH_R_STATUS__POR (0x00000004) |
| 316 | #define SITAR_A_RX_EAR_BIAS_PA (0x1BA) |
| 317 | #define SITAR_A_RX_EAR_BIAS_PA__POR (0x000000a6) |
| 318 | #define SITAR_A_RX_EAR_BIAS_CMBUFF (0x1BB) |
| 319 | #define SITAR_A_RX_EAR_BIAS_CMBUFF__POR (0x000000a0) |
| 320 | #define SITAR_A_RX_EAR_EN (0x1BC) |
| 321 | #define SITAR_A_RX_EAR_EN__POR (0x00000000) |
| 322 | #define SITAR_A_RX_EAR_GAIN (0x1BD) |
| 323 | #define SITAR_A_RX_EAR_GAIN__POR (0x00000002) |
| 324 | #define SITAR_A_RX_EAR_CMBUFF (0x1BE) |
| 325 | #define SITAR_A_RX_EAR_CMBUFF__POR (0x00000004) |
| 326 | #define SITAR_A_RX_EAR_ICTL (0x1BF) |
| 327 | #define SITAR_A_RX_EAR_ICTL__POR (0x00000040) |
| 328 | #define SITAR_A_RX_EAR_CCOMP (0x1C0) |
| 329 | #define SITAR_A_RX_EAR_CCOMP__POR (0x00000008) |
| 330 | #define SITAR_A_RX_EAR_VCM (0x1C1) |
| 331 | #define SITAR_A_RX_EAR_VCM__POR (0x00000003) |
| 332 | #define SITAR_A_RX_EAR_CNP (0x1C2) |
| 333 | #define SITAR_A_RX_EAR_CNP__POR (0x000000f2) |
| 334 | #define SITAR_A_RX_EAR_ATEST (0x1C3) |
| 335 | #define SITAR_A_RX_EAR_ATEST__POR (0x00000000) |
| 336 | #define SITAR_A_RX_EAR_STATUS (0x1C5) |
| 337 | #define SITAR_A_RX_EAR_STATUS__POR (0x00000004) |
| 338 | #define SITAR_A_RX_LINE_BIAS_PA (0x1C6) |
| 339 | #define SITAR_A_RX_LINE_BIAS_PA__POR (0x000000aa) |
| 340 | #define SITAR_A_RX_LINE_BIAS_LDO (0x1C7) |
| 341 | #define SITAR_A_RX_LINE_BIAS_LDO__POR (0x00000086) |
| 342 | #define SITAR_A_RX_LINE_BIAS_CNP1 (0x1C8) |
| 343 | #define SITAR_A_RX_LINE_BIAS_CNP1__POR (0x00000060) |
| 344 | #define SITAR_A_RX_LINE_COM (0x1C9) |
| 345 | #define SITAR_A_RX_LINE_COM__POR (0x00000000) |
| 346 | #define SITAR_A_RX_LINE_CNP_EN (0x1CA) |
| 347 | #define SITAR_A_RX_LINE_CNP_EN__POR (0x00000080) |
| 348 | #define SITAR_A_RX_LINE_CNP_WG_CTL (0x1CB) |
| 349 | #define SITAR_A_RX_LINE_CNP_WG_CTL__POR (0x000000dc) |
| 350 | #define SITAR_A_RX_LINE_CNP_WG_TIME (0x1CC) |
| 351 | #define SITAR_A_RX_LINE_CNP_WG_TIME__POR (0x00000028) |
| 352 | #define SITAR_A_RX_LINE_1_GAIN (0x1CD) |
| 353 | #define SITAR_A_RX_LINE_1_GAIN__POR (0x00000000) |
| 354 | #define SITAR_A_RX_LINE_1_TEST (0x1CE) |
| 355 | #define SITAR_A_RX_LINE_1_TEST__POR (0x00000001) |
| 356 | #define SITAR_A_RX_LINE_1_DAC_CTL (0x1CF) |
| 357 | #define SITAR_A_RX_LINE_1_DAC_CTL__POR (0x00000000) |
| 358 | #define SITAR_A_RX_LINE_1_STATUS (0x1D0) |
| 359 | #define SITAR_A_RX_LINE_1_STATUS__POR (0x00000004) |
| 360 | #define SITAR_A_RX_LINE_2_GAIN (0x1D1) |
| 361 | #define SITAR_A_RX_LINE_2_GAIN__POR (0x00000000) |
| 362 | #define SITAR_A_RX_LINE_2_TEST (0x1D2) |
| 363 | #define SITAR_A_RX_LINE_2_TEST__POR (0x00000001) |
| 364 | #define SITAR_A_RX_LINE_2_DAC_CTL (0x1D3) |
| 365 | #define SITAR_A_RX_LINE_2_DAC_CTL__POR (0x00000000) |
| 366 | #define SITAR_A_RX_LINE_2_STATUS (0x1D4) |
| 367 | #define SITAR_A_RX_LINE_2_STATUS__POR (0x00000004) |
| 368 | #define SITAR_A_RX_LINE_BIAS_CNP2 (0x1E1) |
| 369 | #define SITAR_A_RX_LINE_BIAS_CNP2__POR (0x0000008a) |
| 370 | #define SITAR_A_RX_LINE_OCP_CTL (0x1E2) |
| 371 | #define SITAR_A_RX_LINE_OCP_CTL__POR (0x000000e8) |
| 372 | #define SITAR_A_RX_LINE_1_PA_CTL (0x1E3) |
| 373 | #define SITAR_A_RX_LINE_1_PA_CTL__POR (0x00000040) |
| 374 | #define SITAR_A_RX_LINE_2_PA_CTL (0x1E4) |
| 375 | #define SITAR_A_RX_LINE_2_PA_CTL__POR (0x00000040) |
| 376 | #define SITAR_A_RX_LINE_CNP_DBG (0x1EC) |
| 377 | #define SITAR_A_RX_LINE_CNP_DBG__POR (0x00000000) |
| 378 | #define SITAR_A_MBHC_HPH (0x1ED) |
| 379 | #define SITAR_A_MBHC_HPH__POR (0x00000048) |
| 380 | #define SITAR_A_RC_OSC_FREQ (0x1F7) |
| 381 | #define SITAR_A_RC_OSC_FREQ__POR (0x00000046) |
| 382 | #define SITAR_A_RC_OSC_TEST (0x1F8) |
| 383 | #define SITAR_A_RC_OSC_TEST__POR (0x0000000a) |
| 384 | #define SITAR_A_RC_OSC_STATUS (0x1F9) |
| 385 | #define SITAR_A_RC_OSC_STATUS__POR (0x0000001c) |
| 386 | #define SITAR_A_RC_OSC_TUNER (0x1FA) |
| 387 | #define SITAR_A_RC_OSC_TUNER__POR (0x00000000) |
| 388 | #define SITAR_A_CDC_ANC1_CTL (0x200) |
| 389 | #define SITAR_A_CDC_ANC1_CTL__POR (0x00000000) |
| 390 | #define SITAR_A_CDC_ANC1_SHIFT (0x201) |
| 391 | #define SITAR_A_CDC_ANC1_SHIFT__POR (0x00000000) |
| 392 | #define SITAR_A_CDC_ANC1_IIR_B1_CTL (0x202) |
| 393 | #define SITAR_A_CDC_ANC1_IIR_B1_CTL__POR (0x00000000) |
| 394 | #define SITAR_A_CDC_ANC1_IIR_B2_CTL (0x203) |
| 395 | #define SITAR_A_CDC_ANC1_IIR_B2_CTL__POR (0x00000000) |
| 396 | #define SITAR_A_CDC_ANC1_IIR_B3_CTL (0x204) |
| 397 | #define SITAR_A_CDC_ANC1_IIR_B3_CTL__POR (0x00000000) |
| 398 | #define SITAR_A_CDC_ANC1_IIR_B4_CTL (0x205) |
| 399 | #define SITAR_A_CDC_ANC1_IIR_B4_CTL__POR (0x00000000) |
| 400 | #define SITAR_A_CDC_ANC1_LPF_B1_CTL (0x206) |
| 401 | #define SITAR_A_CDC_ANC1_LPF_B1_CTL__POR (0x00000000) |
| 402 | #define SITAR_A_CDC_ANC1_LPF_B2_CTL (0x207) |
| 403 | #define SITAR_A_CDC_ANC1_LPF_B2_CTL__POR (0x00000000) |
| 404 | #define SITAR_A_CDC_ANC1_LPF_B3_CTL (0x208) |
| 405 | #define SITAR_A_CDC_ANC1_LPF_B3_CTL__POR (0x00000000) |
| 406 | #define SITAR_A_CDC_ANC1_SPARE (0x209) |
| 407 | #define SITAR_A_CDC_ANC1_SPARE__POR (0x00000000) |
| 408 | #define SITAR_A_CDC_ANC1_SMLPF_CTL (0x20A) |
| 409 | #define SITAR_A_CDC_ANC1_SMLPF_CTL__POR (0x00000000) |
| 410 | #define SITAR_A_CDC_ANC1_DCFLT_CTL (0x20B) |
| 411 | #define SITAR_A_CDC_ANC1_DCFLT_CTL__POR (0x00000000) |
| 412 | #define SITAR_A_CDC_TX1_VOL_CTL_TIMER (0x220) |
| 413 | #define SITAR_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00000000) |
| 414 | #define SITAR_A_CDC_TX1_VOL_CTL_GAIN (0x221) |
| 415 | #define SITAR_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00000000) |
| 416 | #define SITAR_A_CDC_TX1_VOL_CTL_CFG (0x222) |
| 417 | #define SITAR_A_CDC_TX1_VOL_CTL_CFG__POR (0x00000000) |
| 418 | #define SITAR_A_CDC_TX1_MUX_CTL (0x223) |
| 419 | #define SITAR_A_CDC_TX1_MUX_CTL__POR (0x00000008) |
| 420 | #define SITAR_A_CDC_TX1_CLK_FS_CTL (0x224) |
| 421 | #define SITAR_A_CDC_TX1_CLK_FS_CTL__POR (0x00000003) |
| 422 | #define SITAR_A_CDC_TX1_DMIC_CTL (0x225) |
| 423 | #define SITAR_A_CDC_TX1_DMIC_CTL__POR (0x00000000) |
| 424 | #define SITAR_A_CDC_SRC1_PDA_CFG (0x2A0) |
| 425 | #define SITAR_A_CDC_SRC1_PDA_CFG__POR (0x00000000) |
| 426 | #define SITAR_A_CDC_SRC1_FS_CTL (0x2A1) |
| 427 | #define SITAR_A_CDC_SRC1_FS_CTL__POR (0x0000001b) |
| 428 | |
| 429 | #define SITAR_A_CDC_RX1_B1_CTL (0x000002B0) |
| 430 | #define SITAR_A_CDC_RX1_B1_CTL__POR (0x00000000) |
| 431 | #define SITAR_A_CDC_RX2_B1_CTL (0x000002B8) |
| 432 | #define SITAR_A_CDC_RX2_B1_CTL__POR (0x00000000) |
| 433 | #define SITAR_A_CDC_RX3_B1_CTL (0x000002C0) |
| 434 | #define SITAR_A_CDC_RX3_B1_CTL__POR (0x00000000) |
| 435 | |
| 436 | #define SITAR_A_CDC_RX1_B2_CTL (0x000002B1) |
| 437 | #define SITAR_A_CDC_RX1_B2_CTL__POR (0x00000000) |
| 438 | #define SITAR_A_CDC_RX2_B2_CTL (0x000002B9) |
| 439 | #define SITAR_A_CDC_RX2_B2_CTL__POR (0x00000000) |
| 440 | #define SITAR_A_CDC_RX3_B2_CTL (0x000002C1) |
| 441 | #define SITAR_A_CDC_RX3_B2_CTL__POR (0x00000000) |
| 442 | |
| 443 | #define SITAR_A_CDC_RX1_B3_CTL (0x000002B2) |
| 444 | #define SITAR_A_CDC_RX1_B3_CTL__POR (0x00000000) |
| 445 | #define SITAR_A_CDC_RX2_B3_CTL (0x000002BA) |
| 446 | #define SITAR_A_CDC_RX2_B3_CTL__POR (0x00000000) |
| 447 | #define SITAR_A_CDC_RX3_B3_CTL (0x000002C2) |
| 448 | #define SITAR_A_CDC_RX3_B3_CTL__POR (0x00000000) |
| 449 | |
| 450 | #define SITAR_A_CDC_RX1_B4_CTL (0x000002B3) |
| 451 | #define SITAR_A_CDC_RX1_B4_CTL__POR (0x00000000) |
| 452 | #define SITAR_A_CDC_RX2_B4_CTL (0x000002BB) |
| 453 | #define SITAR_A_CDC_RX2_B4_CTL__POR (0x00000000) |
| 454 | #define SITAR_A_CDC_RX3_B4_CTL (0x000002C3) |
| 455 | #define SITAR_A_CDC_RX3_B4_CTL__POR (0x00000000) |
| 456 | |
| 457 | #define SITAR_A_CDC_RX1_B5_CTL (0x000002B4) |
| 458 | #define SITAR_A_CDC_RX1_B5_CTL__POR (0x00000060) |
| 459 | #define SITAR_A_CDC_RX2_B5_CTL (0x000002BC) |
| 460 | #define SITAR_A_CDC_RX2_B5_CTL__POR (0x00000060) |
| 461 | #define SITAR_A_CDC_RX3_B5_CTL (0x000002C4) |
| 462 | #define SITAR_A_CDC_RX3_B5_CTL__POR (0x00000060) |
| 463 | |
| 464 | #define SITAR_A_CDC_RX1_B6_CTL (0x000002B5) |
| 465 | #define SITAR_A_CDC_RX1_B6_CTL__POR (0x00000000) |
| 466 | #define SITAR_A_CDC_RX2_B6_CTL (0x000002BD) |
| 467 | #define SITAR_A_CDC_RX2_B6_CTL__POR (0x00000000) |
| 468 | #define SITAR_A_CDC_RX3_B6_CTL (0x000002C5) |
| 469 | #define SITAR_A_CDC_RX3_B6_CTL__POR (0x00000000) |
| 470 | |
| 471 | |
| 472 | #define SITAR_A_CDC_RX1_VOL_CTL_B1_CTL (0x2B6) |
| 473 | #define SITAR_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00000000) |
| 474 | #define SITAR_A_CDC_RX1_VOL_CTL_B2_CTL (0x2B7) |
| 475 | #define SITAR_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00000000) |
| 476 | #define SITAR_A_CDC_CLK_ANC_RESET_CTL (0x300) |
| 477 | #define SITAR_A_CDC_CLK_ANC_RESET_CTL__POR (0x00000000) |
| 478 | #define SITAR_A_CDC_CLK_RX_RESET_CTL (0x301) |
| 479 | #define SITAR_A_CDC_CLK_RX_RESET_CTL__POR (0x00000000) |
| 480 | #define SITAR_A_CDC_CLK_TX_RESET_B1_CTL (0x302) |
| 481 | #define SITAR_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00000000) |
| 482 | #define SITAR_A_CDC_CLK_TX_RESET_B2_CTL (0x303) |
| 483 | #define SITAR_A_CDC_CLK_TX_RESET_B2_CTL__POR (0x00000000) |
| 484 | #define SITAR_A_CDC_CLK_DMIC_CTL (0x304) |
| 485 | #define SITAR_A_CDC_CLK_DMIC_CTL__POR (0x00000000) |
| 486 | #define SITAR_A_CDC_CLK_RX_I2S_CTL (0x305) |
| 487 | #define SITAR_A_CDC_CLK_RX_I2S_CTL__POR (0x00000003) |
| 488 | #define SITAR_A_CDC_CLK_TX_I2S_CTL (0x306) |
| 489 | #define SITAR_A_CDC_CLK_TX_I2S_CTL__POR (0x00000003) |
| 490 | #define SITAR_A_CDC_CLK_OTHR_RESET_CTL (0x307) |
| 491 | #define SITAR_A_CDC_CLK_OTHR_RESET_CTL__POR (0x00000000) |
| 492 | #define SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x308) |
| 493 | #define SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00000000) |
| 494 | #define SITAR_A_CDC_CLK_OTHR_CTL (0x30A) |
| 495 | #define SITAR_A_CDC_CLK_OTHR_CTL__POR (0x00000000) |
| 496 | #define SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL (0x30B) |
| 497 | #define SITAR_A_CDC_CLK_RDAC_CLK_EN_CTL__POR (0x00000000) |
| 498 | #define SITAR_A_CDC_CLK_ANC_CLK_EN_CTL (0x30C) |
| 499 | #define SITAR_A_CDC_CLK_ANC_CLK_EN_CTL__POR (0x00000000) |
| 500 | #define SITAR_A_CDC_CLK_RX_B1_CTL (0x30D) |
| 501 | #define SITAR_A_CDC_CLK_RX_B1_CTL__POR (0x00000000) |
| 502 | #define SITAR_A_CDC_CLK_RX_B2_CTL (0x30E) |
| 503 | #define SITAR_A_CDC_CLK_RX_B2_CTL__POR (0x00000000) |
| 504 | #define SITAR_A_CDC_CLK_MCLK_CTL (0x30F) |
| 505 | #define SITAR_A_CDC_CLK_MCLK_CTL__POR (0x00000000) |
| 506 | #define SITAR_A_CDC_CLK_PDM_CTL (0x310) |
| 507 | #define SITAR_A_CDC_CLK_PDM_CTL__POR (0x00000000) |
| 508 | #define SITAR_A_CDC_CLK_SD_CTL (0x311) |
| 509 | #define SITAR_A_CDC_CLK_SD_CTL__POR (0x00000000) |
| 510 | #define SITAR_A_CDC_CLK_LP_CTL (0x312) |
| 511 | #define SITAR_A_CDC_CLK_LP_CTL__POR (0x00000000) |
| 512 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL (0x320) |
| 513 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B1_CTL__POR (0x00000007) |
| 514 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL (0x321) |
| 515 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B2_CTL__POR (0x00000013) |
| 516 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL (0x322) |
| 517 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL__POR (0x0000001b) |
| 518 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL (0x323) |
| 519 | #define SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL__POR (0x0000007f) |
| 520 | #define SITAR_A_CDC_CLSG_GAIN_THRESH_CTL (0x324) |
| 521 | #define SITAR_A_CDC_CLSG_GAIN_THRESH_CTL__POR (0x00000026) |
| 522 | #define SITAR_A_CDC_CLSG_TIMER_B1_CFG (0x325) |
| 523 | #define SITAR_A_CDC_CLSG_TIMER_B1_CFG__POR (0x0000000a) |
| 524 | #define SITAR_A_CDC_CLSG_TIMER_B2_CFG (0x326) |
| 525 | #define SITAR_A_CDC_CLSG_TIMER_B2_CFG__POR (0x00000000) |
| 526 | #define SITAR_A_CDC_CLSG_CTL (0x327) |
| 527 | #define SITAR_A_CDC_CLSG_CTL__POR (0x00000013) |
| 528 | #define SITAR_A_CDC_IIR1_GAIN_B1_CTL (0x340) |
| 529 | #define SITAR_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00000000) |
| 530 | #define SITAR_A_CDC_IIR1_GAIN_B2_CTL (0x341) |
| 531 | #define SITAR_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00000000) |
| 532 | #define SITAR_A_CDC_IIR1_GAIN_B3_CTL (0x342) |
| 533 | #define SITAR_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00000000) |
| 534 | #define SITAR_A_CDC_IIR1_GAIN_B4_CTL (0x343) |
| 535 | #define SITAR_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00000000) |
| 536 | #define SITAR_A_CDC_IIR1_GAIN_B5_CTL (0x344) |
| 537 | #define SITAR_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00000000) |
| 538 | #define SITAR_A_CDC_IIR1_GAIN_B6_CTL (0x345) |
| 539 | #define SITAR_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00000000) |
| 540 | #define SITAR_A_CDC_IIR1_GAIN_B7_CTL (0x346) |
| 541 | #define SITAR_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00000000) |
| 542 | #define SITAR_A_CDC_IIR1_GAIN_B8_CTL (0x347) |
| 543 | #define SITAR_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00000000) |
| 544 | #define SITAR_A_CDC_IIR1_CTL (0x348) |
| 545 | #define SITAR_A_CDC_IIR1_CTL__POR (0x00000040) |
| 546 | #define SITAR_A_CDC_IIR1_GAIN_TIMER_CTL (0x349) |
| 547 | #define SITAR_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00000000) |
| 548 | #define SITAR_A_CDC_IIR1_COEF_B1_CTL (0x34A) |
| 549 | #define SITAR_A_CDC_IIR1_COEF_B1_CTL__POR (0x00000000) |
| 550 | #define SITAR_A_CDC_IIR1_COEF_B2_CTL (0x34B) |
| 551 | #define SITAR_A_CDC_IIR1_COEF_B2_CTL__POR (0x00000000) |
| 552 | #define SITAR_A_CDC_IIR1_COEF_B3_CTL (0x34C) |
| 553 | #define SITAR_A_CDC_IIR1_COEF_B3_CTL__POR (0x00000000) |
| 554 | #define SITAR_A_CDC_IIR1_COEF_B4_CTL (0x34D) |
| 555 | #define SITAR_A_CDC_IIR1_COEF_B4_CTL__POR (0x00000000) |
| 556 | #define SITAR_A_CDC_IIR1_COEF_B5_CTL (0x34E) |
| 557 | #define SITAR_A_CDC_IIR1_COEF_B5_CTL__POR (0x00000000) |
| 558 | #define SITAR_A_CDC_TOP_GAIN_UPDATE (0x360) |
| 559 | #define SITAR_A_CDC_TOP_GAIN_UPDATE__POR (0x00000000) |
| 560 | #define SITAR_A_CDC_TOP_RDAC_DOUT_CTL (0x361) |
| 561 | #define SITAR_A_CDC_TOP_RDAC_DOUT_CTL__POR (0x00000000) |
| 562 | #define SITAR_A_CDC_DEBUG_B1_CTL (0x368) |
| 563 | #define SITAR_A_CDC_DEBUG_B1_CTL__POR (0x00000000) |
| 564 | #define SITAR_A_CDC_DEBUG_B2_CTL (0x369) |
| 565 | #define SITAR_A_CDC_DEBUG_B2_CTL__POR (0x00000000) |
| 566 | #define SITAR_A_CDC_DEBUG_B3_CTL (0x36A) |
| 567 | #define SITAR_A_CDC_DEBUG_B3_CTL__POR (0x00000000) |
| 568 | #define SITAR_A_CDC_DEBUG_B4_CTL (0x36B) |
| 569 | #define SITAR_A_CDC_DEBUG_B4_CTL__POR (0x00000000) |
| 570 | #define SITAR_A_CDC_DEBUG_B5_CTL (0x36C) |
| 571 | #define SITAR_A_CDC_DEBUG_B5_CTL__POR (0x00000000) |
| 572 | #define SITAR_A_CDC_DEBUG_B6_CTL (0x36D) |
| 573 | #define SITAR_A_CDC_DEBUG_B6_CTL__POR (0x00000000) |
| 574 | #define SITAR_A_CDC_DEBUG_B7_CTL (0x36E) |
| 575 | #define SITAR_A_CDC_DEBUG_B7_CTL__POR (0x00000000) |
| 576 | #define SITAR_A_CDC_COMP1_B1_CTL (0x370) |
| 577 | #define SITAR_A_CDC_COMP1_B1_CTL__POR (0x00000030) |
| 578 | #define SITAR_A_CDC_COMP1_B2_CTL (0x371) |
| 579 | #define SITAR_A_CDC_COMP1_B2_CTL__POR (0x000000b5) |
| 580 | #define SITAR_A_CDC_COMP1_B3_CTL (0x372) |
| 581 | #define SITAR_A_CDC_COMP1_B3_CTL__POR (0x00000028) |
| 582 | #define SITAR_A_CDC_COMP1_B4_CTL (0x373) |
| 583 | #define SITAR_A_CDC_COMP1_B4_CTL__POR (0x0000003c) |
| 584 | #define SITAR_A_CDC_COMP1_B5_CTL (0x374) |
| 585 | #define SITAR_A_CDC_COMP1_B5_CTL__POR (0x0000001f) |
| 586 | #define SITAR_A_CDC_COMP1_B6_CTL (0x375) |
| 587 | #define SITAR_A_CDC_COMP1_B6_CTL__POR (0x00000000) |
| 588 | #define SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS (0x376) |
| 589 | #define SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS__POR (0x00000003) |
| 590 | #define SITAR_A_CDC_COMP1_FS_CFG (0x377) |
| 591 | #define SITAR_A_CDC_COMP1_FS_CFG__POR (0x0000001b) |
| 592 | #define SITAR_A_CDC_CONN_RX1_B1_CTL (0x380) |
| 593 | #define SITAR_A_CDC_CONN_RX1_B1_CTL__POR (0x00000000) |
| 594 | #define SITAR_A_CDC_CONN_RX1_B2_CTL (0x381) |
| 595 | #define SITAR_A_CDC_CONN_RX1_B2_CTL__POR (0x00000000) |
| 596 | #define SITAR_A_CDC_CONN_RX1_B3_CTL (0x382) |
| 597 | #define SITAR_A_CDC_CONN_RX1_B3_CTL__POR (0x00000000) |
| 598 | #define SITAR_A_CDC_CONN_RX2_B1_CTL (0x383) |
| 599 | #define SITAR_A_CDC_CONN_RX2_B1_CTL__POR (0x00000000) |
| 600 | #define SITAR_A_CDC_CONN_RX2_B2_CTL (0x384) |
| 601 | #define SITAR_A_CDC_CONN_RX2_B2_CTL__POR (0x00000000) |
| 602 | #define SITAR_A_CDC_CONN_RX2_B3_CTL (0x385) |
| 603 | #define SITAR_A_CDC_CONN_RX2_B3_CTL__POR (0x00000000) |
| 604 | #define SITAR_A_CDC_CONN_RX3_B1_CTL (0x386) |
| 605 | #define SITAR_A_CDC_CONN_RX3_B1_CTL__POR (0x00000000) |
| 606 | #define SITAR_A_CDC_CONN_RX3_B2_CTL (0x387) |
| 607 | #define SITAR_A_CDC_CONN_RX3_B2_CTL__POR (0x00000000) |
| 608 | #define SITAR_A_CDC_CONN_RX3_B3_CTL (0x388) |
| 609 | #define SITAR_A_CDC_CONN_RX3_B3_CTL__POR (0x00000000) |
| 610 | #define SITAR_A_CDC_CONN_ANC_B1_CTL (0x391) |
| 611 | #define SITAR_A_CDC_CONN_ANC_B1_CTL__POR (0x00000000) |
| 612 | #define SITAR_A_CDC_CONN_ANC_B2_CTL (0x392) |
| 613 | #define SITAR_A_CDC_CONN_ANC_B2_CTL__POR (0x00000000) |
| 614 | #define SITAR_A_CDC_CONN_TX_B1_CTL (0x393) |
| 615 | #define SITAR_A_CDC_CONN_TX_B1_CTL__POR (0x00000000) |
| 616 | #define SITAR_A_CDC_CONN_TX_B2_CTL (0x394) |
| 617 | #define SITAR_A_CDC_CONN_TX_B2_CTL__POR (0x00000000) |
| 618 | #define SITAR_A_CDC_CONN_EQ1_B1_CTL (0x397) |
| 619 | #define SITAR_A_CDC_CONN_EQ1_B1_CTL__POR (0x00000000) |
| 620 | #define SITAR_A_CDC_CONN_EQ1_B2_CTL (0x398) |
| 621 | #define SITAR_A_CDC_CONN_EQ1_B2_CTL__POR (0x00000000) |
| 622 | #define SITAR_A_CDC_CONN_EQ1_B3_CTL (0x399) |
| 623 | #define SITAR_A_CDC_CONN_EQ1_B3_CTL__POR (0x00000000) |
| 624 | #define SITAR_A_CDC_CONN_EQ1_B4_CTL (0x39A) |
| 625 | #define SITAR_A_CDC_CONN_EQ1_B4_CTL__POR (0x00000000) |
| 626 | #define SITAR_A_CDC_CONN_EQ2_B1_CTL (0x39B) |
| 627 | #define SITAR_A_CDC_CONN_EQ2_B1_CTL__POR (0x00000000) |
| 628 | #define SITAR_A_CDC_CONN_EQ2_B2_CTL (0x39C) |
| 629 | #define SITAR_A_CDC_CONN_EQ2_B2_CTL__POR (0x00000000) |
| 630 | #define SITAR_A_CDC_CONN_EQ2_B3_CTL (0x39D) |
| 631 | #define SITAR_A_CDC_CONN_EQ2_B3_CTL__POR (0x00000000) |
| 632 | #define SITAR_A_CDC_CONN_EQ2_B4_CTL (0x39E) |
| 633 | #define SITAR_A_CDC_CONN_EQ2_B4_CTL__POR (0x00000000) |
| 634 | #define SITAR_A_CDC_CONN_SRC1_B1_CTL (0x39F) |
| 635 | #define SITAR_A_CDC_CONN_SRC1_B1_CTL__POR (0x00000000) |
| 636 | #define SITAR_A_CDC_CONN_SRC1_B2_CTL (0x3A0) |
| 637 | #define SITAR_A_CDC_CONN_SRC1_B2_CTL__POR (0x00000000) |
| 638 | #define SITAR_A_CDC_CONN_SRC2_B1_CTL (0x3A1) |
| 639 | #define SITAR_A_CDC_CONN_SRC2_B1_CTL__POR (0x00000000) |
| 640 | #define SITAR_A_CDC_CONN_SRC2_B2_CTL (0x3A2) |
| 641 | #define SITAR_A_CDC_CONN_SRC2_B2_CTL__POR (0x00000000) |
| 642 | #define SITAR_A_CDC_CONN_TX_SB_B1_CTL (0x3A3) |
| 643 | #define SITAR_A_CDC_CONN_TX_SB_B1_CTL__POR (0x00000000) |
| 644 | #define SITAR_A_CDC_CONN_TX_SB_B2_CTL (0x3A4) |
| 645 | #define SITAR_A_CDC_CONN_TX_SB_B2_CTL__POR (0x00000000) |
| 646 | #define SITAR_A_CDC_CONN_TX_SB_B3_CTL (0x3A5) |
| 647 | #define SITAR_A_CDC_CONN_TX_SB_B3_CTL__POR (0x00000000) |
| 648 | #define SITAR_A_CDC_CONN_TX_SB_B4_CTL (0x3A6) |
| 649 | #define SITAR_A_CDC_CONN_TX_SB_B4_CTL__POR (0x00000000) |
| 650 | #define SITAR_A_CDC_CONN_TX_SB_B5_CTL (0x3A7) |
| 651 | #define SITAR_A_CDC_CONN_TX_SB_B5_CTL__POR (0x00000000) |
| 652 | #define SITAR_A_CDC_CONN_RX_SB_B1_CTL (0x3AE) |
| 653 | #define SITAR_A_CDC_CONN_RX_SB_B1_CTL__POR (0x00000000) |
| 654 | #define SITAR_A_CDC_CONN_RX_SB_B2_CTL (0x3AF) |
| 655 | #define SITAR_A_CDC_CONN_RX_SB_B2_CTL__POR (0x00000000) |
| 656 | #define SITAR_A_CDC_CONN_CLSG_CTL (0x3B0) |
| 657 | #define SITAR_A_CDC_CONN_CLSG_CTL__POR (0x00000000) |
| 658 | #define SITAR_A_CDC_CONN_SPARE (0x3B1) |
| 659 | #define SITAR_A_CDC_CONN_SPARE__POR (0x00000000) |
| 660 | #define SITAR_A_CDC_MBHC_EN_CTL (0x3C0) |
| 661 | #define SITAR_A_CDC_MBHC_EN_CTL__POR (0x00000000) |
| 662 | #define SITAR_A_CDC_MBHC_FIR_B1_CFG (0x3C1) |
| 663 | #define SITAR_A_CDC_MBHC_FIR_B1_CFG__POR (0x00000000) |
| 664 | #define SITAR_A_CDC_MBHC_FIR_B2_CFG (0x3C2) |
| 665 | #define SITAR_A_CDC_MBHC_FIR_B2_CFG__POR (0x00000006) |
| 666 | #define SITAR_A_CDC_MBHC_TIMER_B1_CTL (0x3C3) |
| 667 | #define SITAR_A_CDC_MBHC_TIMER_B1_CTL__POR (0x00000003) |
| 668 | #define SITAR_A_CDC_MBHC_TIMER_B2_CTL (0x3C4) |
| 669 | #define SITAR_A_CDC_MBHC_TIMER_B2_CTL__POR (0x00000009) |
| 670 | #define SITAR_A_CDC_MBHC_TIMER_B3_CTL (0x3C5) |
| 671 | #define SITAR_A_CDC_MBHC_TIMER_B3_CTL__POR (0x0000001e) |
| 672 | #define SITAR_A_CDC_MBHC_TIMER_B4_CTL (0x3C6) |
| 673 | #define SITAR_A_CDC_MBHC_TIMER_B4_CTL__POR (0x00000045) |
| 674 | #define SITAR_A_CDC_MBHC_TIMER_B5_CTL (0x3C7) |
| 675 | #define SITAR_A_CDC_MBHC_TIMER_B5_CTL__POR (0x00000004) |
| 676 | #define SITAR_A_CDC_MBHC_TIMER_B6_CTL (0x3C8) |
| 677 | #define SITAR_A_CDC_MBHC_TIMER_B6_CTL__POR (0x00000078) |
| 678 | #define SITAR_A_CDC_MBHC_B1_STATUS (0x3C9) |
| 679 | #define SITAR_A_CDC_MBHC_B1_STATUS__POR (0x00000000) |
| 680 | #define SITAR_A_CDC_MBHC_B2_STATUS (0x3CA) |
| 681 | #define SITAR_A_CDC_MBHC_B2_STATUS__POR (0x00000000) |
| 682 | #define SITAR_A_CDC_MBHC_B3_STATUS (0x3CB) |
| 683 | #define SITAR_A_CDC_MBHC_B3_STATUS__POR (0x00000000) |
| 684 | #define SITAR_A_CDC_MBHC_B4_STATUS (0x3CC) |
| 685 | #define SITAR_A_CDC_MBHC_B4_STATUS__POR (0x00000000) |
| 686 | #define SITAR_A_CDC_MBHC_B5_STATUS (0x3CD) |
| 687 | #define SITAR_A_CDC_MBHC_B5_STATUS__POR (0x00000000) |
| 688 | #define SITAR_A_CDC_MBHC_B1_CTL (0x3CE) |
| 689 | #define SITAR_A_CDC_MBHC_B1_CTL__POR (0x000000c0) |
| 690 | #define SITAR_A_CDC_MBHC_B2_CTL (0x3CF) |
| 691 | #define SITAR_A_CDC_MBHC_B2_CTL__POR (0x0000005d) |
| 692 | #define SITAR_A_CDC_MBHC_VOLT_B1_CTL (0x3D0) |
| 693 | #define SITAR_A_CDC_MBHC_VOLT_B1_CTL__POR (0x00000000) |
| 694 | #define SITAR_A_CDC_MBHC_VOLT_B2_CTL (0x3D1) |
| 695 | #define SITAR_A_CDC_MBHC_VOLT_B2_CTL__POR (0x00000000) |
| 696 | #define SITAR_A_CDC_MBHC_VOLT_B3_CTL (0x3D2) |
| 697 | #define SITAR_A_CDC_MBHC_VOLT_B3_CTL__POR (0x00000000) |
| 698 | #define SITAR_A_CDC_MBHC_VOLT_B4_CTL (0x3D3) |
| 699 | #define SITAR_A_CDC_MBHC_VOLT_B4_CTL__POR (0x00000000) |
| 700 | #define SITAR_A_CDC_MBHC_VOLT_B5_CTL (0x3D4) |
| 701 | #define SITAR_A_CDC_MBHC_VOLT_B5_CTL__POR (0x00000000) |
| 702 | #define SITAR_A_CDC_MBHC_VOLT_B6_CTL (0x3D5) |
| 703 | #define SITAR_A_CDC_MBHC_VOLT_B6_CTL__POR (0x00000000) |
| 704 | #define SITAR_A_CDC_MBHC_VOLT_B7_CTL (0x3D6) |
| 705 | #define SITAR_A_CDC_MBHC_VOLT_B7_CTL__POR (0x000000ff) |
| 706 | #define SITAR_A_CDC_MBHC_VOLT_B8_CTL (0x3D7) |
| 707 | #define SITAR_A_CDC_MBHC_VOLT_B8_CTL__POR (0x00000007) |
| 708 | #define SITAR_A_CDC_MBHC_VOLT_B9_CTL (0x3D8) |
| 709 | #define SITAR_A_CDC_MBHC_VOLT_B9_CTL__POR (0x000000ff) |
| 710 | #define SITAR_A_CDC_MBHC_VOLT_B10_CTL (0x3D9) |
| 711 | #define SITAR_A_CDC_MBHC_VOLT_B10_CTL__POR (0x0000007f) |
| 712 | #define SITAR_A_CDC_MBHC_VOLT_B11_CTL (0x3DA) |
| 713 | #define SITAR_A_CDC_MBHC_VOLT_B11_CTL__POR (0x00000000) |
| 714 | #define SITAR_A_CDC_MBHC_VOLT_B12_CTL (0x3DB) |
| 715 | #define SITAR_A_CDC_MBHC_VOLT_B12_CTL__POR (0x00000080) |
| 716 | #define SITAR_A_CDC_MBHC_CLK_CTL (0x3DC) |
| 717 | #define SITAR_A_CDC_MBHC_CLK_CTL__POR (0x00000000) |
| 718 | #define SITAR_A_CDC_MBHC_INT_CTL (0x3DD) |
| 719 | #define SITAR_A_CDC_MBHC_INT_CTL__POR (0x00000000) |
| 720 | #define SITAR_A_CDC_MBHC_DEBUG_CTL (0x3DE) |
| 721 | #define SITAR_A_CDC_MBHC_DEBUG_CTL__POR (0x00000000) |
| 722 | #define SITAR_A_CDC_MBHC_SPARE (0x3DF) |
| 723 | #define SITAR_A_CDC_MBHC_SPARE__POR (0x00000000) |
| 724 | /* SLIMBUS Slave Registers */ |
| 725 | #define SITAR_SLIM_PGD_PORT_INT_EN0 (0x30) |
| 726 | #define SITAR_SLIM_PGD_PORT_INT_STATUS0 (0x34) |
| 727 | #define SITAR_SLIM_PGD_PORT_INT_CLR0 (0x38) |
| 728 | #define SITAR_SLIM_PGD_PORT_INT_SOURCE0 (0x60) |
| 729 | |
| 730 | /* Macros for Packing Register Writes into a U32 */ |
| 731 | #define SITAR_PACKED_REG_SIZE sizeof(u32) |
| 732 | |
| 733 | #define SITAR_CODEC_PACK_ENTRY(reg, mask, val) ((val & 0xff)|\ |
| 734 | ((mask & 0xff) << 8)|((reg & 0xffff) << 16)) |
| 735 | |
| 736 | #define SITAR_CODEC_UNPACK_ENTRY(packed, reg, mask, val) \ |
| 737 | do { \ |
| 738 | ((reg) = ((packed >> 16) & (0xffff))); \ |
| 739 | ((mask) = ((packed >> 8) & (0xff))); \ |
| 740 | ((val) = ((packed) & (0xff))); \ |
| 741 | } while (0); |
| 742 | #endif |