Adrian Salido-Moreno | 4522894 | 2012-08-13 16:19:18 -0700 | [diff] [blame] | 1 | Qualcomm MDSS MDP |
| 2 | |
| 3 | MDSS is Mobile Display SubSystem which implements Linux framebuffer APIs to |
| 4 | drive user interface to different panel interfaces. MDP driver is the core of |
| 5 | MDSS which manage all data paths to different panel interfaces. |
| 6 | |
| 7 | Required properties |
| 8 | - compatible : Must be "qcom,mdss_mdp" |
| 9 | - reg : offset and length of the register set for the device. |
| 10 | - reg-names : names to refer to register sets related to this device |
| 11 | - interrupts : Interrupt associated with MDSS. |
| 12 | - vdd-supply : Phandle for vdd regulator device node. |
Adrian Salido-Moreno | 2a22865 | 2012-10-01 11:17:33 -0700 | [diff] [blame] | 13 | - qcom,max-clk-rate: Specify maximum MDP core clock rate in hz that this |
| 14 | device supports. |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 15 | - qcom,mdss-pipe-vig-off: Array of offset for MDP source surface pipes of |
| 16 | type VIG, the offsets are calculated from |
| 17 | register "mdp_phys" defined in reg property. |
| 18 | The number of offsets defined here should |
| 19 | reflect the amount of VIG pipes that can be |
| 20 | active in MDP for this configuration. |
| 21 | - qcom,mdss-pipe-vig-fetch-id: Array of shared memory pool fetch ids |
| 22 | corresponding to the VIG pipe offsets defined in |
| 23 | previous property, the amount of fetch ids |
| 24 | defined should match the number of offsets |
| 25 | defined in property: qcom,mdss-pipe-vig-off |
| 26 | - qcom,mdss-pipe-rgb-off: Array of offsets for MDP source surface pipes of |
| 27 | type RGB, the offsets are calculated from |
| 28 | register "mdp_phys" defined in reg property. |
| 29 | The number of offsets defined here should |
| 30 | reflect the amount of RGB pipes that can be |
| 31 | active in MDP for this configuration. |
| 32 | - qcom,mdss-pipe-rgb-fetch-id: Array of shared memory pool fetch ids |
| 33 | corresponding to the RGB pipe offsets defined in |
| 34 | previous property, the amount of fetch ids |
| 35 | defined should match the number of offsets |
| 36 | defined in property: qcom,mdss-pipe-rgb-off |
| 37 | - qcom,mdss-pipe-dma-off: Array of offsets for MDP source surface pipes of |
| 38 | type DMA, the offsets are calculated from |
| 39 | register "mdp_phys" defined in reg property. |
| 40 | The number of offsets defined here should |
| 41 | reflect the amount of DMA pipes that can be |
| 42 | active in MDP for this configuration. |
| 43 | - qcom,mdss-pipe-dma-fetch-id: Array of shared memory pool fetch ids |
| 44 | corresponding to the DMA pipe offsets defined in |
| 45 | previous property, the amount of fetch ids |
| 46 | defined should match the number of offsets |
| 47 | defined in property: qcom,mdss-pipe-dma-off |
Sree Sesha Aravind Vadrevu | 6dc413b | 2013-02-27 17:02:04 -0800 | [diff] [blame] | 48 | - qcom,mdss-smp-data: Array of shared memory pool data. There should |
| 49 | be only two values in this property. The first |
| 50 | value corresponds to the number of smp blocks |
| 51 | and the second is the size of each block |
| 52 | present in the mdss hardware. |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 53 | - qcom,mdss-ctl-off: Array of offset addresses for the available ctl |
| 54 | hw blocks within MDP, these offsets are |
| 55 | calculated from register "mdp_phys" defined in |
| 56 | reg property. The number of ctl offsets defined |
| 57 | here should reflect the number of control paths |
| 58 | that can be configured concurrently on MDP for |
| 59 | this configuration. |
| 60 | - qcom,mdss-wb-off: Array of offset addresses for the progammable |
| 61 | writeback blocks within MDP. The number of |
| 62 | offsets defined should match the number of ctl |
| 63 | blocks defined in property: qcom,mdss-ctl-off |
| 64 | - qcom,mdss-mixer-intf-off: Array of offset addresses for the available |
| 65 | mixer blocks that can drive data to panel |
| 66 | interfaces. |
| 67 | These offsets are be calculated from register |
| 68 | "mdp_phys" defined in reg property. |
| 69 | The number of offsets defined should reflect the |
| 70 | amount of mixers that can drive data to a panel |
| 71 | interface. |
| 72 | - qcom,mdss-dspp-off: Array of offset addresses for the available dspp |
| 73 | blocks. These offsets are calculated from |
| 74 | regsiter "mdp_phys" defined in reg property. |
| 75 | The number of dspp blocks should match the |
| 76 | number of mixers driving data to interface |
| 77 | defined in property: qcom,mdss-mixer-intf-off |
Siddhartha Agrawal | 98f415c | 2013-03-26 16:58:01 -0700 | [diff] [blame] | 78 | - qcom,mdss-pingpong-off: Array of offset addresses for the available |
| 79 | pingpong blocks. These offsets are calculated |
| 80 | from regsiter "mdp_phys" defined in reg property. |
| 81 | The number of pingpong blocks should match the |
| 82 | number of mixers driving data to interface |
| 83 | defined in property: qcom,mdss-mixer-intf-off |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 84 | - qcom,mdss-mixer-wb-off: Array of offset addresses for the available |
| 85 | mixer blocks that can be drive data to writeback |
| 86 | block. These offsets will be calculated from |
| 87 | register "mdp_phys" defined in reg property. |
| 88 | The number of writeback mixer offsets defined |
| 89 | should reflect the number of mixers that can |
| 90 | drive data to a writeback block. |
Adrian Salido-Moreno | 2604550 | 2013-02-05 22:46:01 -0800 | [diff] [blame] | 91 | - qcom,mdss-intf-off: Array of offset addresses for the available MDP |
| 92 | video interface blocks that can drive data to a |
| 93 | panel controller through timing engine. |
| 94 | The offsets are calculated from "mdp_phys" |
| 95 | defined in reg property. The number of offsets |
| 96 | defiend should reflect the number of progammable |
Manoj Rao | b182d13 | 2013-06-19 17:37:50 -0700 | [diff] [blame] | 97 | interface blocks available in hardware. |
| 98 | - qcom,mdss-pref-prim-intf: A string which indicates the configured hardware |
| 99 | interface between MDP and the primary panel. |
| 100 | Individual panel controller drivers initialize |
| 101 | hardware based on this property. |
| 102 | Based on the interfaces supported at present, |
| 103 | possible values are: |
| 104 | - "dsi" |
| 105 | - "edp" |
| 106 | - "hdmi" |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 107 | |
Adrian Salido-Moreno | e2e742b | 2013-02-07 01:54:14 -0800 | [diff] [blame] | 108 | Optional properties: |
Chandan Uddaraju | 29b95f4 | 2013-08-27 20:03:14 -0700 | [diff] [blame] | 109 | - vdd-cx-supply : Phandle for vdd CX regulator device node. |
Ujwal Patel | 954bbbc9 | 2013-08-07 21:52:15 -0700 | [diff] [blame] | 110 | - batfet-supply : Phandle for battery FET regulator device node. |
Adrian Salido-Moreno | e2e742b | 2013-02-07 01:54:14 -0800 | [diff] [blame] | 111 | - qcom,vbif-settings : Array with key-value pairs of constant VBIF register |
| 112 | settings used to setup MDSS QoS for optimum performance. |
| 113 | The key used should be offset from "vbif_phys" register |
| 114 | defined in reg property. |
| 115 | - qcom,mdp-settings : Array with key-value pairs of constant MDP register |
| 116 | settings used to setup MDSS QoS for best performance. |
| 117 | The key used should be offset from "mdp_phys" register |
| 118 | defined in reg property. |
Aravind Venkateswaran | c016353 | 2013-03-18 14:17:12 -0700 | [diff] [blame] | 119 | - qcom,mdss-rot-block-size: The size of a memory block (in pixels) to be used |
| 120 | by the rotator. If this property is not specified, |
| 121 | then a default value of 128 pixels would be used. |
Sree Sesha Aravind Vadrevu | 10c4d77 | 2013-03-28 13:11:12 -0700 | [diff] [blame] | 122 | - qcom,mdss-has-bwc: Boolean property to indicate the presence of bandwidth |
| 123 | compression feature in the rotator. |
Sree Sesha Aravind Vadrevu | 05d4d22 | 2013-04-01 14:31:28 -0700 | [diff] [blame] | 124 | - qcom,mdss-has-decimation: Boolean property to indicate the presence of |
| 125 | decimation feature in fetch. |
Carl Vanderlip | ace4b4b | 2013-04-24 10:09:49 -0700 | [diff] [blame] | 126 | - qcom,mdss-ad-off: Array of offset addresses for the available |
| 127 | Assertive Display (AD) blocks. These offsets |
| 128 | are calculated from the register "mdp_phys" |
| 129 | defined in reg property. The number of AD |
| 130 | offsets should be less than or equal to the |
| 131 | number of mixers driving interfaces defined in |
| 132 | property: qcom,mdss-mixer-intf-off. Assumes |
| 133 | that AD blocks are aligned with the mixer |
| 134 | offsets as well (i.e. the first mixer offset |
| 135 | corresponds to the same pathway as the first |
| 136 | AD offset). |
Sree Sesha Aravind Vadrevu | c6deb39 | 2013-06-07 15:50:49 -0700 | [diff] [blame] | 137 | - qcom,mdss-has-wfd-blk: Boolean property to indicate the presence of dedicated |
| 138 | writeback wfd block in MDSS as opposed to writeback |
| 139 | block that is shared between rotator and wfd. |
Mayank Chopra | 710652b | 2013-06-12 15:58:04 +0530 | [diff] [blame] | 140 | - qcom,mdss-smp-mb-per-pipe: Maximum number of shared memory pool blocks |
| 141 | restricted for a source surface pipe. If this |
| 142 | property is not specified, no such restriction |
| 143 | would be applied. |
Ujwal Patel | 0ced4ec | 2013-09-02 14:33:41 -0700 | [diff] [blame] | 144 | - qcom,mdss-pipe-rgb-fixed-mmb: Array of indexes describing fixed Memory Macro |
| 145 | Blocks (MMBs) for rgb pipes. First value denotes |
| 146 | total numbers of MMBs per pipe while values, if |
| 147 | any, following first one denotes indexes of MMBs |
| 148 | to that RGB pipe. |
Mayank Chopra | 710652b | 2013-06-12 15:58:04 +0530 | [diff] [blame] | 149 | |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 150 | Optional subnodes: |
| 151 | Child nodes representing the frame buffer virtual devices. |
| 152 | |
| 153 | Subnode properties: |
| 154 | - compatible : Must be "qcom,mdss-fb" |
| 155 | - cell-index : Index representing frame buffer |
Sree Sesha Aravind Vadrevu | 465accd | 2013-04-17 18:33:47 -0700 | [diff] [blame] | 156 | - qcom,mdss-mixer-swap: A boolean property that indicates if the mixer muxes |
| 157 | need to be swapped based on the target panel. |
| 158 | By default the property is not defined. |
Huaibin Yang | 581fc63 | 2013-06-13 17:05:23 -0700 | [diff] [blame] | 159 | - qcom,mdss-fb-split: Array of splitted framebuffer size. There should |
| 160 | be only two values in this property. The values |
| 161 | correspond to the left and right size respectively. |
| 162 | MDP muxes two mixer output together before sending to |
| 163 | the panel interface and these values are used to set |
| 164 | each mixer width, so the sum of these two values |
| 165 | should be equal to the panel x-resolution. |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 166 | |
Huaibin Yang | 581fc63 | 2013-06-13 17:05:23 -0700 | [diff] [blame] | 167 | Note that if the sum of two values is not equal to |
| 168 | x-resolution or this subnode itself is not defined |
| 169 | in device tree there are two cases: 1)split is not |
| 170 | enabled if framebuffer size is less than max mixer |
| 171 | width; 2) the defaut even split is enabled if frambuffer |
| 172 | size is greater than max mixer width. |
Siddhartha Agrawal | e6de048 | 2013-07-18 16:30:27 -0700 | [diff] [blame] | 173 | - qcom,memblock-reserve: Specifies the memory location and the size reserved |
| 174 | for the framebuffer used to display the splash screen. |
| 175 | This property is required whenever the continuous splash |
| 176 | screen feature is enabled for the corresponding |
| 177 | framebuffer device. |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 178 | |
Adrian Salido-Moreno | 4522894 | 2012-08-13 16:19:18 -0700 | [diff] [blame] | 179 | Example: |
Manoj Rao | 702a043 | 2013-08-12 22:58:27 -0700 | [diff] [blame] | 180 | mdss_mdp: qcom,mdss_mdp@fd900000 { |
Adrian Salido-Moreno | 4522894 | 2012-08-13 16:19:18 -0700 | [diff] [blame] | 181 | compatible = "qcom,mdss_mdp"; |
| 182 | reg = <0xfd900000 0x22100>, |
| 183 | <0xfd924000 0x1000>; |
| 184 | reg-names = "mdp_phys", "vbif_phys"; |
| 185 | interrupts = <0 72 0>; |
| 186 | vdd-supply = <&gdsc_mdss>; |
Chandan Uddaraju | 29b95f4 | 2013-08-27 20:03:14 -0700 | [diff] [blame] | 187 | vdd-cx-supply = <&pm8841_s2_corner>; |
Ujwal Patel | 954bbbc9 | 2013-08-07 21:52:15 -0700 | [diff] [blame] | 188 | batfet-supply = <&pm8941_chg_batif>; |
Adrian Salido-Moreno | 2a22865 | 2012-10-01 11:17:33 -0700 | [diff] [blame] | 189 | qcom,max-clk-rate = <320000000>; |
Adrian Salido-Moreno | e2e742b | 2013-02-07 01:54:14 -0800 | [diff] [blame] | 190 | qcom,vbif-settings = <0x0004 0x00000001>, |
| 191 | <0x00D8 0x00000707>; |
| 192 | qcom,mdp-settings = <0x02E0 0x000000AA>, |
| 193 | <0x02E4 0x00000055>; |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 194 | qcom,mdss-pipe-vig-off = <0x00001200 0x00001600 |
| 195 | 0x00001A00>; |
| 196 | qcom,mdss-pipe-rgb-off = <0x00001E00 0x00002200 |
| 197 | 0x00002600>; |
| 198 | qcom,mdss-pipe-dma-off = <0x00002A00 0x00002E00>; |
| 199 | qcom,mdss-pipe-vig-fetch-id = <1 4 7>; |
| 200 | qcom,mdss-pipe-rgb-fetch-id = <16 17 18>; |
| 201 | qcom,mdss-pipe-dma-fetch-id = <10 13>; |
Ujwal Patel | 0ced4ec | 2013-09-02 14:33:41 -0700 | [diff] [blame] | 202 | qcom,mdss-pipe-rgb-fixed-mmb = <2 0 1>, |
| 203 | <2 2 3>, |
| 204 | <2 4 5>, |
| 205 | <2 6 7>; |
Sree Sesha Aravind Vadrevu | 6dc413b | 2013-02-27 17:02:04 -0800 | [diff] [blame] | 206 | qcom,mdss-smp-data = <22 4096>; |
Aravind Venkateswaran | c016353 | 2013-03-18 14:17:12 -0700 | [diff] [blame] | 207 | qcom,mdss-rot-block-size = <64>; |
Mayank Chopra | 710652b | 2013-06-12 15:58:04 +0530 | [diff] [blame] | 208 | qcom,mdss-smp-mb-per-pipe = <2>; |
Manoj Rao | b182d13 | 2013-06-19 17:37:50 -0700 | [diff] [blame] | 209 | qcom,mdss-pref-prim-intf = "dsi"; |
Sree Sesha Aravind Vadrevu | 10c4d77 | 2013-03-28 13:11:12 -0700 | [diff] [blame] | 210 | qcom,mdss-has-bwc; |
Sree Sesha Aravind Vadrevu | 05d4d22 | 2013-04-01 14:31:28 -0700 | [diff] [blame] | 211 | qcom,mdss-has-decimation; |
Sree Sesha Aravind Vadrevu | c6deb39 | 2013-06-07 15:50:49 -0700 | [diff] [blame] | 212 | qcom,mdss-has-wfd-blk; |
Sree Sesha Aravind Vadrevu | 05d4d22 | 2013-04-01 14:31:28 -0700 | [diff] [blame] | 213 | |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 214 | qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800 |
| 215 | 0x00000900 0x0000A00>; |
| 216 | qcom,mdss-mixer-intf-off = <0x00003200 0x00003600 |
| 217 | 0x00003A00>; |
| 218 | qcom,mdss-mixer-wb-off = <0x00003E00 0x00004200>; |
| 219 | qcom,mdss-dspp-off = <0x00004600 0x00004A00 0x00004E00>; |
Siddhartha Agrawal | 98f415c | 2013-03-26 16:58:01 -0700 | [diff] [blame] | 220 | qcom,mdss-pingpong-off = <0x00012D00 0x00012E00 0x00012F00>; |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 221 | qcom,mdss-wb-off = <0x00011100 0x00013100 0x00015100 |
| 222 | 0x00017100 0x00019100>; |
Adrian Salido-Moreno | 2604550 | 2013-02-05 22:46:01 -0800 | [diff] [blame] | 223 | qcom,mdss-intf-off = <0x00021100 0x00021300 |
| 224 | 0x00021500 0x00021700>; |
Sree Sesha Aravind Vadrevu | 8be4b98 | 2013-01-04 14:09:20 -0800 | [diff] [blame] | 225 | |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 226 | mdss_fb0: qcom,mdss_fb_primary { |
| 227 | cell-index = <0>; |
| 228 | compatible = "qcom,mdss-fb"; |
Sree Sesha Aravind Vadrevu | 465accd | 2013-04-17 18:33:47 -0700 | [diff] [blame] | 229 | qcom,mdss-mixer-swap; |
Huaibin Yang | 581fc63 | 2013-06-13 17:05:23 -0700 | [diff] [blame] | 230 | qcom,mdss-fb-split = <480 240> |
Adrian Salido-Moreno | 4fe8106 | 2012-12-04 21:05:03 -0800 | [diff] [blame] | 231 | }; |
Adrian Salido-Moreno | 4522894 | 2012-08-13 16:19:18 -0700 | [diff] [blame] | 232 | }; |
| 233 | |