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Jonas Aaberg5f5663a2011-09-14 09:10:54 +02001/*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
6 */
7#include <linux/io.h>
Linus Walleijb1e3be062011-10-03 09:30:20 +02008#include <linux/errno.h>
Jonas Aaberg5f5663a2011-09-14 09:10:54 +02009#include <linux/clksrc-dbx500-prcmu.h>
10
11#include <asm/localtimer.h>
12
13#include <plat/mtu.h>
14
15#include <mach/setup.h>
16#include <mach/hardware.h>
17
18static void __init ux500_timer_init(void)
19{
Linus Walleijb9576622012-01-11 09:46:59 +010020 void __iomem *mtu_timer_base;
Linus Walleijb1e3be062011-10-03 09:30:20 +020021 void __iomem *prcmu_timer_base;
22
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020023 if (cpu_is_u5500()) {
24#ifdef CONFIG_LOCAL_TIMERS
25 twd_base = __io_address(U5500_TWD_BASE);
26#endif
Linus Walleijb9576622012-01-11 09:46:59 +010027 mtu_timer_base = __io_address(U5500_MTU0_BASE);
Linus Walleijb1e3be062011-10-03 09:30:20 +020028 prcmu_timer_base = __io_address(U5500_PRCMU_TIMER_3_BASE);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020029 } else if (cpu_is_u8500()) {
30#ifdef CONFIG_LOCAL_TIMERS
31 twd_base = __io_address(U8500_TWD_BASE);
32#endif
Linus Walleijb9576622012-01-11 09:46:59 +010033 mtu_timer_base = __io_address(U8500_MTU0_BASE);
Linus Walleijb1e3be062011-10-03 09:30:20 +020034 prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020035 } else {
36 ux500_unknown_soc();
37 }
38
39 /*
40 * Here we register the timerblocks active in the system.
41 * Localtimers (twd) is started when both cpu is up and running.
42 * MTU register a clocksource, clockevent and sched_clock.
43 * Since the MTU is located in the VAPE power domain
44 * it will be cleared in sleep which makes it unsuitable.
45 * We however need it as a timer tick (clockevent)
46 * during boot to calibrate delay until twd is started.
47 * RTC-RTT have problems as timer tick during boot since it is
48 * depending on delay which is not yet calibrated. RTC-RTT is in the
49 * always-on powerdomain and is used as clockevent instead of twd when
50 * sleeping.
51 * The PRCMU timer 4(3 for DB5500) register a clocksource and
52 * sched_clock with higher rating then MTU since is always-on.
53 *
54 */
55
Linus Walleijb9576622012-01-11 09:46:59 +010056 nmdk_timer_init(mtu_timer_base);
Linus Walleijb1e3be062011-10-03 09:30:20 +020057 clksrc_dbx500_prcmu_init(prcmu_timer_base);
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020058}
59
Jonas Aabergbb219db2011-09-21 07:47:02 +020060static void ux500_timer_reset(void)
61{
62 nmdk_clkevt_reset();
63 nmdk_clksrc_reset();
64}
65
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020066struct sys_timer ux500_timer = {
67 .init = ux500_timer_init,
Jonas Aabergbb219db2011-09-21 07:47:02 +020068 .resume = ux500_timer_reset,
Jonas Aaberg5f5663a2011-09-14 09:10:54 +020069};