Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1 | /* |
| 2 | * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver |
| 3 | * |
| 4 | * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 11 | #include <linux/delay.h> |
| 12 | #include <linux/highmem.h> |
| 13 | #include <linux/pci.h> |
| 14 | #include <linux/dma-mapping.h> |
| 15 | |
| 16 | #include <linux/mmc/host.h> |
| 17 | #include <linux/mmc/protocol.h> |
| 18 | |
| 19 | #include <asm/scatterlist.h> |
| 20 | |
| 21 | #include "sdhci.h" |
| 22 | |
| 23 | #define DRIVER_NAME "sdhci" |
| 24 | #define DRIVER_VERSION "0.11" |
| 25 | |
| 26 | #define BUGMAIL "<sdhci-devel@list.drzeus.cx>" |
| 27 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 28 | #define DBG(f, x...) \ |
Russell King | c656317 | 2006-03-29 09:30:20 +0100 | [diff] [blame] | 29 | pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 30 | |
| 31 | static const struct pci_device_id pci_ids[] __devinitdata = { |
| 32 | /* handle any SD host controller */ |
| 33 | {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)}, |
| 34 | { /* end: all zeroes */ }, |
| 35 | }; |
| 36 | |
| 37 | MODULE_DEVICE_TABLE(pci, pci_ids); |
| 38 | |
| 39 | static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *); |
| 40 | static void sdhci_finish_data(struct sdhci_host *); |
| 41 | |
| 42 | static void sdhci_send_command(struct sdhci_host *, struct mmc_command *); |
| 43 | static void sdhci_finish_command(struct sdhci_host *); |
| 44 | |
| 45 | static void sdhci_dumpregs(struct sdhci_host *host) |
| 46 | { |
| 47 | printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n"); |
| 48 | |
| 49 | printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n", |
| 50 | readl(host->ioaddr + SDHCI_DMA_ADDRESS), |
| 51 | readw(host->ioaddr + SDHCI_HOST_VERSION)); |
| 52 | printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n", |
| 53 | readw(host->ioaddr + SDHCI_BLOCK_SIZE), |
| 54 | readw(host->ioaddr + SDHCI_BLOCK_COUNT)); |
| 55 | printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n", |
| 56 | readl(host->ioaddr + SDHCI_ARGUMENT), |
| 57 | readw(host->ioaddr + SDHCI_TRANSFER_MODE)); |
| 58 | printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n", |
| 59 | readl(host->ioaddr + SDHCI_PRESENT_STATE), |
| 60 | readb(host->ioaddr + SDHCI_HOST_CONTROL)); |
| 61 | printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n", |
| 62 | readb(host->ioaddr + SDHCI_POWER_CONTROL), |
| 63 | readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL)); |
| 64 | printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n", |
| 65 | readb(host->ioaddr + SDHCI_WALK_UP_CONTROL), |
| 66 | readw(host->ioaddr + SDHCI_CLOCK_CONTROL)); |
| 67 | printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n", |
| 68 | readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL), |
| 69 | readl(host->ioaddr + SDHCI_INT_STATUS)); |
| 70 | printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n", |
| 71 | readl(host->ioaddr + SDHCI_INT_ENABLE), |
| 72 | readl(host->ioaddr + SDHCI_SIGNAL_ENABLE)); |
| 73 | printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n", |
| 74 | readw(host->ioaddr + SDHCI_ACMD12_ERR), |
| 75 | readw(host->ioaddr + SDHCI_SLOT_INT_STATUS)); |
| 76 | printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n", |
| 77 | readl(host->ioaddr + SDHCI_CAPABILITIES), |
| 78 | readl(host->ioaddr + SDHCI_MAX_CURRENT)); |
| 79 | |
| 80 | printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n"); |
| 81 | } |
| 82 | |
| 83 | /*****************************************************************************\ |
| 84 | * * |
| 85 | * Low level functions * |
| 86 | * * |
| 87 | \*****************************************************************************/ |
| 88 | |
| 89 | static void sdhci_reset(struct sdhci_host *host, u8 mask) |
| 90 | { |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 91 | unsigned long timeout; |
| 92 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 93 | writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET); |
| 94 | |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 95 | if (mask & SDHCI_RESET_ALL) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 96 | host->clock = 0; |
| 97 | |
Pierre Ossman | e16514d | 2006-06-30 02:22:24 -0700 | [diff] [blame] | 98 | /* Wait max 100 ms */ |
| 99 | timeout = 100; |
| 100 | |
| 101 | /* hw clears the bit when it's done */ |
| 102 | while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) { |
| 103 | if (timeout == 0) { |
| 104 | printk(KERN_ERR "%s: Reset 0x%x never completed. " |
| 105 | "Please report this to " BUGMAIL ".\n", |
| 106 | mmc_hostname(host->mmc), (int)mask); |
| 107 | sdhci_dumpregs(host); |
| 108 | return; |
| 109 | } |
| 110 | timeout--; |
| 111 | mdelay(1); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 112 | } |
| 113 | } |
| 114 | |
| 115 | static void sdhci_init(struct sdhci_host *host) |
| 116 | { |
| 117 | u32 intmask; |
| 118 | |
| 119 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 120 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 121 | intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | |
| 122 | SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | |
| 123 | SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT | |
| 124 | SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 125 | SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 126 | SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 127 | |
| 128 | writel(intmask, host->ioaddr + SDHCI_INT_ENABLE); |
| 129 | writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | static void sdhci_activate_led(struct sdhci_host *host) |
| 133 | { |
| 134 | u8 ctrl; |
| 135 | |
| 136 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
| 137 | ctrl |= SDHCI_CTRL_LED; |
| 138 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 139 | } |
| 140 | |
| 141 | static void sdhci_deactivate_led(struct sdhci_host *host) |
| 142 | { |
| 143 | u8 ctrl; |
| 144 | |
| 145 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
| 146 | ctrl &= ~SDHCI_CTRL_LED; |
| 147 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 148 | } |
| 149 | |
| 150 | /*****************************************************************************\ |
| 151 | * * |
| 152 | * Core functions * |
| 153 | * * |
| 154 | \*****************************************************************************/ |
| 155 | |
| 156 | static inline char* sdhci_kmap_sg(struct sdhci_host* host) |
| 157 | { |
| 158 | host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ); |
| 159 | return host->mapped_sg + host->cur_sg->offset; |
| 160 | } |
| 161 | |
| 162 | static inline void sdhci_kunmap_sg(struct sdhci_host* host) |
| 163 | { |
| 164 | kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ); |
| 165 | } |
| 166 | |
| 167 | static inline int sdhci_next_sg(struct sdhci_host* host) |
| 168 | { |
| 169 | /* |
| 170 | * Skip to next SG entry. |
| 171 | */ |
| 172 | host->cur_sg++; |
| 173 | host->num_sg--; |
| 174 | |
| 175 | /* |
| 176 | * Any entries left? |
| 177 | */ |
| 178 | if (host->num_sg > 0) { |
| 179 | host->offset = 0; |
| 180 | host->remain = host->cur_sg->length; |
| 181 | } |
| 182 | |
| 183 | return host->num_sg; |
| 184 | } |
| 185 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 186 | static void sdhci_read_block_pio(struct sdhci_host *host) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 187 | { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 188 | int blksize, chunk_remain; |
| 189 | u32 data; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 190 | char *buffer; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 191 | int size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 192 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 193 | DBG("PIO reading\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 194 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 195 | blksize = host->data->blksz; |
| 196 | chunk_remain = 0; |
| 197 | data = 0; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 198 | |
| 199 | buffer = sdhci_kmap_sg(host) + host->offset; |
| 200 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 201 | while (blksize) { |
| 202 | if (chunk_remain == 0) { |
| 203 | data = readl(host->ioaddr + SDHCI_BUFFER); |
| 204 | chunk_remain = min(blksize, 4); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 205 | } |
| 206 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 207 | size = min(host->size, host->remain); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 208 | size = min(size, chunk_remain); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 209 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 210 | chunk_remain -= size; |
| 211 | blksize -= size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 212 | host->offset += size; |
| 213 | host->remain -= size; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 214 | host->size -= size; |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 215 | while (size) { |
| 216 | *buffer = data & 0xFF; |
| 217 | buffer++; |
| 218 | data >>= 8; |
| 219 | size--; |
| 220 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 221 | |
| 222 | if (host->remain == 0) { |
| 223 | sdhci_kunmap_sg(host); |
| 224 | if (sdhci_next_sg(host) == 0) { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 225 | BUG_ON(blksize != 0); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 226 | return; |
| 227 | } |
| 228 | buffer = sdhci_kmap_sg(host); |
| 229 | } |
| 230 | } |
| 231 | |
| 232 | sdhci_kunmap_sg(host); |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 233 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 234 | |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 235 | static void sdhci_write_block_pio(struct sdhci_host *host) |
| 236 | { |
| 237 | int blksize, chunk_remain; |
| 238 | u32 data; |
| 239 | char *buffer; |
| 240 | int bytes, size; |
| 241 | |
| 242 | DBG("PIO writing\n"); |
| 243 | |
| 244 | blksize = host->data->blksz; |
| 245 | chunk_remain = 4; |
| 246 | data = 0; |
| 247 | |
| 248 | bytes = 0; |
| 249 | buffer = sdhci_kmap_sg(host) + host->offset; |
| 250 | |
| 251 | while (blksize) { |
| 252 | size = min(host->size, host->remain); |
| 253 | size = min(size, chunk_remain); |
| 254 | |
| 255 | chunk_remain -= size; |
| 256 | blksize -= size; |
| 257 | host->offset += size; |
| 258 | host->remain -= size; |
| 259 | host->size -= size; |
| 260 | while (size) { |
| 261 | data >>= 8; |
| 262 | data |= (u32)*buffer << 24; |
| 263 | buffer++; |
| 264 | size--; |
| 265 | } |
| 266 | |
| 267 | if (chunk_remain == 0) { |
| 268 | writel(data, host->ioaddr + SDHCI_BUFFER); |
| 269 | chunk_remain = min(blksize, 4); |
| 270 | } |
| 271 | |
| 272 | if (host->remain == 0) { |
| 273 | sdhci_kunmap_sg(host); |
| 274 | if (sdhci_next_sg(host) == 0) { |
| 275 | BUG_ON(blksize != 0); |
| 276 | return; |
| 277 | } |
| 278 | buffer = sdhci_kmap_sg(host); |
| 279 | } |
| 280 | } |
| 281 | |
| 282 | sdhci_kunmap_sg(host); |
| 283 | } |
| 284 | |
| 285 | static void sdhci_transfer_pio(struct sdhci_host *host) |
| 286 | { |
| 287 | u32 mask; |
| 288 | |
| 289 | BUG_ON(!host->data); |
| 290 | |
| 291 | if (host->size == 0) |
| 292 | return; |
| 293 | |
| 294 | if (host->data->flags & MMC_DATA_READ) |
| 295 | mask = SDHCI_DATA_AVAILABLE; |
| 296 | else |
| 297 | mask = SDHCI_SPACE_AVAILABLE; |
| 298 | |
| 299 | while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) { |
| 300 | if (host->data->flags & MMC_DATA_READ) |
| 301 | sdhci_read_block_pio(host); |
| 302 | else |
| 303 | sdhci_write_block_pio(host); |
| 304 | |
| 305 | if (host->size == 0) |
| 306 | break; |
| 307 | |
| 308 | BUG_ON(host->num_sg == 0); |
| 309 | } |
| 310 | |
| 311 | DBG("PIO transfer complete.\n"); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data) |
| 315 | { |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 316 | u8 count; |
| 317 | unsigned target_timeout, current_timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 318 | |
| 319 | WARN_ON(host->data); |
| 320 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 321 | if (data == NULL) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 322 | return; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 323 | |
| 324 | DBG("blksz %04x blks %04x flags %08x\n", |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 325 | data->blksz, data->blocks, data->flags); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 326 | DBG("tsac %d ms nsac %d clk\n", |
| 327 | data->timeout_ns / 1000000, data->timeout_clks); |
| 328 | |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame^] | 329 | /* Sanity checks */ |
| 330 | BUG_ON(data->blksz * data->blocks > 524288); |
| 331 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 332 | /* timeout in us */ |
| 333 | target_timeout = data->timeout_ns / 1000 + |
| 334 | data->timeout_clks / host->clock; |
| 335 | |
| 336 | /* |
| 337 | * Figure out needed cycles. |
| 338 | * We do this in steps in order to fit inside a 32 bit int. |
| 339 | * The first step is the minimum timeout, which will have a |
| 340 | * minimum resolution of 6 bits: |
| 341 | * (1) 2^13*1000 > 2^22, |
| 342 | * (2) host->timeout_clk < 2^16 |
| 343 | * => |
| 344 | * (1) / (2) > 2^6 |
| 345 | */ |
| 346 | count = 0; |
| 347 | current_timeout = (1 << 13) * 1000 / host->timeout_clk; |
| 348 | while (current_timeout < target_timeout) { |
| 349 | count++; |
| 350 | current_timeout <<= 1; |
| 351 | if (count >= 0xF) |
| 352 | break; |
| 353 | } |
| 354 | |
| 355 | if (count >= 0xF) { |
| 356 | printk(KERN_WARNING "%s: Too large timeout requested!\n", |
| 357 | mmc_hostname(host->mmc)); |
| 358 | count = 0xE; |
| 359 | } |
| 360 | |
| 361 | writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL); |
| 362 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 363 | if (host->flags & SDHCI_USE_DMA) { |
| 364 | int count; |
| 365 | |
| 366 | count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len, |
| 367 | (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); |
| 368 | BUG_ON(count != 1); |
| 369 | |
| 370 | writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS); |
| 371 | } else { |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 372 | host->size = data->blksz * data->blocks; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 373 | |
| 374 | host->cur_sg = data->sg; |
| 375 | host->num_sg = data->sg_len; |
| 376 | |
| 377 | host->offset = 0; |
| 378 | host->remain = host->cur_sg->length; |
| 379 | } |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 380 | |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame^] | 381 | /* We do not handle DMA boundaries, so set it to max (512 KiB) */ |
| 382 | writew(SDHCI_MAKE_BLKSZ(7, data->blksz), |
| 383 | host->ioaddr + SDHCI_BLOCK_SIZE); |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 384 | writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT); |
| 385 | } |
| 386 | |
| 387 | static void sdhci_set_transfer_mode(struct sdhci_host *host, |
| 388 | struct mmc_data *data) |
| 389 | { |
| 390 | u16 mode; |
| 391 | |
| 392 | WARN_ON(host->data); |
| 393 | |
| 394 | if (data == NULL) |
| 395 | return; |
| 396 | |
| 397 | mode = SDHCI_TRNS_BLK_CNT_EN; |
| 398 | if (data->blocks > 1) |
| 399 | mode |= SDHCI_TRNS_MULTI; |
| 400 | if (data->flags & MMC_DATA_READ) |
| 401 | mode |= SDHCI_TRNS_READ; |
| 402 | if (host->flags & SDHCI_USE_DMA) |
| 403 | mode |= SDHCI_TRNS_DMA; |
| 404 | |
| 405 | writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 406 | } |
| 407 | |
| 408 | static void sdhci_finish_data(struct sdhci_host *host) |
| 409 | { |
| 410 | struct mmc_data *data; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 411 | u16 blocks; |
| 412 | |
| 413 | BUG_ON(!host->data); |
| 414 | |
| 415 | data = host->data; |
| 416 | host->data = NULL; |
| 417 | |
| 418 | if (host->flags & SDHCI_USE_DMA) { |
| 419 | pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len, |
| 420 | (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | /* |
| 424 | * Controller doesn't count down when in single block mode. |
| 425 | */ |
| 426 | if ((data->blocks == 1) && (data->error == MMC_ERR_NONE)) |
| 427 | blocks = 0; |
| 428 | else |
| 429 | blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT); |
Russell King | a3fd4a1 | 2006-06-04 17:51:15 +0100 | [diff] [blame] | 430 | data->bytes_xfered = data->blksz * (data->blocks - blocks); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 431 | |
| 432 | if ((data->error == MMC_ERR_NONE) && blocks) { |
| 433 | printk(KERN_ERR "%s: Controller signalled completion even " |
| 434 | "though there were blocks left. Please report this " |
| 435 | "to " BUGMAIL ".\n", mmc_hostname(host->mmc)); |
| 436 | data->error = MMC_ERR_FAILED; |
| 437 | } |
| 438 | |
| 439 | if (host->size != 0) { |
| 440 | printk(KERN_ERR "%s: %d bytes were left untransferred. " |
| 441 | "Please report this to " BUGMAIL ".\n", |
| 442 | mmc_hostname(host->mmc), host->size); |
| 443 | data->error = MMC_ERR_FAILED; |
| 444 | } |
| 445 | |
| 446 | DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered); |
| 447 | |
| 448 | if (data->stop) { |
| 449 | /* |
| 450 | * The controller needs a reset of internal state machines |
| 451 | * upon error conditions. |
| 452 | */ |
| 453 | if (data->error != MMC_ERR_NONE) { |
| 454 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 455 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 456 | } |
| 457 | |
| 458 | sdhci_send_command(host, data->stop); |
| 459 | } else |
| 460 | tasklet_schedule(&host->finish_tasklet); |
| 461 | } |
| 462 | |
| 463 | static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) |
| 464 | { |
| 465 | int flags; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 466 | unsigned long timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 467 | |
| 468 | WARN_ON(host->cmd); |
| 469 | |
| 470 | DBG("Sending cmd (%x)\n", cmd->opcode); |
| 471 | |
| 472 | /* Wait max 10 ms */ |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 473 | timeout = 10; |
| 474 | while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & |
| 475 | (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) { |
| 476 | if (timeout == 0) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 477 | printk(KERN_ERR "%s: Controller never released " |
| 478 | "inhibit bits. Please report this to " |
| 479 | BUGMAIL ".\n", mmc_hostname(host->mmc)); |
| 480 | sdhci_dumpregs(host); |
| 481 | cmd->error = MMC_ERR_FAILED; |
| 482 | tasklet_schedule(&host->finish_tasklet); |
| 483 | return; |
| 484 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 485 | timeout--; |
| 486 | mdelay(1); |
| 487 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 488 | |
| 489 | mod_timer(&host->timer, jiffies + 10 * HZ); |
| 490 | |
| 491 | host->cmd = cmd; |
| 492 | |
| 493 | sdhci_prepare_data(host, cmd->data); |
| 494 | |
| 495 | writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT); |
| 496 | |
Pierre Ossman | c7fa996 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 497 | sdhci_set_transfer_mode(host, cmd->data); |
| 498 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 499 | if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { |
| 500 | printk(KERN_ERR "%s: Unsupported response type! " |
| 501 | "Please report this to " BUGMAIL ".\n", |
| 502 | mmc_hostname(host->mmc)); |
| 503 | cmd->error = MMC_ERR_INVALID; |
| 504 | tasklet_schedule(&host->finish_tasklet); |
| 505 | return; |
| 506 | } |
| 507 | |
| 508 | if (!(cmd->flags & MMC_RSP_PRESENT)) |
| 509 | flags = SDHCI_CMD_RESP_NONE; |
| 510 | else if (cmd->flags & MMC_RSP_136) |
| 511 | flags = SDHCI_CMD_RESP_LONG; |
| 512 | else if (cmd->flags & MMC_RSP_BUSY) |
| 513 | flags = SDHCI_CMD_RESP_SHORT_BUSY; |
| 514 | else |
| 515 | flags = SDHCI_CMD_RESP_SHORT; |
| 516 | |
| 517 | if (cmd->flags & MMC_RSP_CRC) |
| 518 | flags |= SDHCI_CMD_CRC; |
| 519 | if (cmd->flags & MMC_RSP_OPCODE) |
| 520 | flags |= SDHCI_CMD_INDEX; |
| 521 | if (cmd->data) |
| 522 | flags |= SDHCI_CMD_DATA; |
| 523 | |
| 524 | writel(SDHCI_MAKE_CMD(cmd->opcode, flags), |
| 525 | host->ioaddr + SDHCI_COMMAND); |
| 526 | } |
| 527 | |
| 528 | static void sdhci_finish_command(struct sdhci_host *host) |
| 529 | { |
| 530 | int i; |
| 531 | |
| 532 | BUG_ON(host->cmd == NULL); |
| 533 | |
| 534 | if (host->cmd->flags & MMC_RSP_PRESENT) { |
| 535 | if (host->cmd->flags & MMC_RSP_136) { |
| 536 | /* CRC is stripped so we need to do some shifting. */ |
| 537 | for (i = 0;i < 4;i++) { |
| 538 | host->cmd->resp[i] = readl(host->ioaddr + |
| 539 | SDHCI_RESPONSE + (3-i)*4) << 8; |
| 540 | if (i != 3) |
| 541 | host->cmd->resp[i] |= |
| 542 | readb(host->ioaddr + |
| 543 | SDHCI_RESPONSE + (3-i)*4-1); |
| 544 | } |
| 545 | } else { |
| 546 | host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE); |
| 547 | } |
| 548 | } |
| 549 | |
| 550 | host->cmd->error = MMC_ERR_NONE; |
| 551 | |
| 552 | DBG("Ending cmd (%x)\n", host->cmd->opcode); |
| 553 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 554 | if (host->cmd->data) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 555 | host->data = host->cmd->data; |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 556 | else |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 557 | tasklet_schedule(&host->finish_tasklet); |
| 558 | |
| 559 | host->cmd = NULL; |
| 560 | } |
| 561 | |
| 562 | static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) |
| 563 | { |
| 564 | int div; |
| 565 | u16 clk; |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 566 | unsigned long timeout; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 567 | |
| 568 | if (clock == host->clock) |
| 569 | return; |
| 570 | |
| 571 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 572 | |
| 573 | if (clock == 0) |
| 574 | goto out; |
| 575 | |
| 576 | for (div = 1;div < 256;div *= 2) { |
| 577 | if ((host->max_clk / div) <= clock) |
| 578 | break; |
| 579 | } |
| 580 | div >>= 1; |
| 581 | |
| 582 | clk = div << SDHCI_DIVIDER_SHIFT; |
| 583 | clk |= SDHCI_CLOCK_INT_EN; |
| 584 | writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 585 | |
| 586 | /* Wait max 10 ms */ |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 587 | timeout = 10; |
| 588 | while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL)) |
| 589 | & SDHCI_CLOCK_INT_STABLE)) { |
| 590 | if (timeout == 0) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 591 | printk(KERN_ERR "%s: Internal clock never stabilised. " |
| 592 | "Please report this to " BUGMAIL ".\n", |
| 593 | mmc_hostname(host->mmc)); |
| 594 | sdhci_dumpregs(host); |
| 595 | return; |
| 596 | } |
Pierre Ossman | 7cb2c76 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 597 | timeout--; |
| 598 | mdelay(1); |
| 599 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 600 | |
| 601 | clk |= SDHCI_CLOCK_CARD_EN; |
| 602 | writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| 603 | |
| 604 | out: |
| 605 | host->clock = clock; |
| 606 | } |
| 607 | |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 608 | static void sdhci_set_power(struct sdhci_host *host, unsigned short power) |
| 609 | { |
| 610 | u8 pwr; |
| 611 | |
| 612 | if (host->power == power) |
| 613 | return; |
| 614 | |
| 615 | writeb(0, host->ioaddr + SDHCI_POWER_CONTROL); |
| 616 | |
| 617 | if (power == (unsigned short)-1) |
| 618 | goto out; |
| 619 | |
| 620 | pwr = SDHCI_POWER_ON; |
| 621 | |
| 622 | switch (power) { |
| 623 | case MMC_VDD_170: |
| 624 | case MMC_VDD_180: |
| 625 | case MMC_VDD_190: |
| 626 | pwr |= SDHCI_POWER_180; |
| 627 | break; |
| 628 | case MMC_VDD_290: |
| 629 | case MMC_VDD_300: |
| 630 | case MMC_VDD_310: |
| 631 | pwr |= SDHCI_POWER_300; |
| 632 | break; |
| 633 | case MMC_VDD_320: |
| 634 | case MMC_VDD_330: |
| 635 | case MMC_VDD_340: |
| 636 | pwr |= SDHCI_POWER_330; |
| 637 | break; |
| 638 | default: |
| 639 | BUG(); |
| 640 | } |
| 641 | |
| 642 | writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL); |
| 643 | |
| 644 | out: |
| 645 | host->power = power; |
| 646 | } |
| 647 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 648 | /*****************************************************************************\ |
| 649 | * * |
| 650 | * MMC callbacks * |
| 651 | * * |
| 652 | \*****************************************************************************/ |
| 653 | |
| 654 | static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 655 | { |
| 656 | struct sdhci_host *host; |
| 657 | unsigned long flags; |
| 658 | |
| 659 | host = mmc_priv(mmc); |
| 660 | |
| 661 | spin_lock_irqsave(&host->lock, flags); |
| 662 | |
| 663 | WARN_ON(host->mrq != NULL); |
| 664 | |
| 665 | sdhci_activate_led(host); |
| 666 | |
| 667 | host->mrq = mrq; |
| 668 | |
| 669 | if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { |
| 670 | host->mrq->cmd->error = MMC_ERR_TIMEOUT; |
| 671 | tasklet_schedule(&host->finish_tasklet); |
| 672 | } else |
| 673 | sdhci_send_command(host, mrq->cmd); |
| 674 | |
| 675 | spin_unlock_irqrestore(&host->lock, flags); |
| 676 | } |
| 677 | |
| 678 | static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 679 | { |
| 680 | struct sdhci_host *host; |
| 681 | unsigned long flags; |
| 682 | u8 ctrl; |
| 683 | |
| 684 | host = mmc_priv(mmc); |
| 685 | |
| 686 | spin_lock_irqsave(&host->lock, flags); |
| 687 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 688 | /* |
| 689 | * Reset the chip on each power off. |
| 690 | * Should clear out any weird states. |
| 691 | */ |
| 692 | if (ios->power_mode == MMC_POWER_OFF) { |
| 693 | writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 694 | sdhci_init(host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 695 | } |
| 696 | |
| 697 | sdhci_set_clock(host, ios->clock); |
| 698 | |
| 699 | if (ios->power_mode == MMC_POWER_OFF) |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 700 | sdhci_set_power(host, -1); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 701 | else |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 702 | sdhci_set_power(host, ios->vdd); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 703 | |
| 704 | ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); |
| 705 | if (ios->bus_width == MMC_BUS_WIDTH_4) |
| 706 | ctrl |= SDHCI_CTRL_4BITBUS; |
| 707 | else |
| 708 | ctrl &= ~SDHCI_CTRL_4BITBUS; |
| 709 | writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); |
| 710 | |
| 711 | spin_unlock_irqrestore(&host->lock, flags); |
| 712 | } |
| 713 | |
| 714 | static int sdhci_get_ro(struct mmc_host *mmc) |
| 715 | { |
| 716 | struct sdhci_host *host; |
| 717 | unsigned long flags; |
| 718 | int present; |
| 719 | |
| 720 | host = mmc_priv(mmc); |
| 721 | |
| 722 | spin_lock_irqsave(&host->lock, flags); |
| 723 | |
| 724 | present = readl(host->ioaddr + SDHCI_PRESENT_STATE); |
| 725 | |
| 726 | spin_unlock_irqrestore(&host->lock, flags); |
| 727 | |
| 728 | return !(present & SDHCI_WRITE_PROTECT); |
| 729 | } |
| 730 | |
| 731 | static struct mmc_host_ops sdhci_ops = { |
| 732 | .request = sdhci_request, |
| 733 | .set_ios = sdhci_set_ios, |
| 734 | .get_ro = sdhci_get_ro, |
| 735 | }; |
| 736 | |
| 737 | /*****************************************************************************\ |
| 738 | * * |
| 739 | * Tasklets * |
| 740 | * * |
| 741 | \*****************************************************************************/ |
| 742 | |
| 743 | static void sdhci_tasklet_card(unsigned long param) |
| 744 | { |
| 745 | struct sdhci_host *host; |
| 746 | unsigned long flags; |
| 747 | |
| 748 | host = (struct sdhci_host*)param; |
| 749 | |
| 750 | spin_lock_irqsave(&host->lock, flags); |
| 751 | |
| 752 | if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) { |
| 753 | if (host->mrq) { |
| 754 | printk(KERN_ERR "%s: Card removed during transfer!\n", |
| 755 | mmc_hostname(host->mmc)); |
| 756 | printk(KERN_ERR "%s: Resetting controller.\n", |
| 757 | mmc_hostname(host->mmc)); |
| 758 | |
| 759 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 760 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 761 | |
| 762 | host->mrq->cmd->error = MMC_ERR_FAILED; |
| 763 | tasklet_schedule(&host->finish_tasklet); |
| 764 | } |
| 765 | } |
| 766 | |
| 767 | spin_unlock_irqrestore(&host->lock, flags); |
| 768 | |
| 769 | mmc_detect_change(host->mmc, msecs_to_jiffies(500)); |
| 770 | } |
| 771 | |
| 772 | static void sdhci_tasklet_finish(unsigned long param) |
| 773 | { |
| 774 | struct sdhci_host *host; |
| 775 | unsigned long flags; |
| 776 | struct mmc_request *mrq; |
| 777 | |
| 778 | host = (struct sdhci_host*)param; |
| 779 | |
| 780 | spin_lock_irqsave(&host->lock, flags); |
| 781 | |
| 782 | del_timer(&host->timer); |
| 783 | |
| 784 | mrq = host->mrq; |
| 785 | |
| 786 | DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode); |
| 787 | |
| 788 | /* |
| 789 | * The controller needs a reset of internal state machines |
| 790 | * upon error conditions. |
| 791 | */ |
| 792 | if ((mrq->cmd->error != MMC_ERR_NONE) || |
| 793 | (mrq->data && ((mrq->data->error != MMC_ERR_NONE) || |
| 794 | (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) { |
| 795 | sdhci_reset(host, SDHCI_RESET_CMD); |
| 796 | sdhci_reset(host, SDHCI_RESET_DATA); |
| 797 | } |
| 798 | |
| 799 | host->mrq = NULL; |
| 800 | host->cmd = NULL; |
| 801 | host->data = NULL; |
| 802 | |
| 803 | sdhci_deactivate_led(host); |
| 804 | |
| 805 | spin_unlock_irqrestore(&host->lock, flags); |
| 806 | |
| 807 | mmc_request_done(host->mmc, mrq); |
| 808 | } |
| 809 | |
| 810 | static void sdhci_timeout_timer(unsigned long data) |
| 811 | { |
| 812 | struct sdhci_host *host; |
| 813 | unsigned long flags; |
| 814 | |
| 815 | host = (struct sdhci_host*)data; |
| 816 | |
| 817 | spin_lock_irqsave(&host->lock, flags); |
| 818 | |
| 819 | if (host->mrq) { |
| 820 | printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. " |
| 821 | "Please report this to " BUGMAIL ".\n", |
| 822 | mmc_hostname(host->mmc)); |
| 823 | sdhci_dumpregs(host); |
| 824 | |
| 825 | if (host->data) { |
| 826 | host->data->error = MMC_ERR_TIMEOUT; |
| 827 | sdhci_finish_data(host); |
| 828 | } else { |
| 829 | if (host->cmd) |
| 830 | host->cmd->error = MMC_ERR_TIMEOUT; |
| 831 | else |
| 832 | host->mrq->cmd->error = MMC_ERR_TIMEOUT; |
| 833 | |
| 834 | tasklet_schedule(&host->finish_tasklet); |
| 835 | } |
| 836 | } |
| 837 | |
| 838 | spin_unlock_irqrestore(&host->lock, flags); |
| 839 | } |
| 840 | |
| 841 | /*****************************************************************************\ |
| 842 | * * |
| 843 | * Interrupt handling * |
| 844 | * * |
| 845 | \*****************************************************************************/ |
| 846 | |
| 847 | static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) |
| 848 | { |
| 849 | BUG_ON(intmask == 0); |
| 850 | |
| 851 | if (!host->cmd) { |
| 852 | printk(KERN_ERR "%s: Got command interrupt even though no " |
| 853 | "command operation was in progress.\n", |
| 854 | mmc_hostname(host->mmc)); |
| 855 | printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n", |
| 856 | mmc_hostname(host->mmc)); |
| 857 | sdhci_dumpregs(host); |
| 858 | return; |
| 859 | } |
| 860 | |
| 861 | if (intmask & SDHCI_INT_RESPONSE) |
| 862 | sdhci_finish_command(host); |
| 863 | else { |
| 864 | if (intmask & SDHCI_INT_TIMEOUT) |
| 865 | host->cmd->error = MMC_ERR_TIMEOUT; |
| 866 | else if (intmask & SDHCI_INT_CRC) |
| 867 | host->cmd->error = MMC_ERR_BADCRC; |
| 868 | else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX)) |
| 869 | host->cmd->error = MMC_ERR_FAILED; |
| 870 | else |
| 871 | host->cmd->error = MMC_ERR_INVALID; |
| 872 | |
| 873 | tasklet_schedule(&host->finish_tasklet); |
| 874 | } |
| 875 | } |
| 876 | |
| 877 | static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) |
| 878 | { |
| 879 | BUG_ON(intmask == 0); |
| 880 | |
| 881 | if (!host->data) { |
| 882 | /* |
| 883 | * A data end interrupt is sent together with the response |
| 884 | * for the stop command. |
| 885 | */ |
| 886 | if (intmask & SDHCI_INT_DATA_END) |
| 887 | return; |
| 888 | |
| 889 | printk(KERN_ERR "%s: Got data interrupt even though no " |
| 890 | "data operation was in progress.\n", |
| 891 | mmc_hostname(host->mmc)); |
| 892 | printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n", |
| 893 | mmc_hostname(host->mmc)); |
| 894 | sdhci_dumpregs(host); |
| 895 | |
| 896 | return; |
| 897 | } |
| 898 | |
| 899 | if (intmask & SDHCI_INT_DATA_TIMEOUT) |
| 900 | host->data->error = MMC_ERR_TIMEOUT; |
| 901 | else if (intmask & SDHCI_INT_DATA_CRC) |
| 902 | host->data->error = MMC_ERR_BADCRC; |
| 903 | else if (intmask & SDHCI_INT_DATA_END_BIT) |
| 904 | host->data->error = MMC_ERR_FAILED; |
| 905 | |
| 906 | if (host->data->error != MMC_ERR_NONE) |
| 907 | sdhci_finish_data(host); |
| 908 | else { |
Pierre Ossman | a406f5a | 2006-07-02 16:50:59 +0100 | [diff] [blame] | 909 | if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 910 | sdhci_transfer_pio(host); |
| 911 | |
| 912 | if (intmask & SDHCI_INT_DATA_END) |
| 913 | sdhci_finish_data(host); |
| 914 | } |
| 915 | } |
| 916 | |
| 917 | static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs) |
| 918 | { |
| 919 | irqreturn_t result; |
| 920 | struct sdhci_host* host = dev_id; |
| 921 | u32 intmask; |
| 922 | |
| 923 | spin_lock(&host->lock); |
| 924 | |
| 925 | intmask = readl(host->ioaddr + SDHCI_INT_STATUS); |
| 926 | |
| 927 | if (!intmask) { |
| 928 | result = IRQ_NONE; |
| 929 | goto out; |
| 930 | } |
| 931 | |
| 932 | DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask); |
| 933 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 934 | if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) { |
| 935 | writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE), |
| 936 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 937 | tasklet_schedule(&host->card_tasklet); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 938 | } |
| 939 | |
| 940 | intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 941 | |
| 942 | if (intmask & SDHCI_INT_CMD_MASK) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 943 | writel(intmask & SDHCI_INT_CMD_MASK, |
| 944 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 945 | sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 946 | } |
| 947 | |
| 948 | if (intmask & SDHCI_INT_DATA_MASK) { |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 949 | writel(intmask & SDHCI_INT_DATA_MASK, |
| 950 | host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 951 | sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 952 | } |
| 953 | |
| 954 | intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); |
| 955 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 956 | if (intmask & SDHCI_INT_BUS_POWER) { |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 957 | printk(KERN_ERR "%s: Card is consuming too much power!\n", |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 958 | mmc_hostname(host->mmc)); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 959 | writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 960 | } |
| 961 | |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 962 | intmask &= SDHCI_INT_BUS_POWER; |
| 963 | |
| 964 | if (intmask) { |
| 965 | printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please " |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 966 | "report this to " BUGMAIL ".\n", |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 967 | mmc_hostname(host->mmc), intmask); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 968 | sdhci_dumpregs(host); |
| 969 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 970 | writel(intmask, host->ioaddr + SDHCI_INT_STATUS); |
Pierre Ossman | 3192a28 | 2006-06-30 02:22:26 -0700 | [diff] [blame] | 971 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 972 | |
| 973 | result = IRQ_HANDLED; |
| 974 | |
| 975 | out: |
| 976 | spin_unlock(&host->lock); |
| 977 | |
| 978 | return result; |
| 979 | } |
| 980 | |
| 981 | /*****************************************************************************\ |
| 982 | * * |
| 983 | * Suspend/resume * |
| 984 | * * |
| 985 | \*****************************************************************************/ |
| 986 | |
| 987 | #ifdef CONFIG_PM |
| 988 | |
| 989 | static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state) |
| 990 | { |
| 991 | struct sdhci_chip *chip; |
| 992 | int i, ret; |
| 993 | |
| 994 | chip = pci_get_drvdata(pdev); |
| 995 | if (!chip) |
| 996 | return 0; |
| 997 | |
| 998 | DBG("Suspending...\n"); |
| 999 | |
| 1000 | for (i = 0;i < chip->num_slots;i++) { |
| 1001 | if (!chip->hosts[i]) |
| 1002 | continue; |
| 1003 | ret = mmc_suspend_host(chip->hosts[i]->mmc, state); |
| 1004 | if (ret) { |
| 1005 | for (i--;i >= 0;i--) |
| 1006 | mmc_resume_host(chip->hosts[i]->mmc); |
| 1007 | return ret; |
| 1008 | } |
| 1009 | } |
| 1010 | |
| 1011 | pci_save_state(pdev); |
| 1012 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); |
| 1013 | pci_disable_device(pdev); |
| 1014 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
| 1015 | |
| 1016 | return 0; |
| 1017 | } |
| 1018 | |
| 1019 | static int sdhci_resume (struct pci_dev *pdev) |
| 1020 | { |
| 1021 | struct sdhci_chip *chip; |
| 1022 | int i, ret; |
| 1023 | |
| 1024 | chip = pci_get_drvdata(pdev); |
| 1025 | if (!chip) |
| 1026 | return 0; |
| 1027 | |
| 1028 | DBG("Resuming...\n"); |
| 1029 | |
| 1030 | pci_set_power_state(pdev, PCI_D0); |
| 1031 | pci_restore_state(pdev); |
| 1032 | pci_enable_device(pdev); |
| 1033 | |
| 1034 | for (i = 0;i < chip->num_slots;i++) { |
| 1035 | if (!chip->hosts[i]) |
| 1036 | continue; |
| 1037 | if (chip->hosts[i]->flags & SDHCI_USE_DMA) |
| 1038 | pci_set_master(pdev); |
| 1039 | sdhci_init(chip->hosts[i]); |
| 1040 | ret = mmc_resume_host(chip->hosts[i]->mmc); |
| 1041 | if (ret) |
| 1042 | return ret; |
| 1043 | } |
| 1044 | |
| 1045 | return 0; |
| 1046 | } |
| 1047 | |
| 1048 | #else /* CONFIG_PM */ |
| 1049 | |
| 1050 | #define sdhci_suspend NULL |
| 1051 | #define sdhci_resume NULL |
| 1052 | |
| 1053 | #endif /* CONFIG_PM */ |
| 1054 | |
| 1055 | /*****************************************************************************\ |
| 1056 | * * |
| 1057 | * Device probing/removal * |
| 1058 | * * |
| 1059 | \*****************************************************************************/ |
| 1060 | |
| 1061 | static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot) |
| 1062 | { |
| 1063 | int ret; |
| 1064 | struct sdhci_chip *chip; |
| 1065 | struct mmc_host *mmc; |
| 1066 | struct sdhci_host *host; |
| 1067 | |
| 1068 | u8 first_bar; |
| 1069 | unsigned int caps; |
| 1070 | |
| 1071 | chip = pci_get_drvdata(pdev); |
| 1072 | BUG_ON(!chip); |
| 1073 | |
| 1074 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); |
| 1075 | if (ret) |
| 1076 | return ret; |
| 1077 | |
| 1078 | first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; |
| 1079 | |
| 1080 | if (first_bar > 5) { |
| 1081 | printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n"); |
| 1082 | return -ENODEV; |
| 1083 | } |
| 1084 | |
| 1085 | if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) { |
| 1086 | printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n"); |
| 1087 | return -ENODEV; |
| 1088 | } |
| 1089 | |
| 1090 | if (pci_resource_len(pdev, first_bar + slot) != 0x100) { |
| 1091 | printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n"); |
| 1092 | return -ENODEV; |
| 1093 | } |
| 1094 | |
| 1095 | mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev); |
| 1096 | if (!mmc) |
| 1097 | return -ENOMEM; |
| 1098 | |
| 1099 | host = mmc_priv(mmc); |
| 1100 | host->mmc = mmc; |
| 1101 | |
| 1102 | host->bar = first_bar + slot; |
| 1103 | |
| 1104 | host->addr = pci_resource_start(pdev, host->bar); |
| 1105 | host->irq = pdev->irq; |
| 1106 | |
| 1107 | DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq); |
| 1108 | |
| 1109 | snprintf(host->slot_descr, 20, "sdhci:slot%d", slot); |
| 1110 | |
| 1111 | ret = pci_request_region(pdev, host->bar, host->slot_descr); |
| 1112 | if (ret) |
| 1113 | goto free; |
| 1114 | |
| 1115 | host->ioaddr = ioremap_nocache(host->addr, |
| 1116 | pci_resource_len(pdev, host->bar)); |
| 1117 | if (!host->ioaddr) { |
| 1118 | ret = -ENOMEM; |
| 1119 | goto release; |
| 1120 | } |
| 1121 | |
| 1122 | caps = readl(host->ioaddr + SDHCI_CAPABILITIES); |
| 1123 | |
| 1124 | if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01)) |
| 1125 | host->flags |= SDHCI_USE_DMA; |
| 1126 | |
| 1127 | if (host->flags & SDHCI_USE_DMA) { |
| 1128 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
| 1129 | printk(KERN_WARNING "%s: No suitable DMA available. " |
| 1130 | "Falling back to PIO.\n", host->slot_descr); |
| 1131 | host->flags &= ~SDHCI_USE_DMA; |
| 1132 | } |
| 1133 | } |
| 1134 | |
| 1135 | if (host->flags & SDHCI_USE_DMA) |
| 1136 | pci_set_master(pdev); |
| 1137 | else /* XXX: Hack to get MMC layer to avoid highmem */ |
| 1138 | pdev->dma_mask = 0; |
| 1139 | |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1140 | host->max_clk = |
| 1141 | (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT; |
| 1142 | if (host->max_clk == 0) { |
| 1143 | printk(KERN_ERR "%s: Hardware doesn't specify base clock " |
| 1144 | "frequency.\n", host->slot_descr); |
| 1145 | ret = -ENODEV; |
| 1146 | goto unmap; |
| 1147 | } |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1148 | host->max_clk *= 1000000; |
| 1149 | |
Pierre Ossman | 1c8cde9 | 2006-06-30 02:22:25 -0700 | [diff] [blame] | 1150 | host->timeout_clk = |
| 1151 | (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; |
| 1152 | if (host->timeout_clk == 0) { |
| 1153 | printk(KERN_ERR "%s: Hardware doesn't specify timeout clock " |
| 1154 | "frequency.\n", host->slot_descr); |
| 1155 | ret = -ENODEV; |
| 1156 | goto unmap; |
| 1157 | } |
| 1158 | if (caps & SDHCI_TIMEOUT_CLK_UNIT) |
| 1159 | host->timeout_clk *= 1000; |
| 1160 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1161 | /* |
| 1162 | * Set host parameters. |
| 1163 | */ |
| 1164 | mmc->ops = &sdhci_ops; |
| 1165 | mmc->f_min = host->max_clk / 256; |
| 1166 | mmc->f_max = host->max_clk; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1167 | mmc->caps = MMC_CAP_4_BIT_DATA; |
| 1168 | |
Pierre Ossman | 146ad66 | 2006-06-30 02:22:23 -0700 | [diff] [blame] | 1169 | mmc->ocr_avail = 0; |
| 1170 | if (caps & SDHCI_CAN_VDD_330) |
| 1171 | mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; |
| 1172 | else if (caps & SDHCI_CAN_VDD_300) |
| 1173 | mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31; |
| 1174 | else if (caps & SDHCI_CAN_VDD_180) |
| 1175 | mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19; |
| 1176 | |
| 1177 | if (mmc->ocr_avail == 0) { |
| 1178 | printk(KERN_ERR "%s: Hardware doesn't report any " |
| 1179 | "support voltages.\n", host->slot_descr); |
| 1180 | ret = -ENODEV; |
| 1181 | goto unmap; |
| 1182 | } |
| 1183 | |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1184 | spin_lock_init(&host->lock); |
| 1185 | |
| 1186 | /* |
| 1187 | * Maximum number of segments. Hardware cannot do scatter lists. |
| 1188 | */ |
| 1189 | if (host->flags & SDHCI_USE_DMA) |
| 1190 | mmc->max_hw_segs = 1; |
| 1191 | else |
| 1192 | mmc->max_hw_segs = 16; |
| 1193 | mmc->max_phys_segs = 16; |
| 1194 | |
| 1195 | /* |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame^] | 1196 | * Maximum number of sectors in one transfer. Limited by DMA boundary |
| 1197 | * size (512KiB), which means (512 KiB/512=) 1024 entries. |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1198 | */ |
Pierre Ossman | bab7696 | 2006-07-02 16:51:35 +0100 | [diff] [blame^] | 1199 | mmc->max_sectors = 1024; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1200 | |
| 1201 | /* |
| 1202 | * Maximum segment size. Could be one segment with the maximum number |
| 1203 | * of sectors. |
| 1204 | */ |
| 1205 | mmc->max_seg_size = mmc->max_sectors * 512; |
| 1206 | |
| 1207 | /* |
| 1208 | * Init tasklets. |
| 1209 | */ |
| 1210 | tasklet_init(&host->card_tasklet, |
| 1211 | sdhci_tasklet_card, (unsigned long)host); |
| 1212 | tasklet_init(&host->finish_tasklet, |
| 1213 | sdhci_tasklet_finish, (unsigned long)host); |
| 1214 | |
Andrew Morton | e474c66 | 2006-06-12 22:10:22 +0100 | [diff] [blame] | 1215 | setup_timer(&host->timer, sdhci_timeout_timer, (long)host); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1216 | |
| 1217 | ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ, |
| 1218 | host->slot_descr, host); |
| 1219 | if (ret) |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1220 | goto untasklet; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1221 | |
| 1222 | sdhci_init(host); |
| 1223 | |
| 1224 | #ifdef CONFIG_MMC_DEBUG |
| 1225 | sdhci_dumpregs(host); |
| 1226 | #endif |
| 1227 | |
| 1228 | host->chip = chip; |
| 1229 | chip->hosts[slot] = host; |
| 1230 | |
| 1231 | mmc_add_host(mmc); |
| 1232 | |
| 1233 | printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc), |
| 1234 | host->addr, host->irq, |
| 1235 | (host->flags & SDHCI_USE_DMA)?"DMA":"PIO"); |
| 1236 | |
| 1237 | return 0; |
| 1238 | |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1239 | untasklet: |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1240 | tasklet_kill(&host->card_tasklet); |
| 1241 | tasklet_kill(&host->finish_tasklet); |
Pierre Ossman | 8ef1a14 | 2006-06-30 02:22:21 -0700 | [diff] [blame] | 1242 | unmap: |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1243 | iounmap(host->ioaddr); |
| 1244 | release: |
| 1245 | pci_release_region(pdev, host->bar); |
| 1246 | free: |
| 1247 | mmc_free_host(mmc); |
| 1248 | |
| 1249 | return ret; |
| 1250 | } |
| 1251 | |
| 1252 | static void sdhci_remove_slot(struct pci_dev *pdev, int slot) |
| 1253 | { |
| 1254 | struct sdhci_chip *chip; |
| 1255 | struct mmc_host *mmc; |
| 1256 | struct sdhci_host *host; |
| 1257 | |
| 1258 | chip = pci_get_drvdata(pdev); |
| 1259 | host = chip->hosts[slot]; |
| 1260 | mmc = host->mmc; |
| 1261 | |
| 1262 | chip->hosts[slot] = NULL; |
| 1263 | |
| 1264 | mmc_remove_host(mmc); |
| 1265 | |
| 1266 | sdhci_reset(host, SDHCI_RESET_ALL); |
| 1267 | |
| 1268 | free_irq(host->irq, host); |
| 1269 | |
| 1270 | del_timer_sync(&host->timer); |
| 1271 | |
| 1272 | tasklet_kill(&host->card_tasklet); |
| 1273 | tasklet_kill(&host->finish_tasklet); |
| 1274 | |
| 1275 | iounmap(host->ioaddr); |
| 1276 | |
| 1277 | pci_release_region(pdev, host->bar); |
| 1278 | |
| 1279 | mmc_free_host(mmc); |
| 1280 | } |
| 1281 | |
| 1282 | static int __devinit sdhci_probe(struct pci_dev *pdev, |
| 1283 | const struct pci_device_id *ent) |
| 1284 | { |
| 1285 | int ret, i; |
Pierre Ossman | 51f82bc | 2006-06-30 02:22:22 -0700 | [diff] [blame] | 1286 | u8 slots, rev; |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1287 | struct sdhci_chip *chip; |
| 1288 | |
| 1289 | BUG_ON(pdev == NULL); |
| 1290 | BUG_ON(ent == NULL); |
| 1291 | |
Pierre Ossman | 51f82bc | 2006-06-30 02:22:22 -0700 | [diff] [blame] | 1292 | pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev); |
| 1293 | |
| 1294 | printk(KERN_INFO DRIVER_NAME |
| 1295 | ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n", |
| 1296 | pci_name(pdev), (int)pdev->vendor, (int)pdev->device, |
| 1297 | (int)rev); |
Pierre Ossman | d129bce | 2006-03-24 03:18:17 -0800 | [diff] [blame] | 1298 | |
| 1299 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); |
| 1300 | if (ret) |
| 1301 | return ret; |
| 1302 | |
| 1303 | slots = PCI_SLOT_INFO_SLOTS(slots) + 1; |
| 1304 | DBG("found %d slot(s)\n", slots); |
| 1305 | if (slots == 0) |
| 1306 | return -ENODEV; |
| 1307 | |
| 1308 | ret = pci_enable_device(pdev); |
| 1309 | if (ret) |
| 1310 | return ret; |
| 1311 | |
| 1312 | chip = kzalloc(sizeof(struct sdhci_chip) + |
| 1313 | sizeof(struct sdhci_host*) * slots, GFP_KERNEL); |
| 1314 | if (!chip) { |
| 1315 | ret = -ENOMEM; |
| 1316 | goto err; |
| 1317 | } |
| 1318 | |
| 1319 | chip->pdev = pdev; |
| 1320 | |
| 1321 | chip->num_slots = slots; |
| 1322 | pci_set_drvdata(pdev, chip); |
| 1323 | |
| 1324 | for (i = 0;i < slots;i++) { |
| 1325 | ret = sdhci_probe_slot(pdev, i); |
| 1326 | if (ret) { |
| 1327 | for (i--;i >= 0;i--) |
| 1328 | sdhci_remove_slot(pdev, i); |
| 1329 | goto free; |
| 1330 | } |
| 1331 | } |
| 1332 | |
| 1333 | return 0; |
| 1334 | |
| 1335 | free: |
| 1336 | pci_set_drvdata(pdev, NULL); |
| 1337 | kfree(chip); |
| 1338 | |
| 1339 | err: |
| 1340 | pci_disable_device(pdev); |
| 1341 | return ret; |
| 1342 | } |
| 1343 | |
| 1344 | static void __devexit sdhci_remove(struct pci_dev *pdev) |
| 1345 | { |
| 1346 | int i; |
| 1347 | struct sdhci_chip *chip; |
| 1348 | |
| 1349 | chip = pci_get_drvdata(pdev); |
| 1350 | |
| 1351 | if (chip) { |
| 1352 | for (i = 0;i < chip->num_slots;i++) |
| 1353 | sdhci_remove_slot(pdev, i); |
| 1354 | |
| 1355 | pci_set_drvdata(pdev, NULL); |
| 1356 | |
| 1357 | kfree(chip); |
| 1358 | } |
| 1359 | |
| 1360 | pci_disable_device(pdev); |
| 1361 | } |
| 1362 | |
| 1363 | static struct pci_driver sdhci_driver = { |
| 1364 | .name = DRIVER_NAME, |
| 1365 | .id_table = pci_ids, |
| 1366 | .probe = sdhci_probe, |
| 1367 | .remove = __devexit_p(sdhci_remove), |
| 1368 | .suspend = sdhci_suspend, |
| 1369 | .resume = sdhci_resume, |
| 1370 | }; |
| 1371 | |
| 1372 | /*****************************************************************************\ |
| 1373 | * * |
| 1374 | * Driver init/exit * |
| 1375 | * * |
| 1376 | \*****************************************************************************/ |
| 1377 | |
| 1378 | static int __init sdhci_drv_init(void) |
| 1379 | { |
| 1380 | printk(KERN_INFO DRIVER_NAME |
| 1381 | ": Secure Digital Host Controller Interface driver, " |
| 1382 | DRIVER_VERSION "\n"); |
| 1383 | printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n"); |
| 1384 | |
| 1385 | return pci_register_driver(&sdhci_driver); |
| 1386 | } |
| 1387 | |
| 1388 | static void __exit sdhci_drv_exit(void) |
| 1389 | { |
| 1390 | DBG("Exiting\n"); |
| 1391 | |
| 1392 | pci_unregister_driver(&sdhci_driver); |
| 1393 | } |
| 1394 | |
| 1395 | module_init(sdhci_drv_init); |
| 1396 | module_exit(sdhci_drv_exit); |
| 1397 | |
| 1398 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); |
| 1399 | MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver"); |
| 1400 | MODULE_VERSION(DRIVER_VERSION); |
| 1401 | MODULE_LICENSE("GPL"); |