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David Hardemancc90ef02005-08-17 09:07:44 +02001/*
2 * i6300esb 0.03: Watchdog timer driver for Intel 6300ESB chipset
3 *
4 * (c) Copyright 2004 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * based on i810-tco.c which is
12 *
13 * (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>
14 * developed for
15 * Jentro AG, Haar/Munich (Germany)
16 *
17 * which is in turn based on softdog.c by Alan Cox <alan@redhat.com>
18 *
19 * The timer is implemented in the following I/O controller hubs:
20 * (See the intel documentation on http://developer.intel.com.)
21 * 6300ESB chip : document number 300641-003
22 *
23 * 2004YYZZ Ross Biro
24 * Initial version 0.01
25 * 2004YYZZ Ross Biro
26 * Version 0.02
27 * 20050210 David Härdeman <david@2gen.com>
28 * Ported driver to kernel 2.6
29 */
30
31/*
32 * Includes, defines, variables, module parameters, ...
33 */
34
35#include <linux/module.h>
36#include <linux/types.h>
37#include <linux/kernel.h>
38#include <linux/fs.h>
39#include <linux/mm.h>
40#include <linux/miscdevice.h>
41#include <linux/watchdog.h>
42#include <linux/reboot.h>
43#include <linux/init.h>
44#include <linux/pci.h>
45#include <linux/ioport.h>
46
47#include <asm/uaccess.h>
48#include <asm/io.h>
49
50#include "i6300esb.h"
51
52/* Module and version information */
53#define ESB_VERSION "0.03"
54#define ESB_MODULE_NAME "i6300ESB timer"
55#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
56#define PFX ESB_MODULE_NAME ": "
57
58/* internal variables */
59static void __iomem *BASEADDR;
60static spinlock_t esb_lock; /* Guards the hardware */
61static unsigned long timer_alive;
62static struct pci_dev *esb_pci;
63static unsigned short triggered; /* The status of the watchdog upon boot */
64static char esb_expect_close;
65
66/* module parameters */
67#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat (1<heartbeat<2*1023) */
68static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
69module_param(heartbeat, int, 0);
70MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
71
Naveen Gupta811f9992005-08-21 13:02:41 +020072static int nowayout = WATCHDOG_NOWAYOUT;
David Hardemancc90ef02005-08-17 09:07:44 +020073module_param(nowayout, int, 0);
74MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
75
76/*
77 * Some i6300ESB specific functions
78 */
79
80/*
81 * Prepare for reloading the timer by unlocking the proper registers.
82 * This is performed by first writing 0x80 followed by 0x86 to the
83 * reload register. After this the appropriate registers can be written
84 * to once before they need to be unlocked again.
85 */
86static inline void esb_unlock_registers(void) {
87 writeb(ESB_UNLOCK1, ESB_RELOAD_REG);
88 writeb(ESB_UNLOCK2, ESB_RELOAD_REG);
89}
90
91static void esb_timer_start(void)
92{
93 u8 val;
94
95 /* Enable or Enable + Lock? */
Naveen Gupta28562af2005-08-17 09:10:10 +020096 val = 0x02 | (nowayout ? 0x01 : 0x00);
David Hardemancc90ef02005-08-17 09:07:44 +020097
98 pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
99}
100
101static int esb_timer_stop(void)
102{
103 u8 val;
104
105 spin_lock(&esb_lock);
106 /* First, reset timers as suggested by the docs */
107 esb_unlock_registers();
Naveen Guptace2f50b2005-08-17 09:11:46 +0200108 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
David Hardemancc90ef02005-08-17 09:07:44 +0200109 /* Then disable the WDT */
110 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
111 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
112 spin_unlock(&esb_lock);
113
114 /* Returns 0 if the timer was disabled, non-zero otherwise */
115 return (val & 0x01);
116}
117
118static void esb_timer_keepalive(void)
119{
120 spin_lock(&esb_lock);
121 esb_unlock_registers();
Naveen Guptace2f50b2005-08-17 09:11:46 +0200122 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
David Hardemancc90ef02005-08-17 09:07:44 +0200123 /* FIXME: Do we need to flush anything here? */
124 spin_unlock(&esb_lock);
125}
126
127static int esb_timer_set_heartbeat(int time)
128{
129 u32 val;
130
131 if (time < 0x1 || time > (2 * 0x03ff))
132 return -EINVAL;
133
134 spin_lock(&esb_lock);
135
136 /* We shift by 9, so if we are passed a value of 1 sec,
137 * val will be 1 << 9 = 512, then write that to two
138 * timers => 2 * 512 = 1024 (which is decremented at 1KHz)
139 */
140 val = time << 9;
141
142 /* Write timer 1 */
143 esb_unlock_registers();
144 writel(val, ESB_TIMER1_REG);
145
146 /* Write timer 2 */
147 esb_unlock_registers();
148 writel(val, ESB_TIMER2_REG);
149
150 /* Reload */
151 esb_unlock_registers();
Naveen Guptace2f50b2005-08-17 09:11:46 +0200152 writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
David Hardemancc90ef02005-08-17 09:07:44 +0200153
154 /* FIXME: Do we need to flush everything out? */
155
156 /* Done */
157 heartbeat = time;
158 spin_unlock(&esb_lock);
159 return 0;
160}
161
162static int esb_timer_read (void)
163{
164 u32 count;
165
166 /* This isn't documented, and doesn't take into
167 * acount which stage is running, but it looks
168 * like a 20 bit count down, so we might as well report it.
169 */
170 pci_read_config_dword(esb_pci, 0x64, &count);
171 return (int)count;
172}
173
174/*
175 * /dev/watchdog handling
176 */
177
178static int esb_open (struct inode *inode, struct file *file)
179{
180 /* /dev/watchdog can only be opened once */
181 if (test_and_set_bit(0, &timer_alive))
182 return -EBUSY;
183
184 /* Reload and activate timer */
185 esb_timer_keepalive ();
186 esb_timer_start ();
187
188 return nonseekable_open(inode, file);
189}
190
191static int esb_release (struct inode *inode, struct file *file)
192{
193 /* Shut off the timer. */
194 if (esb_expect_close == 42) {
195 esb_timer_stop ();
196 } else {
197 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n");
198 esb_timer_keepalive ();
199 }
200 clear_bit(0, &timer_alive);
201 esb_expect_close = 0;
202 return 0;
203}
204
205static ssize_t esb_write (struct file *file, const char __user *data,
206 size_t len, loff_t * ppos)
207{
208 /* See if we got the magic character 'V' and reload the timer */
209 if (len) {
210 if (!nowayout) {
211 size_t i;
212
213 /* note: just in case someone wrote the magic character
214 * five months ago... */
215 esb_expect_close = 0;
216
217 /* scan to see whether or not we got the magic character */
218 for (i = 0; i != len; i++) {
219 char c;
220 if(get_user(c, data+i))
221 return -EFAULT;
222 if (c == 'V')
223 esb_expect_close = 42;
224 }
225 }
226
227 /* someone wrote to us, we should reload the timer */
228 esb_timer_keepalive ();
229 }
230 return len;
231}
232
233static int esb_ioctl (struct inode *inode, struct file *file,
234 unsigned int cmd, unsigned long arg)
235{
236 int new_options, retval = -EINVAL;
237 int new_heartbeat;
238 void __user *argp = (void __user *)arg;
239 int __user *p = argp;
240 static struct watchdog_info ident = {
241 .options = WDIOF_SETTIMEOUT |
242 WDIOF_KEEPALIVEPING |
243 WDIOF_MAGICCLOSE,
244 .firmware_version = 0,
245 .identity = ESB_MODULE_NAME,
246 };
247
248 switch (cmd) {
249 case WDIOC_GETSUPPORT:
250 return copy_to_user(argp, &ident,
251 sizeof (ident)) ? -EFAULT : 0;
252
253 case WDIOC_GETSTATUS:
254 return put_user (esb_timer_read(), p);
255
256 case WDIOC_GETBOOTSTATUS:
257 return put_user (triggered, p);
258
259 case WDIOC_KEEPALIVE:
260 esb_timer_keepalive ();
261 return 0;
262
263 case WDIOC_SETOPTIONS:
264 {
265 if (get_user (new_options, p))
266 return -EFAULT;
267
268 if (new_options & WDIOS_DISABLECARD) {
269 esb_timer_stop ();
270 retval = 0;
271 }
272
273 if (new_options & WDIOS_ENABLECARD) {
274 esb_timer_keepalive ();
275 esb_timer_start ();
276 retval = 0;
277 }
278
279 return retval;
280 }
281
282 case WDIOC_SETTIMEOUT:
283 {
284 if (get_user(new_heartbeat, p))
285 return -EFAULT;
286
287 if (esb_timer_set_heartbeat(new_heartbeat))
288 return -EINVAL;
289
290 esb_timer_keepalive ();
291 /* Fall */
292 }
293
294 case WDIOC_GETTIMEOUT:
295 return put_user(heartbeat, p);
296
297 default:
298 return -ENOIOCTLCMD;
299 }
300}
301
302/*
303 * Notify system
304 */
305
306static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused)
307{
308 if (code==SYS_DOWN || code==SYS_HALT) {
309 /* Turn the WDT off */
310 esb_timer_stop ();
311 }
312
313 return NOTIFY_DONE;
314}
315
316/*
317 * Kernel Interfaces
318 */
319
320static struct file_operations esb_fops = {
321 .owner = THIS_MODULE,
322 .llseek = no_llseek,
323 .write = esb_write,
324 .ioctl = esb_ioctl,
325 .open = esb_open,
326 .release = esb_release,
327};
328
329static struct miscdevice esb_miscdev = {
330 .minor = WATCHDOG_MINOR,
331 .name = "watchdog",
332 .fops = &esb_fops,
333};
334
335static struct notifier_block esb_notifier = {
336 .notifier_call = esb_notify_sys,
337};
338
339/*
340 * Data for PCI driver interface
341 *
342 * This data only exists for exporting the supported
343 * PCI ids via MODULE_DEVICE_TABLE. We do not actually
344 * register a pci_driver, because someone else might one day
345 * want to register another driver on the same PCI id.
346 */
347static struct pci_device_id esb_pci_tbl[] = {
Jiri Slabybb5dc362005-08-22 09:05:03 +0200348 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
David Hardemancc90ef02005-08-17 09:07:44 +0200349 { 0, }, /* End of list */
350};
351MODULE_DEVICE_TABLE (pci, esb_pci_tbl);
352
353/*
354 * Init & exit routines
355 */
356
357static unsigned char __init esb_getdevice (void)
358{
359 u8 val1;
360 unsigned short val2;
361
362 struct pci_dev *dev = NULL;
363 /*
364 * Find the PCI device
365 */
366
Naveen Gupta811f9992005-08-21 13:02:41 +0200367 for_each_pci_dev(dev) {
Jiri Slabybb5dc362005-08-22 09:05:03 +0200368 if (pci_match_id(esb_pci_tbl, dev)) {
David Hardemancc90ef02005-08-17 09:07:44 +0200369 esb_pci = dev;
370 break;
371 }
Naveen Gupta811f9992005-08-21 13:02:41 +0200372 }
David Hardemancc90ef02005-08-17 09:07:44 +0200373
374 if (esb_pci) {
375 if (pci_enable_device(esb_pci)) {
376 printk (KERN_ERR PFX "failed to enable device\n");
Naveen Gupta811f9992005-08-21 13:02:41 +0200377 goto err_devput;
David Hardemancc90ef02005-08-17 09:07:44 +0200378 }
379
380 if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) {
381 printk (KERN_ERR PFX "failed to request region\n");
382 goto err_disable;
383 }
384
385 BASEADDR = ioremap(pci_resource_start(esb_pci, 0),
386 pci_resource_len(esb_pci, 0));
387 if (BASEADDR == NULL) {
388 /* Something's wrong here, BASEADDR has to be set */
389 printk (KERN_ERR PFX "failed to get BASEADDR\n");
390 goto err_release;
391 }
392
393 /*
394 * The watchdog has two timers, it can be setup so that the
395 * expiry of timer1 results in an interrupt and the expiry of
396 * timer2 results in a reboot. We set it to not generate
397 * any interrupts as there is not much we can do with it
398 * right now.
399 *
400 * We also enable reboots and set the timer frequency to
401 * the PCI clock divided by 2^15 (approx 1KHz).
402 */
403 pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
404
405 /* Check that the WDT isn't already locked */
406 pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
407 if (val1 & ESB_WDT_LOCK)
408 printk (KERN_WARNING PFX "nowayout already set\n");
409
410 /* Set the timer to watchdog mode and disable it for now */
411 pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
412
413 /* Check if the watchdog was previously triggered */
414 esb_unlock_registers();
415 val2 = readw(ESB_RELOAD_REG);
416 triggered = (val2 & (0x01 << 9) >> 9);
417
418 /* Reset trigger flag and timers */
419 esb_unlock_registers();
420 writew((0x11 << 8), ESB_RELOAD_REG);
421
422 /* Done */
423 return 1;
424
425err_release:
426 pci_release_region(esb_pci, 0);
427err_disable:
428 pci_disable_device(esb_pci);
Naveen Gupta811f9992005-08-21 13:02:41 +0200429err_devput:
Jiri Slabyc69af032005-08-17 09:09:13 +0200430 pci_dev_put(esb_pci);
David Hardemancc90ef02005-08-17 09:07:44 +0200431 }
David Hardemancc90ef02005-08-17 09:07:44 +0200432 return 0;
433}
434
435static int __init watchdog_init (void)
436{
437 int ret;
438
439 spin_lock_init(&esb_lock);
440
441 /* Check whether or not the hardware watchdog is there */
442 if (!esb_getdevice () || esb_pci == NULL)
443 return -ENODEV;
444
445 /* Check that the heartbeat value is within it's range ; if not reset to the default */
446 if (esb_timer_set_heartbeat (heartbeat)) {
447 esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT);
448 printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n",
449 heartbeat);
450 }
451
452 ret = register_reboot_notifier(&esb_notifier);
453 if (ret != 0) {
454 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n",
455 ret);
456 goto err_unmap;
457 }
458
459 ret = misc_register(&esb_miscdev);
460 if (ret != 0) {
461 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n",
462 WATCHDOG_MINOR, ret);
463 goto err_notifier;
464 }
465
466 esb_timer_stop ();
467
468 printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
469 BASEADDR, heartbeat, nowayout);
470
471 return 0;
472
473err_notifier:
474 unregister_reboot_notifier(&esb_notifier);
475err_unmap:
476 iounmap(BASEADDR);
477/* err_release: */
478 pci_release_region(esb_pci, 0);
479/* err_disable: */
480 pci_disable_device(esb_pci);
Naveen Gupta811f9992005-08-21 13:02:41 +0200481/* err_devput: */
Jiri Slabyc69af032005-08-17 09:09:13 +0200482 pci_dev_put(esb_pci);
David Hardemancc90ef02005-08-17 09:07:44 +0200483 return ret;
484}
485
486static void __exit watchdog_cleanup (void)
487{
488 /* Stop the timer before we leave */
489 if (!nowayout)
490 esb_timer_stop ();
491
492 /* Deregister */
493 misc_deregister(&esb_miscdev);
494 unregister_reboot_notifier(&esb_notifier);
495 iounmap(BASEADDR);
496 pci_release_region(esb_pci, 0);
497 pci_disable_device(esb_pci);
Jiri Slabyc69af032005-08-17 09:09:13 +0200498 pci_dev_put(esb_pci);
David Hardemancc90ef02005-08-17 09:07:44 +0200499}
500
501module_init(watchdog_init);
502module_exit(watchdog_cleanup);
503
504MODULE_AUTHOR("Ross Biro and David Härdeman");
505MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
506MODULE_LICENSE("GPL");
507MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);