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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Hardware info about DECstation DS2100/3100 systems (otherwise known as
3 * pmin/pmax or KN01).
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 1995,1996 by Paul M. Antoine, some code and definitions
10 * are by courtesy of Chris Fraser.
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000011 * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
13#ifndef __ASM_MIPS_DEC_KN01_H
14#define __ASM_MIPS_DEC_KN01_H
15
Maciej W. Rozyckia5fc9c02005-07-01 16:10:40 +000016#define KN01_SLOT_BASE 0x10000000
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#define KN01_SLOT_SIZE 0x01000000
18
19/*
20 * Address ranges for devices.
21 */
22#define KN01_PMASK (0*KN01_SLOT_SIZE) /* color plane mask */
23#define KN01_PCC (1*KN01_SLOT_SIZE) /* PCC (DC503) cursor */
24#define KN01_VDAC (2*KN01_SLOT_SIZE) /* color map */
25#define KN01_RES_3 (3*KN01_SLOT_SIZE) /* unused */
26#define KN01_RES_4 (4*KN01_SLOT_SIZE) /* unused */
27#define KN01_RES_5 (5*KN01_SLOT_SIZE) /* unused */
28#define KN01_RES_6 (6*KN01_SLOT_SIZE) /* unused */
29#define KN01_ERRADDR (7*KN01_SLOT_SIZE) /* write error address */
30#define KN01_LANCE (8*KN01_SLOT_SIZE) /* LANCE (Am7990) Ethernet */
31#define KN01_LANCE_MEM (9*KN01_SLOT_SIZE) /* LANCE buffer memory */
32#define KN01_SII (10*KN01_SLOT_SIZE) /* SII (DC7061) SCSI */
33#define KN01_SII_MEM (11*KN01_SLOT_SIZE) /* SII buffer memory */
34#define KN01_DZ11 (12*KN01_SLOT_SIZE) /* DZ11 (DC7085) serial */
35#define KN01_RTC (13*KN01_SLOT_SIZE) /* DS1287 RTC (bytes #0) */
36#define KN01_ESAR (13*KN01_SLOT_SIZE) /* MAC address (bytes #1) */
37#define KN01_CSR (14*KN01_SLOT_SIZE) /* system ctrl & status reg */
38#define KN01_SYS_ROM (15*KN01_SLOT_SIZE) /* system board ROM */
39
40
41/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070042 * Frame buffer memory address.
43 */
Maciej W. Rozyckia5fc9c02005-07-01 16:10:40 +000044#define KN01_VFB_MEM 0x0fc00000
Linus Torvalds1da177e2005-04-16 15:20:36 -070045
46/*
47 * CPU interrupt bits.
48 */
49#define KN01_CPU_INR_BUS 6 /* memory, I/O bus read/write errors */
50#define KN01_CPU_INR_VIDEO 6 /* PCC area detect #2 */
51#define KN01_CPU_INR_RTC 5 /* DS1287 RTC */
52#define KN01_CPU_INR_DZ11 4 /* DZ11 (DC7085) serial */
53#define KN01_CPU_INR_LANCE 3 /* LANCE (Am7990) Ethernet */
54#define KN01_CPU_INR_SII 2 /* SII (DC7061) SCSI */
55
56
57/*
58 * System Control & Status Register bits.
59 */
60#define KN01_CSR_MNFMOD (1<<15) /* MNFMOD manufacturing jumper */
61#define KN01_CSR_STATUS (1<<14) /* self-test result status output */
62#define KN01_CSR_PARDIS (1<<13) /* parity error disable */
63#define KN01_CSR_CRSRTST (1<<12) /* PCC test output */
64#define KN01_CSR_MONO (1<<11) /* mono/color fb SIMM installed */
65#define KN01_CSR_MEMERR (1<<10) /* write timeout error status & ack*/
66#define KN01_CSR_VINT (1<<9) /* PCC area detect #2 status & ack */
67#define KN01_CSR_TXDIS (1<<8) /* DZ11 transmit disable */
68#define KN01_CSR_VBGTRG (1<<2) /* blue DAC voltage over green (r/o) */
69#define KN01_CSR_VRGTRG (1<<1) /* red DAC voltage over green (r/o) */
70#define KN01_CSR_VRGTRB (1<<0) /* red DAC voltage over blue (r/o) */
71#define KN01_CSR_LEDS (0xff<<0) /* ~diagnostic LEDs (w/o) */
72
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000073
74#ifndef __ASSEMBLY__
75
76#include <linux/interrupt.h>
77#include <linux/spinlock.h>
78#include <linux/types.h>
79
80struct pt_regs;
81
82extern u16 cached_kn01_csr;
83extern spinlock_t kn01_lock;
84
85extern void dec_kn01_be_init(void);
86extern int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup);
Ralf Baechle6dab2f42006-10-09 00:00:31 +010087extern irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id);
Maciej W. Rozycki64dac502005-06-22 20:56:26 +000088#endif
89
Linus Torvalds1da177e2005-04-16 15:20:36 -070090#endif /* __ASM_MIPS_DEC_KN01_H */