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Sujit Reddy Thummac69c44b2013-04-02 10:30:40 +05301Introduction
2============
3The SATA Host Controller developed for Qualcomm SoC is used
4to facilitate SATA storage devices that connect to SoC through a
5standard SATA cable interface. The MSM Advanced Host Controller
6Interface (AHCI) driver interfaces with the generic Linux AHCI driver
7and communicates with the AHCI controller for data movement between
8system memory and SATA devices (persistent storage).
9
10Hardware description
11====================
12Serial Advanced Technology Attachment (SATA) is a communication
13protocol designed to transfer data between a computer and storage
14devices (Hard Disk Drive(HDD), Solid State Drives(SSD) etc.).
15First generation (Gen1) SATA interfaces communicate at a serial
16rate of 1.5Gb/s and use low-voltage differential signaling on
17serial links. With 8b-10b encoding, the effective data throughput
18for Gen1 interface is 150MB/s.
19
20The SATA host controller in Qualcomm chipsets adheres to the AHCI 1.3
21specification which describes the interface between system software
22and the host controller, as well as the functional behavior needed
23for software to communicate with the SATA host controller.
24
25The SATA PHY hardware macro in Qualcomm chipsets adheres to the
26SATA 3.0 specification with Gen1 serial interface. This is used to
27serialize and de-serialize data and communicates with SATA HDD. Also,
28the PHY can detect SATA HDD during hot swap and raise an interrupt to
29the CPU through AHCI controller to notify about the detection/removal.
30
31The following figure shows the SATA architecture block diagram as
32implemented in MSM chipsets.
33
34 +---------+
35 |SATA Disk|
36 | Drive |
37 +---------+
38 ^ ^
39 Tx | | Rx
40 v v
41+--------------+ +--------------+ +-----------+
42| System Memory| | SATA PHY | | CPU |
43+--------------+ +--------------+ +-----------+
44 ^ ^ ^ ^ ^
45 | | | | |
46 | v v | |
47 | +------------------+(Interrupt)|
48 | | SATA CONTROLLER |-----+ |
49 | +------------------+ |
50 | ^ ^ |
51 | | | |
52 v v v v
53 <--------------------------------------------------------->
54< System Fabric (Control and Data) >
55 <--------------------------------------------------------->
56
57Some controller capabilities:
58- Supports 64-bit addressing
59- Supports native command queueing (upto 32 commands)
60- Supports First-party DMA to move data to and from system memory
61- ATA-7 command set compliant
62- Port multiplier support for some chipsets
63- Supports aggressive power management (partial, slumber modes)
64- Supports asynchronous notification
65
66Software description
67====================
68The SATA driver uses the generic interface to read/write data to
69the Hard Disk Drive (HDD). It uses following components in Linux
70to interface with the generic block layer which then interfaces
71with file system or user processes.
72
731) AHCI platform Driver (includes MSM-specific glue driver)
742) LIBAHCI
753) LIBATA
764) SCSI
77
78AHCI platform driver registers as a device driver for platform
79device registered during SoC board initialization. It is responsible
80for platform specific tasks like PHY configuration, clock initial-
81ization, claiming memory resources etc. Also, implements certain
82functionality that deviates from the standard specification.
83
84Library "LIBAHCI" implements software layer functionality described
85in the standard AHCI specification. It interfaces with the LIBATA
86framework to execute SATA the command set. It converts ATA task files
87into AHCI command descriptors and pass them to the controller for
88execution. It handles controller interrupts and sends command
89completion events to the upper layers. It implements a controller-
90specific reset and recover mechanism in case of errors. It implements
91link power management policies - partial, slumber modes, runtime power
92management and platform power management. It abstracts the low-level
93controller details from the LIBATA framework.
94
95"LIBATA" is a helper library for implementing ATA and SATA command
96protocol as described in standard ATA and SATA specifications. It
97builds read/write requests from SCSI commands and pass them to the
98low-level controller driver (LLD). It handshakes with the SATA
99device using standard commands to understand capabilities and carry
100out device configurations. It interfaces with the SCSI layer to manage
101underlying disks. It manages different devices connected to each host
102port using a port multiplier. Also, it manages the link PHY component,
103the interconnect interface and any external interface (cables, etc.)
104that follow the SATA electrical specification.
105
106The SCSI layer is a helper library for translating generic block layer
107commands to SCSI commands and pass them on to the LIBATA framework.
108Certain generic stuff like device scan, media change, and hot plug
109detection are handled. This layer handles all types of SCSI devices,
110and SATA storage devices are one class of SCSI devices. It also provides
111the IOCTL interface to manage disks from userspace.
112
113Following is the logical code flow:
114
115 +------------------------+
116 | File System (ext4 etc.)|
117 +------------------------+
118 ^
119 |
120 v
121 +------------------------+
122 | Generic Block Layer |
123 +------------------------+
124 ^
125 |
126 v
127 +------------------------+
128 | SCSI Layer |
129 +------------------------+
130 ^
131 |
132 v
133 +------------------------+
134 | LIBATA library |
135 +------------------------+
136 ^
137 |
138 v
139 +------------------------+
140 | LIBAHCI library |
141 +------------------------+
142 ^
143 |
144 v
145 +------------------------+
146 | AHCI platform driver + |
147 | MSM AHCI glue driver |
148 +------------------------+
149
150Design
151======
152The MSM AHCI driver acts as a glue driver for the Linux
153AHCI controller driver. It provides the following functionality:
154- Registers as a driver for msm_sata device which has an AHCI-compliant
155 controller and PHY as resources.
156- Registers an AHCI platform device in the probe function providing
157 ahci platform data
158- AHCI platform data consists of the following callbacks:
159 - init
160 o PHY resource acquisition
161 o Clock and voltage regulator initialization
162 o PHY calibration
163 - exit
164 o PHY power down
165 o Clock and voltage regulator turn off
166 - suspend
167 - resume
168 o Sequence described in the next section.
169- The Linux AHCI platform driver then probes the AHCI device and
170 initializes it according to the standard AHCI specification.
171- The SATA drive is detected as part of scsi_scan_host() called by
172 LIBAHCI after controller initialization.
173
174Power Management
175================
176Various power modes are supported by this driver.
177
178Platform suspend/resume:
179During suspend:
180- PHY analog blocks are powered down
181- Controller and PHY is kept in Power-on-Reset (POR) mode
182- Clocks and voltage regulators are gated
183
184During resume:
185- Clocks and voltage regulators are ungated
186- PHY is powered up and calibrated to functional mode
187- Controller is re-initialized to process commands.
188
189Runtime suspend/resume:
190- Execute the same steps as in platform suspend/resume.
191- Runtime suspend/resume is disabled by default due to regressions
192 in hot-plug detection (specification limitation). The users can
193 enable runtime power management with following shell commands.
194
195 # cd /sys/devices/platform/msm_sata.0/ahci.0/
196 # echo auto > ./power/control
197 # echo auto > ./ata1/power/control
198 # echo auto > ./ata1/host0/target0:0:0/0:0:0:0/power/control
199
200 Note: The device will be runtime-suspended only when user unmounts
201 all the partitions.
202
203Link power management (defined by AHCI 1.3 specification):
204- Automatic low power mode transition are supported.
205- AHCI supports two power modes: partial and slumber.
206- Software uses Inteface Communication Control (ICC) bits in AHCI
207 register space to enable automatic partial/slumber state.
208- Partial mode:
209 - Software asserts automatic partial mode when the use
210 case demands low latency resume.
211 - Upon receiving partial mode signal, PHY disables byte clocks
212 and re-enables them during resume and thus has low latency.
213- Slumber mode:
214 - Software asserts automatic slumber mode when the use
215 case demands low power consumption and can withstand
216 high resume latencies.
217 - Upon receiving slumber mode signal, PHY disables byte
218 clocks and some internal circuitry. Upon resume PHY
219 enables byte clocks and reacquires the PLL lock.
220- Once the software enables partial/slumber modes, the transitioning
221 into these modes are automatic and is handled by hardware without
222 software intervention while the controller is idle with no outstanding
223 commands to process.
224
225- The Linux AHCI link power management defines three modes:
226 - max_performance (default mode)
227 Doesn't allow partial/slumber transition when host is idle.
228 - medium_power (Partial mode)
229 Following shell commands are used to enable this mode:
230
231 # cd /sys/devices/platform/msm_sata.0/ahci.0/
232 # echo medium_power > ./ata1/host0/scsi_host/host0/link_power_management_policy
233
234 - min_power (Slumber mode)
235 Following shell commands are used to enable this mode:
236
237 # cd /sys/devices/platform/msm_sata.0/ahci.0/
238 # echo min_power > ./ata1/host0/scsi_host/host0/link_power_management_policy
239
240SMP/multi-core
241==============
242The MSM AHCI driver hooks only init, exit, suspend, resume callbacks to
243the AHCI driver which are serialized by design and hence the driver, which
244is inherently SMP safe.
245
246Security
247========
248None.
249
250Performance
251===========
252The theoretical performance with Gen1 SATA PHY is 150MB/s (8b/10b encoding).
253The performance is dependent on various factors, mainly:
254- Capabilities of the external SATA hard disk connected to the MSM SATA port
255- Various system bus frequencies and system loads
256- System memory capabilities
257- Benchmark test applications that collect performance numbers
258
259One example of the maximum performance achieved in a specific system
260configuration follows:
261
262Benchmark: Iozone sequential performance
263Block size: 128K
264File size: 1GB
265Platform: APQ8064 V2 CDP
266CPU Governor: Performance
267
268SanDisk SSD (i100 64GB):
269Read - 135MB/s
270Write - 125MB/s
271
272Western Digital HDD (WD20EURS 2TB):
273Read - 121MB/s
274Write - 98MB/s
275
276Interface
277=========
278The MSM AHCI controller driver provides function pointers as the
279required interface to the Linux AHCI controller driver. The main
280routines implemented are init, exit, suspend, and resume for handling
281MSM-specific initialization, freeing of resources on exit, and
282MSM-specific power management tweaks during suspend power collapse.
283
284Driver parameters
285=================
286None.
287
288Config options
289==============
290Config option SATA_AHCI_MSM in drivers/ata/Kconfig enables this driver.
291
292Dependencies
293============
294The MSM AHCI controller driver is dependent on Linux AHCI driver,
295Linux ATA framework, Linux SCSI framework and Linux generic block layer.
296
297While configuring the kernel, the following options should be set:
298
299- CONFIG_BLOCK
300- CONFIG_SCSI
301- CONFIG_ATA
302- CONFIG_SATA_AHCI_PLATFORM
303
304User space utilities
305====================
306Any user space component that can mount a block device can be used to
307read/write data into persistent storage. However, at the time of this
308writing there are no utilities that author is aware of that can manage
309h/w from userspace.
310
311Other
312=====
313None.
314
315Known issues
316============
317None.
318
319To do
320=====
321- Device tree support.
322- MSM bus frequency voting support.