blob: 23b81cf242af739675f01303eabb3cebb71b09a7 [file] [log] [blame]
Eddie Dong1fd4f2a2007-07-18 12:03:39 +03001/*
2 * Copyright (C) 2001 MandrakeSoft S.A.
3 *
4 * MandrakeSoft S.A.
5 * 43, rue d'Aboukir
6 * 75002 Paris - France
7 * http://www.linux-mandrake.com/
8 * http://www.mandrakesoft.com/
9 *
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public
12 * License as published by the Free Software Foundation; either
13 * version 2 of the License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
19 *
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * Yunhong Jiang <yunhong.jiang@intel.com>
25 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
26 * Based on Xen 3.1 code.
27 */
28
Avi Kivityedf88412007-12-16 11:02:48 +020029#include <linux/kvm_host.h>
Eddie Dong1fd4f2a2007-07-18 12:03:39 +030030#include <linux/kvm.h>
31#include <linux/mm.h>
32#include <linux/highmem.h>
33#include <linux/smp.h>
34#include <linux/hrtimer.h>
35#include <linux/io.h>
36#include <asm/processor.h>
Eddie Dong1fd4f2a2007-07-18 12:03:39 +030037#include <asm/page.h>
38#include <asm/current.h>
Zhang Xiantao82470192007-12-17 13:59:56 +080039
40#include "ioapic.h"
41#include "lapic.h"
Marcelo Tosattif5244722008-07-26 17:01:00 -030042#include "irq.h"
Zhang Xiantao82470192007-12-17 13:59:56 +080043
Laurent Viviere25e3ed2007-10-12 11:01:59 +020044#if 0
45#define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
46#else
Eddie Dong1fd4f2a2007-07-18 12:03:39 +030047#define ioapic_debug(fmt, arg...)
Laurent Viviere25e3ed2007-10-12 11:01:59 +020048#endif
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -030049static int ioapic_deliver(struct kvm_ioapic *vioapic, int irq);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +030050
51static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
52 unsigned long addr,
53 unsigned long length)
54{
55 unsigned long result = 0;
56
57 switch (ioapic->ioregsel) {
58 case IOAPIC_REG_VERSION:
59 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
60 | (IOAPIC_VERSION_ID & 0xff));
61 break;
62
63 case IOAPIC_REG_APIC_ID:
64 case IOAPIC_REG_ARB_ID:
65 result = ((ioapic->id & 0xf) << 24);
66 break;
67
68 default:
69 {
70 u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
71 u64 redir_content;
72
73 ASSERT(redir_index < IOAPIC_NUM_PINS);
74
75 redir_content = ioapic->redirtbl[redir_index].bits;
76 result = (ioapic->ioregsel & 0x1) ?
77 (redir_content >> 32) & 0xffffffff :
78 redir_content & 0xffffffff;
79 break;
80 }
81 }
82
83 return result;
84}
85
86static void ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx)
87{
88 union ioapic_redir_entry *pent;
89
90 pent = &ioapic->redirtbl[idx];
91
92 if (!pent->fields.mask) {
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -030093 int injected = ioapic_deliver(ioapic, idx);
94 if (injected && pent->fields.trig_mode == IOAPIC_LEVEL_TRIG)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +030095 pent->fields.remote_irr = 1;
96 }
97 if (!pent->fields.trig_mode)
98 ioapic->irr &= ~(1 << idx);
99}
100
101static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
102{
103 unsigned index;
104
105 switch (ioapic->ioregsel) {
106 case IOAPIC_REG_VERSION:
107 /* Writes are ignored. */
108 break;
109
110 case IOAPIC_REG_APIC_ID:
111 ioapic->id = (val >> 24) & 0xf;
112 break;
113
114 case IOAPIC_REG_ARB_ID:
115 break;
116
117 default:
118 index = (ioapic->ioregsel - 0x10) >> 1;
119
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200120 ioapic_debug("change redir index %x val %x\n", index, val);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300121 if (index >= IOAPIC_NUM_PINS)
122 return;
123 if (ioapic->ioregsel & 1) {
124 ioapic->redirtbl[index].bits &= 0xffffffff;
125 ioapic->redirtbl[index].bits |= (u64) val << 32;
126 } else {
127 ioapic->redirtbl[index].bits &= ~0xffffffffULL;
128 ioapic->redirtbl[index].bits |= (u32) val;
129 ioapic->redirtbl[index].fields.remote_irr = 0;
130 }
131 if (ioapic->irr & (1 << index))
132 ioapic_service(ioapic, index);
133 break;
134 }
135}
136
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300137static int ioapic_inj_irq(struct kvm_ioapic *ioapic,
Zhang Xiantao8be54532007-12-02 22:35:57 +0800138 struct kvm_vcpu *vcpu,
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300139 u8 vector, u8 trig_mode, u8 delivery_mode)
140{
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200141 ioapic_debug("irq %d trig %d deliv %d\n", vector, trig_mode,
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300142 delivery_mode);
143
Zhang Xiantao0c7ac282007-12-02 22:49:09 +0800144 ASSERT((delivery_mode == IOAPIC_FIXED) ||
145 (delivery_mode == IOAPIC_LOWEST_PRIORITY));
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300146
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300147 return kvm_apic_set_irq(vcpu, vector, trig_mode);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300148}
149
Sheng Yang3419ffc2008-05-15 09:52:48 +0800150static void ioapic_inj_nmi(struct kvm_vcpu *vcpu)
151{
152 kvm_inject_nmi(vcpu);
Jan Kiszka26df99c2008-09-26 09:30:54 +0200153 kvm_vcpu_kick(vcpu);
Sheng Yang3419ffc2008-05-15 09:52:48 +0800154}
155
Sheng Yang68b76f52008-11-24 14:32:54 +0800156u32 kvm_ioapic_get_delivery_bitmask(struct kvm_ioapic *ioapic, u8 dest,
157 u8 dest_mode)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300158{
159 u32 mask = 0;
160 int i;
161 struct kvm *kvm = ioapic->kvm;
162 struct kvm_vcpu *vcpu;
163
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200164 ioapic_debug("dest %d dest_mode %d\n", dest, dest_mode);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300165
166 if (dest_mode == 0) { /* Physical mode. */
167 if (dest == 0xFF) { /* Broadcast. */
168 for (i = 0; i < KVM_MAX_VCPUS; ++i)
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800169 if (kvm->vcpus[i] && kvm->vcpus[i]->arch.apic)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300170 mask |= 1 << i;
171 return mask;
172 }
173 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
174 vcpu = kvm->vcpus[i];
175 if (!vcpu)
176 continue;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800177 if (kvm_apic_match_physical_addr(vcpu->arch.apic, dest)) {
178 if (vcpu->arch.apic)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300179 mask = 1 << i;
180 break;
181 }
182 }
183 } else if (dest != 0) /* Logical mode, MDA non-zero. */
184 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
185 vcpu = kvm->vcpus[i];
186 if (!vcpu)
187 continue;
Zhang Xiantaoad312c72007-12-13 23:50:52 +0800188 if (vcpu->arch.apic &&
189 kvm_apic_match_logical_addr(vcpu->arch.apic, dest))
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300190 mask |= 1 << vcpu->vcpu_id;
191 }
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200192 ioapic_debug("mask %x\n", mask);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300193 return mask;
194}
195
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300196static int ioapic_deliver(struct kvm_ioapic *ioapic, int irq)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300197{
198 u8 dest = ioapic->redirtbl[irq].fields.dest_id;
199 u8 dest_mode = ioapic->redirtbl[irq].fields.dest_mode;
200 u8 delivery_mode = ioapic->redirtbl[irq].fields.delivery_mode;
201 u8 vector = ioapic->redirtbl[irq].fields.vector;
202 u8 trig_mode = ioapic->redirtbl[irq].fields.trig_mode;
203 u32 deliver_bitmask;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300204 struct kvm_vcpu *vcpu;
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300205 int vcpu_id, r = 0;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300206
207 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200208 "vector=%x trig_mode=%x\n",
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300209 dest, dest_mode, delivery_mode, vector, trig_mode);
210
Sheng Yang68b76f52008-11-24 14:32:54 +0800211 deliver_bitmask = kvm_ioapic_get_delivery_bitmask(ioapic, dest,
212 dest_mode);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300213 if (!deliver_bitmask) {
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200214 ioapic_debug("no target on destination\n");
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300215 return 0;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300216 }
217
218 switch (delivery_mode) {
Zhang Xiantao0c7ac282007-12-02 22:49:09 +0800219 case IOAPIC_LOWEST_PRIORITY:
Zhang Xiantao8be54532007-12-02 22:35:57 +0800220 vcpu = kvm_get_lowest_prio_vcpu(ioapic->kvm, vector,
221 deliver_bitmask);
Avi Kivity8c35f232008-02-25 10:28:31 +0200222#ifdef CONFIG_X86
223 if (irq == 0)
224 vcpu = ioapic->kvm->vcpus[0];
225#endif
Zhang Xiantao8be54532007-12-02 22:35:57 +0800226 if (vcpu != NULL)
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300227 r = ioapic_inj_irq(ioapic, vcpu, vector,
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300228 trig_mode, delivery_mode);
229 else
Zhang Xiantao8be54532007-12-02 22:35:57 +0800230 ioapic_debug("null lowest prio vcpu: "
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200231 "mask=%x vector=%x delivery_mode=%x\n",
Zhang Xiantao0c7ac282007-12-02 22:49:09 +0800232 deliver_bitmask, vector, IOAPIC_LOWEST_PRIORITY);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300233 break;
Zhang Xiantao0c7ac282007-12-02 22:49:09 +0800234 case IOAPIC_FIXED:
Avi Kivity8c35f232008-02-25 10:28:31 +0200235#ifdef CONFIG_X86
236 if (irq == 0)
237 deliver_bitmask = 1;
238#endif
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300239 for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
240 if (!(deliver_bitmask & (1 << vcpu_id)))
241 continue;
242 deliver_bitmask &= ~(1 << vcpu_id);
243 vcpu = ioapic->kvm->vcpus[vcpu_id];
244 if (vcpu) {
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300245 r = ioapic_inj_irq(ioapic, vcpu, vector,
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300246 trig_mode, delivery_mode);
247 }
248 }
249 break;
Sheng Yang3419ffc2008-05-15 09:52:48 +0800250 case IOAPIC_NMI:
251 for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) {
252 if (!(deliver_bitmask & (1 << vcpu_id)))
253 continue;
254 deliver_bitmask &= ~(1 << vcpu_id);
255 vcpu = ioapic->kvm->vcpus[vcpu_id];
256 if (vcpu)
257 ioapic_inj_nmi(vcpu);
258 else
259 ioapic_debug("NMI to vcpu %d failed\n",
260 vcpu->vcpu_id);
261 }
262 break;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300263 default:
264 printk(KERN_WARNING "Unsupported delivery mode %d\n",
265 delivery_mode);
266 break;
267 }
Marcelo Tosattiff4b9df2008-06-05 00:08:11 -0300268 return r;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300269}
270
271void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
272{
273 u32 old_irr = ioapic->irr;
274 u32 mask = 1 << irq;
275 union ioapic_redir_entry entry;
276
277 if (irq >= 0 && irq < IOAPIC_NUM_PINS) {
278 entry = ioapic->redirtbl[irq];
279 level ^= entry.fields.polarity;
280 if (!level)
281 ioapic->irr &= ~mask;
282 else {
283 ioapic->irr |= mask;
284 if ((!entry.fields.trig_mode && old_irr != ioapic->irr)
285 || !entry.fields.remote_irr)
286 ioapic_service(ioapic, irq);
287 }
288 }
289}
290
Marcelo Tosattif5244722008-07-26 17:01:00 -0300291static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int gsi,
292 int trigger_mode)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300293{
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300294 union ioapic_redir_entry *ent;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300295
296 ent = &ioapic->redirtbl[gsi];
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300297
Marcelo Tosattif5244722008-07-26 17:01:00 -0300298 kvm_notify_acked_irq(ioapic->kvm, gsi);
299
300 if (trigger_mode == IOAPIC_LEVEL_TRIG) {
301 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
302 ent->fields.remote_irr = 0;
303 if (!ent->fields.mask && (ioapic->irr & (1 << gsi)))
304 ioapic_service(ioapic, gsi);
305 }
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300306}
307
Marcelo Tosattif5244722008-07-26 17:01:00 -0300308void kvm_ioapic_update_eoi(struct kvm *kvm, int vector, int trigger_mode)
Avi Kivity4fa6b9c2008-06-17 15:36:36 -0700309{
310 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
311 int i;
312
313 for (i = 0; i < IOAPIC_NUM_PINS; i++)
314 if (ioapic->redirtbl[i].fields.vector == vector)
Marcelo Tosattif5244722008-07-26 17:01:00 -0300315 __kvm_ioapic_update_eoi(ioapic, i, trigger_mode);
Avi Kivity4fa6b9c2008-06-17 15:36:36 -0700316}
317
Laurent Vivier92760492008-05-30 16:05:53 +0200318static int ioapic_in_range(struct kvm_io_device *this, gpa_t addr,
319 int len, int is_write)
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300320{
321 struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
322
323 return ((addr >= ioapic->base_address &&
324 (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
325}
326
327static void ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len,
328 void *val)
329{
330 struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
331 u32 result;
332
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200333 ioapic_debug("addr %lx\n", (unsigned long)addr);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300334 ASSERT(!(addr & 0xf)); /* check alignment */
335
336 addr &= 0xff;
337 switch (addr) {
338 case IOAPIC_REG_SELECT:
339 result = ioapic->ioregsel;
340 break;
341
342 case IOAPIC_REG_WINDOW:
343 result = ioapic_read_indirect(ioapic, addr, len);
344 break;
345
346 default:
347 result = 0;
348 break;
349 }
350 switch (len) {
351 case 8:
352 *(u64 *) val = result;
353 break;
354 case 1:
355 case 2:
356 case 4:
357 memcpy(val, (char *)&result, len);
358 break;
359 default:
360 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
361 }
362}
363
364static void ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len,
365 const void *val)
366{
367 struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;
368 u32 data;
369
Laurent Viviere25e3ed2007-10-12 11:01:59 +0200370 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
371 (void*)addr, len, val);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300372 ASSERT(!(addr & 0xf)); /* check alignment */
373 if (len == 4 || len == 8)
374 data = *(u32 *) val;
375 else {
376 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
377 return;
378 }
379
380 addr &= 0xff;
381 switch (addr) {
382 case IOAPIC_REG_SELECT:
383 ioapic->ioregsel = data;
384 break;
385
386 case IOAPIC_REG_WINDOW:
387 ioapic_write_indirect(ioapic, data);
388 break;
Zhang Xiantaob1fd3d32007-12-02 22:53:07 +0800389#ifdef CONFIG_IA64
390 case IOAPIC_REG_EOI:
Xiantao Zhang26815a62008-08-19 20:48:03 +0800391 kvm_ioapic_update_eoi(ioapic->kvm, data, IOAPIC_LEVEL_TRIG);
Zhang Xiantaob1fd3d32007-12-02 22:53:07 +0800392 break;
393#endif
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300394
395 default:
396 break;
397 }
398}
399
Eddie Dong8c392692007-10-10 12:15:54 +0200400void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
401{
402 int i;
403
404 for (i = 0; i < IOAPIC_NUM_PINS; i++)
405 ioapic->redirtbl[i].fields.mask = 1;
406 ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
407 ioapic->ioregsel = 0;
408 ioapic->irr = 0;
409 ioapic->id = 0;
410}
411
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300412int kvm_ioapic_init(struct kvm *kvm)
413{
414 struct kvm_ioapic *ioapic;
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300415
416 ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
417 if (!ioapic)
418 return -ENOMEM;
Zhang Xiantaod7deeeb2007-12-14 10:17:34 +0800419 kvm->arch.vioapic = ioapic;
Eddie Dong8c392692007-10-10 12:15:54 +0200420 kvm_ioapic_reset(ioapic);
Eddie Dong1fd4f2a2007-07-18 12:03:39 +0300421 ioapic->dev.read = ioapic_mmio_read;
422 ioapic->dev.write = ioapic_mmio_write;
423 ioapic->dev.in_range = ioapic_in_range;
424 ioapic->dev.private = ioapic;
425 ioapic->kvm = kvm;
426 kvm_io_bus_register_dev(&kvm->mmio_bus, &ioapic->dev);
427 return 0;
428}