| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Idle processing for ARMv7-based Qualcomm SoCs. |
| 3 | * |
| 4 | * Copyright (C) 2007 Google, Inc. |
| Pushkar Joshi | 64cae78 | 2012-12-15 18:59:03 -0800 | [diff] [blame] | 5 | * Copyright (c) 2007-2009, 2011-2013 The Linux Foundation. All rights reserved. |
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 6 | * |
| 7 | * This software is licensed under the terms of the GNU General Public |
| 8 | * License version 2, as published by the Free Software Foundation, and |
| 9 | * may be copied, distributed, and modified under those terms. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #include <linux/linkage.h> |
| 19 | #include <linux/threads.h> |
| 20 | #include <asm/assembler.h> |
| 21 | |
| Mahesh Sivasubramanian | 56a3543 | 2013-10-15 14:36:58 -0600 | [diff] [blame] | 22 | .arm |
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 23 | ENTRY(msm_pm_boot_entry) |
| 24 | mrc p15, 0, r0, c0, c0, 5 /* MPIDR */ |
| 25 | and r0, r0, #15 /* what CPU am I */ |
| 26 | |
| Mahesh Sivasubramanian | cb39662 | 2012-03-14 14:50:37 -0600 | [diff] [blame] | 27 | ldr r1, =msm_pc_debug_counters_phys /*phys addr for IMEM reg */ |
| 28 | ldr r2, =msm_pm_boot_entry |
| 29 | adr r3, msm_pm_boot_entry |
| 30 | add r1, r1, r3 /* translate virt to phys addr */ |
| 31 | sub r1, r1, r2 |
| 32 | ldr r1,[r1] |
| 33 | |
| 34 | cmp r1, #0 |
| 35 | beq skip_pc_debug3 |
| 36 | add r1, r1, r0, LSL #4 /* debug location for this CPU */ |
| 37 | add r1, #4 /* warmboot entry counter*/ |
| 38 | ldr r2, [r1] |
| 39 | add r2, #1 |
| 40 | str r2, [r1] |
| 41 | |
| 42 | skip_pc_debug3: |
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 43 | ldr r1, =msm_pm_boot_vector |
| 44 | ldr r2, =msm_pm_boot_entry |
| 45 | adr r3, msm_pm_boot_entry |
| 46 | add r1, r1, r3 /* translate virt to phys addr */ |
| 47 | sub r1, r1, r2 |
| 48 | |
| 49 | add r1, r1, r0, LSL #2 /* locate boot vector for our cpu */ |
| 50 | ldr pc, [r1] /* jump */ |
| 51 | |
| Mahesh Sivasubramanian | 56a3543 | 2013-10-15 14:36:58 -0600 | [diff] [blame] | 52 | 3: .long . |
| Maheshkumar Sivasubramanian | a012e09 | 2011-08-18 10:13:03 -0600 | [diff] [blame] | 53 | |
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 54 | .data |
| 55 | |
| Steve Muckle | c25a936 | 2012-03-22 16:40:01 -0700 | [diff] [blame] | 56 | .globl msm_pm_boot_vector |
| Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 57 | msm_pm_boot_vector: |
| 58 | .space 4 * NR_CPUS |
| Maheshkumar Sivasubramanian | a012e09 | 2011-08-18 10:13:03 -0600 | [diff] [blame] | 59 | |
| Mahesh Sivasubramanian | cb39662 | 2012-03-14 14:50:37 -0600 | [diff] [blame] | 60 | .globl msm_pc_debug_counters_phys |
| 61 | msm_pc_debug_counters_phys: |
| 62 | .long 0x0 |