blob: 27c6df497ce9d387925cab5c4bcf5ccf9a8f119f [file] [log] [blame]
Matt Wagantall33d01f52012-02-23 23:27:44 -08001/*
2 * Copyright (C) 2007 Google, Inc.
Saravana Kannanc85ecf92013-01-21 17:58:35 -08003 * Copyright (c) 2007-2013, The Linux Foundation. All rights reserved.
Matt Wagantall33d01f52012-02-23 23:27:44 -08004 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#ifndef __MACH_CLK_PROVIDER_H
17#define __MACH_CLK_PROVIDER_H
18
19#include <linux/types.h>
20#include <linux/list.h>
21#include <linux/clkdev.h>
22#include <linux/spinlock.h>
Stephen Boyda1f610a2012-09-22 00:40:37 -070023#include <linux/mutex.h>
Patrick Dalyebc26bc2013-02-05 11:49:07 -080024#include <linux/regulator/consumer.h>
Matt Wagantall33d01f52012-02-23 23:27:44 -080025#include <mach/clk.h>
26
27/*
28 * Bit manipulation macros
29 */
30#define BM(msb, lsb) (((((uint32_t)-1) << (31-msb)) >> (31-msb+lsb)) << lsb)
31#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
32
33/*
34 * Halt/Status Checking Mode Macros
35 */
36#define HALT 0 /* Bit pol: 1 = halted */
37#define NOCHECK 1 /* No bit to check, do nothing */
38#define HALT_VOTED 2 /* Bit pol: 1 = halted; delay on disable */
39#define ENABLE 3 /* Bit pol: 1 = running */
40#define ENABLE_VOTED 4 /* Bit pol: 1 = running; delay on disable */
41#define DELAY 5 /* No bit to check, just delay */
42
Matt Wagantall33d01f52012-02-23 23:27:44 -080043/**
44 * struct clk_vdd_class - Voltage scaling class
45 * @class_name: name of the class
Patrick Dalyebc26bc2013-02-05 11:49:07 -080046 * @regulator: array of regulators.
47 * @num_regulators: size of regulator array. Standard regulator APIs will be
48 used if this field > 0.
49 * @set_vdd: function to call when applying a new voltage setting.
50 * @vdd_uv: sorted 2D array of legal voltage settings. Indexed by level, then
51 regulator.
Patrick Daly653c0b52013-04-16 17:18:28 -070052 * @vdd_ua: sorted 2D array of legal cureent settings. Indexed by level, then
53 regulator. Optional parameter.
Patrick Dalyebc26bc2013-02-05 11:49:07 -080054 * @level_votes: array of votes for each level.
55 * @num_levels: specifies the size of level_votes array.
Matt Wagantall33d01f52012-02-23 23:27:44 -080056 * @cur_level: the currently set voltage level
57 * @lock: lock to protect this struct
58 */
59struct clk_vdd_class {
60 const char *class_name;
Patrick Dalyebc26bc2013-02-05 11:49:07 -080061 struct regulator **regulator;
62 int num_regulators;
Matt Wagantall33d01f52012-02-23 23:27:44 -080063 int (*set_vdd)(struct clk_vdd_class *v_class, int level);
Junjie Wubb5a79e2013-05-15 13:12:39 -070064 int *vdd_uv;
65 int *vdd_ua;
Saravana Kannan55e959d2012-10-15 22:16:04 -070066 int *level_votes;
67 int num_levels;
Matt Wagantall33d01f52012-02-23 23:27:44 -080068 unsigned long cur_level;
Stephen Boyda1f610a2012-09-22 00:40:37 -070069 struct mutex lock;
Matt Wagantall33d01f52012-02-23 23:27:44 -080070};
71
Saravana Kannan55e959d2012-10-15 22:16:04 -070072#define DEFINE_VDD_CLASS(_name, _set_vdd, _num_levels) \
Matt Wagantall33d01f52012-02-23 23:27:44 -080073 struct clk_vdd_class _name = { \
74 .class_name = #_name, \
75 .set_vdd = _set_vdd, \
Saravana Kannan55e959d2012-10-15 22:16:04 -070076 .level_votes = (int [_num_levels]) {}, \
77 .num_levels = _num_levels, \
78 .cur_level = _num_levels, \
Stephen Boyda1f610a2012-09-22 00:40:37 -070079 .lock = __MUTEX_INITIALIZER(_name.lock) \
Matt Wagantall33d01f52012-02-23 23:27:44 -080080 }
81
Patrick Daly653c0b52013-04-16 17:18:28 -070082#define DEFINE_VDD_REGULATORS(_name, _num_levels, _num_regulators, _vdd_uv, \
83 _vdd_ua) \
Patrick Dalyebc26bc2013-02-05 11:49:07 -080084 struct clk_vdd_class _name = { \
85 .class_name = #_name, \
86 .vdd_uv = _vdd_uv, \
Patrick Daly653c0b52013-04-16 17:18:28 -070087 .vdd_ua = _vdd_ua, \
Patrick Dalyebc26bc2013-02-05 11:49:07 -080088 .regulator = (struct regulator * [_num_regulators]) {}, \
89 .num_regulators = _num_regulators, \
90 .level_votes = (int [_num_levels]) {}, \
91 .num_levels = _num_levels, \
92 .cur_level = _num_levels, \
93 .lock = __MUTEX_INITIALIZER(_name.lock) \
94 }
95
Matt Wagantall33d01f52012-02-23 23:27:44 -080096enum handoff {
97 HANDOFF_ENABLED_CLK,
98 HANDOFF_DISABLED_CLK,
Matt Wagantall33d01f52012-02-23 23:27:44 -080099};
100
101struct clk_ops {
102 int (*prepare)(struct clk *clk);
103 int (*enable)(struct clk *clk);
104 void (*disable)(struct clk *clk);
105 void (*unprepare)(struct clk *clk);
106 void (*enable_hwcg)(struct clk *clk);
107 void (*disable_hwcg)(struct clk *clk);
108 int (*in_hwcg_mode)(struct clk *clk);
109 enum handoff (*handoff)(struct clk *clk);
110 int (*reset)(struct clk *clk, enum clk_reset_action action);
111 int (*set_rate)(struct clk *clk, unsigned long rate);
112 int (*set_max_rate)(struct clk *clk, unsigned long rate);
113 int (*set_flags)(struct clk *clk, unsigned flags);
114 unsigned long (*get_rate)(struct clk *clk);
115 int (*list_rate)(struct clk *clk, unsigned n);
116 int (*is_enabled)(struct clk *clk);
117 long (*round_rate)(struct clk *clk, unsigned long rate);
118 int (*set_parent)(struct clk *clk, struct clk *parent);
119 struct clk *(*get_parent)(struct clk *clk);
120 bool (*is_local)(struct clk *clk);
121};
122
123/**
124 * struct clk
125 * @prepare_count: prepare refcount
126 * @prepare_lock: protects clk_prepare()/clk_unprepare() path and @prepare_count
127 * @count: enable refcount
128 * @lock: protects clk_enable()/clk_disable() path and @count
129 * @depends: non-direct parent of clock to enable when this clock is enabled
130 * @vdd_class: voltage scaling requirement class
131 * @fmax: maximum frequency in Hz supported at each voltage level
Saravana Kannan7a6532e2012-10-18 20:51:13 -0700132 * @parent: the current source of this clock
Matt Wagantall33d01f52012-02-23 23:27:44 -0800133 */
134struct clk {
135 uint32_t flags;
136 struct clk_ops *ops;
137 const char *dbg_name;
138 struct clk *depends;
139 struct clk_vdd_class *vdd_class;
Saravana Kannan55e959d2012-10-15 22:16:04 -0700140 unsigned long *fmax;
141 int num_fmax;
Matt Wagantall33d01f52012-02-23 23:27:44 -0800142 unsigned long rate;
Saravana Kannan7a6532e2012-10-18 20:51:13 -0700143 struct clk *parent;
Matt Wagantall33d01f52012-02-23 23:27:44 -0800144
145 struct list_head children;
146 struct list_head siblings;
147
148 unsigned count;
149 spinlock_t lock;
150 unsigned prepare_count;
151 struct mutex prepare_lock;
152};
153
154#define CLK_INIT(name) \
155 .lock = __SPIN_LOCK_UNLOCKED((name).lock), \
156 .prepare_lock = __MUTEX_INITIALIZER((name).prepare_lock), \
157 .children = LIST_HEAD_INIT((name).children), \
158 .siblings = LIST_HEAD_INIT((name).siblings)
159
160int vote_vdd_level(struct clk_vdd_class *vdd_class, int level);
161int unvote_vdd_level(struct clk_vdd_class *vdd_class, int level);
Saravana Kannan33c6a202013-03-20 22:19:10 -0700162int __clk_pre_reparent(struct clk *c, struct clk *new, unsigned long *flags);
163void __clk_post_reparent(struct clk *c, struct clk *old, unsigned long *flags);
Matt Wagantall33d01f52012-02-23 23:27:44 -0800164
165/* Register clocks with the MSM clock driver */
166int msm_clock_register(struct clk_lookup *table, size_t size);
167
168extern struct clk dummy_clk;
169
170#define CLK_DUMMY(clk_name, clk_id, clk_dev, flags) { \
171 .con_id = clk_name, \
172 .dev_id = clk_dev, \
173 .clk = &dummy_clk, \
174 }
175
176#define CLK_LOOKUP(con, c, dev) { .con_id = con, .clk = &c, .dev_id = dev }
177
178#endif