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Zang Roy-r619115e123b82006-11-08 19:49:13 -08001/*******************************************************************************
2
3 Copyright(c) 2006 Tundra Semiconductor Corporation.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms of the GNU General Public License as published by the Free
7 Software Foundation; either version 2 of the License, or (at your option)
8 any later version.
9
10 This program is distributed in the hope that it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc., 59
17 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18
19*******************************************************************************/
20
21/* This driver is based on the driver code originally developed
22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by
23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation
24 *
25 * Currently changes from original version are:
26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com)
27 * - modifications to handle two ports independently and support for
28 * additional PHY devices (alexandre.bounine@tundra.com)
29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com)
30 *
31 */
32
33#include <linux/module.h>
34#include <linux/types.h>
35#include <linux/init.h>
36#include <linux/net.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/slab.h>
Zang Roy-r619115e123b82006-11-08 19:49:13 -080041#include <linux/spinlock.h>
42#include <linux/delay.h>
43#include <linux/crc32.h>
44#include <linux/mii.h>
45#include <linux/device.h>
46#include <linux/pci.h>
47#include <linux/rtnetlink.h>
48#include <linux/timer.h>
49#include <linux/platform_device.h>
50#include <linux/etherdevice.h>
51
52#include <asm/system.h>
53#include <asm/io.h>
54#include <asm/tsi108.h>
55
56#include "tsi108_eth.h"
57
58#define MII_READ_DELAY 10000 /* max link wait time in msec */
59
60#define TSI108_RXRING_LEN 256
61
62/* NOTE: The driver currently does not support receiving packets
63 * larger than the buffer size, so don't decrease this (unless you
64 * want to add such support).
65 */
66#define TSI108_RXBUF_SIZE 1536
67
68#define TSI108_TXRING_LEN 256
69
70#define TSI108_TX_INT_FREQ 64
71
72/* Check the phy status every half a second. */
73#define CHECK_PHY_INTERVAL (HZ/2)
74
75static int tsi108_init_one(struct platform_device *pdev);
76static int tsi108_ether_remove(struct platform_device *pdev);
77
78struct tsi108_prv_data {
79 void __iomem *regs; /* Base of normal regs */
80 void __iomem *phyregs; /* Base of register bank used for PHY access */
81
Stephen Hemmingerbea33482007-10-03 16:41:36 -070082 struct net_device *dev;
83 struct napi_struct napi;
84
Zang Roy-r619115e123b82006-11-08 19:49:13 -080085 unsigned int phy; /* Index of PHY for this interface */
86 unsigned int irq_num;
87 unsigned int id;
Josh Boyerc1b78d02007-05-08 07:26:22 +100088 unsigned int phy_type;
Zang Roy-r619115e123b82006-11-08 19:49:13 -080089
90 struct timer_list timer;/* Timer that triggers the check phy function */
91 unsigned int rxtail; /* Next entry in rxring to read */
92 unsigned int rxhead; /* Next entry in rxring to give a new buffer */
93 unsigned int rxfree; /* Number of free, allocated RX buffers */
94
95 unsigned int rxpending; /* Non-zero if there are still descriptors
96 * to be processed from a previous descriptor
97 * interrupt condition that has been cleared */
98
99 unsigned int txtail; /* Next TX descriptor to check status on */
100 unsigned int txhead; /* Next TX descriptor to use */
101
102 /* Number of free TX descriptors. This could be calculated from
103 * rxhead and rxtail if one descriptor were left unused to disambiguate
104 * full and empty conditions, but it's simpler to just keep track
105 * explicitly. */
106
107 unsigned int txfree;
108
109 unsigned int phy_ok; /* The PHY is currently powered on. */
110
111 /* PHY status (duplex is 1 for half, 2 for full,
112 * so that the default 0 indicates that neither has
113 * yet been configured). */
114
115 unsigned int link_up;
116 unsigned int speed;
117 unsigned int duplex;
118
119 tx_desc *txring;
120 rx_desc *rxring;
121 struct sk_buff *txskbs[TSI108_TXRING_LEN];
122 struct sk_buff *rxskbs[TSI108_RXRING_LEN];
123
124 dma_addr_t txdma, rxdma;
125
126 /* txlock nests in misclock and phy_lock */
127
128 spinlock_t txlock, misclock;
129
130 /* stats is used to hold the upper bits of each hardware counter,
131 * and tmpstats is used to hold the full values for returning
132 * to the caller of get_stats(). They must be separate in case
133 * an overflow interrupt occurs before the stats are consumed.
134 */
135
136 struct net_device_stats stats;
137 struct net_device_stats tmpstats;
138
139 /* These stats are kept separate in hardware, thus require individual
140 * fields for handling carry. They are combined in get_stats.
141 */
142
143 unsigned long rx_fcs; /* Add to rx_frame_errors */
144 unsigned long rx_short_fcs; /* Add to rx_frame_errors */
145 unsigned long rx_long_fcs; /* Add to rx_frame_errors */
146 unsigned long rx_underruns; /* Add to rx_length_errors */
147 unsigned long rx_overruns; /* Add to rx_length_errors */
148
149 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */
150 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */
151
152 unsigned long mc_hash[16];
153 u32 msg_enable; /* debug message level */
154 struct mii_if_info mii_if;
155 unsigned int init_media;
156};
157
158/* Structure for a device driver */
159
160static struct platform_driver tsi_eth_driver = {
161 .probe = tsi108_init_one,
162 .remove = tsi108_ether_remove,
163 .driver = {
164 .name = "tsi-ethernet",
165 },
166};
167
168static void tsi108_timed_checker(unsigned long dev_ptr);
169
170static void dump_eth_one(struct net_device *dev)
171{
172 struct tsi108_prv_data *data = netdev_priv(dev);
173
174 printk("Dumping %s...\n", dev->name);
175 printk("intstat %x intmask %x phy_ok %d"
176 " link %d speed %d duplex %d\n",
177 TSI_READ(TSI108_EC_INTSTAT),
178 TSI_READ(TSI108_EC_INTMASK), data->phy_ok,
179 data->link_up, data->speed, data->duplex);
180
181 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n",
182 data->txhead, data->txtail, data->txfree,
183 TSI_READ(TSI108_EC_TXSTAT),
184 TSI_READ(TSI108_EC_TXESTAT),
185 TSI_READ(TSI108_EC_TXERR));
186
187 printk("RX: head %d, tail %d, free %d, stat %x,"
188 " estat %x, err %x, pending %d\n\n",
189 data->rxhead, data->rxtail, data->rxfree,
190 TSI_READ(TSI108_EC_RXSTAT),
191 TSI_READ(TSI108_EC_RXESTAT),
192 TSI_READ(TSI108_EC_RXERR), data->rxpending);
193}
194
195/* Synchronization is needed between the thread and up/down events.
196 * Note that the PHY is accessed through the same registers for both
197 * interfaces, so this can't be made interface-specific.
198 */
199
200static DEFINE_SPINLOCK(phy_lock);
201
202static int tsi108_read_mii(struct tsi108_prv_data *data, int reg)
203{
204 unsigned i;
205
206 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
207 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
208 (reg << TSI108_MAC_MII_ADDR_REG));
209 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0);
210 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ);
211 for (i = 0; i < 100; i++) {
212 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
213 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY)))
214 break;
215 udelay(10);
216 }
217
218 if (i == 100)
219 return 0xffff;
220 else
221 return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN));
222}
223
224static void tsi108_write_mii(struct tsi108_prv_data *data,
225 int reg, u16 val)
226{
227 unsigned i = 100;
228 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR,
229 (data->phy << TSI108_MAC_MII_ADDR_PHY) |
230 (reg << TSI108_MAC_MII_ADDR_REG));
231 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val);
232 while (i--) {
233 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) &
234 TSI108_MAC_MII_IND_BUSY))
235 break;
236 udelay(10);
237 }
238}
239
240static int tsi108_mdio_read(struct net_device *dev, int addr, int reg)
241{
242 struct tsi108_prv_data *data = netdev_priv(dev);
243 return tsi108_read_mii(data, reg);
244}
245
246static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val)
247{
248 struct tsi108_prv_data *data = netdev_priv(dev);
249 tsi108_write_mii(data, reg, val);
250}
251
252static inline void tsi108_write_tbi(struct tsi108_prv_data *data,
253 int reg, u16 val)
254{
255 unsigned i = 1000;
256 TSI_WRITE(TSI108_MAC_MII_ADDR,
257 (0x1e << TSI108_MAC_MII_ADDR_PHY)
258 | (reg << TSI108_MAC_MII_ADDR_REG));
259 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val);
260 while(i--) {
261 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY))
262 return;
263 udelay(10);
264 }
265 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
266}
267
268static int mii_speed(struct mii_if_info *mii)
269{
270 int advert, lpa, val, media;
271 int lpa2 = 0;
272 int speed;
273
274 if (!mii_link_ok(mii))
275 return 0;
276
277 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
278 if ((val & BMSR_ANEGCOMPLETE) == 0)
279 return 0;
280
281 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
282 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
283 media = mii_nway_result(advert & lpa);
284
285 if (mii->supports_gmii)
286 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000);
287
288 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 :
289 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10);
290 return speed;
291}
292
293static void tsi108_check_phy(struct net_device *dev)
294{
295 struct tsi108_prv_data *data = netdev_priv(dev);
296 u32 mac_cfg2_reg, portctrl_reg;
297 u32 duplex;
298 u32 speed;
299 unsigned long flags;
300
301 /* Do a dummy read, as for some reason the first read
302 * after a link becomes up returns link down, even if
303 * it's been a while since the link came up.
304 */
305
306 spin_lock_irqsave(&phy_lock, flags);
307
308 if (!data->phy_ok)
309 goto out;
310
311 tsi108_read_mii(data, MII_BMSR);
312
313 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media);
314 data->init_media = 0;
315
316 if (netif_carrier_ok(dev)) {
317
318 speed = mii_speed(&data->mii_if);
319
320 if ((speed != data->speed) || duplex) {
321
322 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2);
323 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL);
324
325 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK;
326
327 if (speed == 1000) {
328 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG;
329 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG;
330 } else {
331 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG;
332 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG;
333 }
334
335 data->speed = speed;
336
337 if (data->mii_if.full_duplex) {
338 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX;
339 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX;
340 data->duplex = 2;
341 } else {
342 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX;
343 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX;
344 data->duplex = 1;
345 }
346
347 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg);
348 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg);
349
350 if (data->link_up == 0) {
351 /* The manual says it can take 3-4 usecs for the speed change
352 * to take effect.
353 */
354 udelay(5);
355
356 spin_lock(&data->txlock);
357 if (is_valid_ether_addr(dev->dev_addr) && data->txfree)
358 netif_wake_queue(dev);
359
360 data->link_up = 1;
361 spin_unlock(&data->txlock);
362 }
363 }
364
365 } else {
366 if (data->link_up == 1) {
367 netif_stop_queue(dev);
368 data->link_up = 0;
369 printk(KERN_NOTICE "%s : link is down\n", dev->name);
370 }
371
372 goto out;
373 }
374
375
376out:
377 spin_unlock_irqrestore(&phy_lock, flags);
378}
379
380static inline void
381tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift,
382 unsigned long *upper)
383{
384 if (carry & carry_bit)
385 *upper += carry_shift;
386}
387
388static void tsi108_stat_carry(struct net_device *dev)
389{
390 struct tsi108_prv_data *data = netdev_priv(dev);
391 u32 carry1, carry2;
392
393 spin_lock_irq(&data->misclock);
394
395 carry1 = TSI_READ(TSI108_STAT_CARRY1);
396 carry2 = TSI_READ(TSI108_STAT_CARRY2);
397
398 TSI_WRITE(TSI108_STAT_CARRY1, carry1);
399 TSI_WRITE(TSI108_STAT_CARRY2, carry2);
400
401 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES,
402 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
403
404 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS,
405 TSI108_STAT_RXPKTS_CARRY,
406 &data->stats.rx_packets);
407
408 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS,
409 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs);
410
411 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST,
412 TSI108_STAT_RXMCAST_CARRY,
413 &data->stats.multicast);
414
415 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN,
416 TSI108_STAT_RXALIGN_CARRY,
417 &data->stats.rx_frame_errors);
418
419 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH,
420 TSI108_STAT_RXLENGTH_CARRY,
421 &data->stats.rx_length_errors);
422
423 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT,
424 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
425
426 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO,
427 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
428
429 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG,
430 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
431
432 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER,
433 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs);
434
435 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP,
436 TSI108_STAT_RXDROP_CARRY,
437 &data->stats.rx_missed_errors);
438
439 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES,
440 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
441
442 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS,
443 TSI108_STAT_TXPKTS_CARRY,
444 &data->stats.tx_packets);
445
446 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF,
447 TSI108_STAT_TXEXDEF_CARRY,
448 &data->stats.tx_aborted_errors);
449
450 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL,
451 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort);
452
453 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL,
454 TSI108_STAT_TXTCOL_CARRY,
455 &data->stats.collisions);
456
457 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE,
458 TSI108_STAT_TXPAUSEDROP_CARRY,
459 &data->tx_pause_drop);
460
461 spin_unlock_irq(&data->misclock);
462}
463
464/* Read a stat counter atomically with respect to carries.
465 * data->misclock must be held.
466 */
467static inline unsigned long
468tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit,
469 int carry_shift, unsigned long *upper)
470{
471 int carryreg;
472 unsigned long val;
473
474 if (reg < 0xb0)
475 carryreg = TSI108_STAT_CARRY1;
476 else
477 carryreg = TSI108_STAT_CARRY2;
478
479 again:
480 val = TSI_READ(reg) | *upper;
481
482 /* Check to see if it overflowed, but the interrupt hasn't
483 * been serviced yet. If so, handle the carry here, and
484 * try again.
485 */
486
487 if (unlikely(TSI_READ(carryreg) & carry_bit)) {
488 *upper += carry_shift;
489 TSI_WRITE(carryreg, carry_bit);
490 goto again;
491 }
492
493 return val;
494}
495
496static struct net_device_stats *tsi108_get_stats(struct net_device *dev)
497{
498 unsigned long excol;
499
500 struct tsi108_prv_data *data = netdev_priv(dev);
501 spin_lock_irq(&data->misclock);
502
503 data->tmpstats.rx_packets =
504 tsi108_read_stat(data, TSI108_STAT_RXPKTS,
505 TSI108_STAT_CARRY1_RXPKTS,
506 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets);
507
508 data->tmpstats.tx_packets =
509 tsi108_read_stat(data, TSI108_STAT_TXPKTS,
510 TSI108_STAT_CARRY2_TXPKTS,
511 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets);
512
513 data->tmpstats.rx_bytes =
514 tsi108_read_stat(data, TSI108_STAT_RXBYTES,
515 TSI108_STAT_CARRY1_RXBYTES,
516 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes);
517
518 data->tmpstats.tx_bytes =
519 tsi108_read_stat(data, TSI108_STAT_TXBYTES,
520 TSI108_STAT_CARRY2_TXBYTES,
521 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes);
522
523 data->tmpstats.multicast =
524 tsi108_read_stat(data, TSI108_STAT_RXMCAST,
525 TSI108_STAT_CARRY1_RXMCAST,
526 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast);
527
528 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL,
529 TSI108_STAT_CARRY2_TXEXCOL,
530 TSI108_STAT_TXEXCOL_CARRY,
531 &data->tx_coll_abort);
532
533 data->tmpstats.collisions =
534 tsi108_read_stat(data, TSI108_STAT_TXTCOL,
535 TSI108_STAT_CARRY2_TXTCOL,
536 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions);
537
538 data->tmpstats.collisions += excol;
539
540 data->tmpstats.rx_length_errors =
541 tsi108_read_stat(data, TSI108_STAT_RXLENGTH,
542 TSI108_STAT_CARRY1_RXLENGTH,
543 TSI108_STAT_RXLENGTH_CARRY,
544 &data->stats.rx_length_errors);
545
546 data->tmpstats.rx_length_errors +=
547 tsi108_read_stat(data, TSI108_STAT_RXRUNT,
548 TSI108_STAT_CARRY1_RXRUNT,
549 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns);
550
551 data->tmpstats.rx_length_errors +=
552 tsi108_read_stat(data, TSI108_STAT_RXJUMBO,
553 TSI108_STAT_CARRY1_RXJUMBO,
554 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns);
555
556 data->tmpstats.rx_frame_errors =
557 tsi108_read_stat(data, TSI108_STAT_RXALIGN,
558 TSI108_STAT_CARRY1_RXALIGN,
559 TSI108_STAT_RXALIGN_CARRY,
560 &data->stats.rx_frame_errors);
561
562 data->tmpstats.rx_frame_errors +=
563 tsi108_read_stat(data, TSI108_STAT_RXFCS,
564 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY,
565 &data->rx_fcs);
566
567 data->tmpstats.rx_frame_errors +=
568 tsi108_read_stat(data, TSI108_STAT_RXFRAG,
569 TSI108_STAT_CARRY1_RXFRAG,
570 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs);
571
572 data->tmpstats.rx_missed_errors =
573 tsi108_read_stat(data, TSI108_STAT_RXDROP,
574 TSI108_STAT_CARRY1_RXDROP,
575 TSI108_STAT_RXDROP_CARRY,
576 &data->stats.rx_missed_errors);
577
578 /* These three are maintained by software. */
579 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors;
580 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors;
581
582 data->tmpstats.tx_aborted_errors =
583 tsi108_read_stat(data, TSI108_STAT_TXEXDEF,
584 TSI108_STAT_CARRY2_TXEXDEF,
585 TSI108_STAT_TXEXDEF_CARRY,
586 &data->stats.tx_aborted_errors);
587
588 data->tmpstats.tx_aborted_errors +=
589 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP,
590 TSI108_STAT_CARRY2_TXPAUSE,
591 TSI108_STAT_TXPAUSEDROP_CARRY,
592 &data->tx_pause_drop);
593
594 data->tmpstats.tx_aborted_errors += excol;
595
596 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors;
597 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors +
598 data->tmpstats.rx_crc_errors +
599 data->tmpstats.rx_frame_errors +
600 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors;
601
602 spin_unlock_irq(&data->misclock);
603 return &data->tmpstats;
604}
605
606static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev)
607{
608 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH,
609 TSI108_EC_RXQ_PTRHIGH_VALID);
610
611 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO
612 | TSI108_EC_RXCTRL_QUEUE0);
613}
614
615static void tsi108_restart_tx(struct tsi108_prv_data * data)
616{
617 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH,
618 TSI108_EC_TXQ_PTRHIGH_VALID);
619
620 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT |
621 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0);
622}
623
624/* txlock must be held by caller, with IRQs disabled, and
625 * with permission to re-enable them when the lock is dropped.
626 */
627static void tsi108_complete_tx(struct net_device *dev)
628{
629 struct tsi108_prv_data *data = netdev_priv(dev);
630 int tx;
631 struct sk_buff *skb;
632 int release = 0;
633
634 while (!data->txfree || data->txhead != data->txtail) {
635 tx = data->txtail;
636
637 if (data->txring[tx].misc & TSI108_TX_OWN)
638 break;
639
640 skb = data->txskbs[tx];
641
642 if (!(data->txring[tx].misc & TSI108_TX_OK))
643 printk("%s: bad tx packet, misc %x\n",
644 dev->name, data->txring[tx].misc);
645
646 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
647 data->txfree++;
648
649 if (data->txring[tx].misc & TSI108_TX_EOF) {
650 dev_kfree_skb_any(skb);
651 release++;
652 }
653 }
654
655 if (release) {
656 if (is_valid_ether_addr(dev->dev_addr) && data->link_up)
657 netif_wake_queue(dev);
658 }
659}
660
661static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev)
662{
663 struct tsi108_prv_data *data = netdev_priv(dev);
664 int frags = skb_shinfo(skb)->nr_frags + 1;
665 int i;
666
667 if (!data->phy_ok && net_ratelimit())
668 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name);
669
670 if (!data->link_up) {
671 printk(KERN_ERR "%s: Transmit while link is down!\n",
672 dev->name);
673 netif_stop_queue(dev);
674 return NETDEV_TX_BUSY;
675 }
676
677 if (data->txfree < MAX_SKB_FRAGS + 1) {
678 netif_stop_queue(dev);
679
680 if (net_ratelimit())
681 printk(KERN_ERR "%s: Transmit with full tx ring!\n",
682 dev->name);
683 return NETDEV_TX_BUSY;
684 }
685
686 if (data->txfree - frags < MAX_SKB_FRAGS + 1) {
687 netif_stop_queue(dev);
688 }
689
690 spin_lock_irq(&data->txlock);
691
692 for (i = 0; i < frags; i++) {
693 int misc = 0;
694 int tx = data->txhead;
695
696 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with
697 * the interrupt bit. TX descriptor-complete interrupts are
698 * enabled when the queue fills up, and masked when there is
699 * still free space. This way, when saturating the outbound
700 * link, the tx interrupts are kept to a reasonable level.
701 * When the queue is not full, reclamation of skbs still occurs
702 * as new packets are transmitted, or on a queue-empty
703 * interrupt.
704 */
705
706 if ((tx % TSI108_TX_INT_FREQ == 0) &&
707 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ))
708 misc = TSI108_TX_INT;
709
710 data->txskbs[tx] = skb;
711
712 if (i == 0) {
713 data->txring[tx].buf0 = dma_map_single(NULL, skb->data,
714 skb->len - skb->data_len, DMA_TO_DEVICE);
715 data->txring[tx].len = skb->len - skb->data_len;
716 misc |= TSI108_TX_SOF;
717 } else {
718 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1];
719
720 data->txring[tx].buf0 =
721 dma_map_page(NULL, frag->page, frag->page_offset,
722 frag->size, DMA_TO_DEVICE);
723 data->txring[tx].len = frag->size;
724 }
725
726 if (i == frags - 1)
727 misc |= TSI108_TX_EOF;
728
729 if (netif_msg_pktdata(data)) {
730 int i;
731 printk("%s: Tx Frame contents (%d)\n", dev->name,
732 skb->len);
733 for (i = 0; i < skb->len; i++)
734 printk(" %2.2x", skb->data[i]);
735 printk(".\n");
736 }
737 data->txring[tx].misc = misc | TSI108_TX_OWN;
738
739 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN;
740 data->txfree--;
741 }
742
743 tsi108_complete_tx(dev);
744
745 /* This must be done after the check for completed tx descriptors,
746 * so that the tail pointer is correct.
747 */
748
749 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0))
750 tsi108_restart_tx(data);
751
752 spin_unlock_irq(&data->txlock);
753 return NETDEV_TX_OK;
754}
755
756static int tsi108_complete_rx(struct net_device *dev, int budget)
757{
758 struct tsi108_prv_data *data = netdev_priv(dev);
759 int done = 0;
760
761 while (data->rxfree && done != budget) {
762 int rx = data->rxtail;
763 struct sk_buff *skb;
764
765 if (data->rxring[rx].misc & TSI108_RX_OWN)
766 break;
767
768 skb = data->rxskbs[rx];
769 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
770 data->rxfree--;
771 done++;
772
773 if (data->rxring[rx].misc & TSI108_RX_BAD) {
774 spin_lock_irq(&data->misclock);
775
776 if (data->rxring[rx].misc & TSI108_RX_CRC)
777 data->stats.rx_crc_errors++;
778 if (data->rxring[rx].misc & TSI108_RX_OVER)
779 data->stats.rx_fifo_errors++;
780
781 spin_unlock_irq(&data->misclock);
782
783 dev_kfree_skb_any(skb);
784 continue;
785 }
786 if (netif_msg_pktdata(data)) {
787 int i;
788 printk("%s: Rx Frame contents (%d)\n",
789 dev->name, data->rxring[rx].len);
790 for (i = 0; i < data->rxring[rx].len; i++)
791 printk(" %2.2x", skb->data[i]);
792 printk(".\n");
793 }
794
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800795 skb_put(skb, data->rxring[rx].len);
796 skb->protocol = eth_type_trans(skb, dev);
797 netif_receive_skb(skb);
798 dev->last_rx = jiffies;
799 }
800
801 return done;
802}
803
804static int tsi108_refill_rx(struct net_device *dev, int budget)
805{
806 struct tsi108_prv_data *data = netdev_priv(dev);
807 int done = 0;
808
809 while (data->rxfree != TSI108_RXRING_LEN && done != budget) {
810 int rx = data->rxhead;
811 struct sk_buff *skb;
812
813 data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2);
814 if (!skb)
815 break;
816
817 skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */
818
819 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data,
820 TSI108_RX_SKB_SIZE,
821 DMA_FROM_DEVICE);
822
823 /* Sometimes the hardware sets blen to zero after packet
824 * reception, even though the manual says that it's only ever
825 * modified by the driver.
826 */
827
828 data->rxring[rx].blen = TSI108_RX_SKB_SIZE;
829 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT;
830
831 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN;
832 data->rxfree++;
833 done++;
834 }
835
836 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) &
837 TSI108_EC_RXSTAT_QUEUE0))
838 tsi108_restart_rx(data, dev);
839
840 return done;
841}
842
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700843static int tsi108_poll(struct napi_struct *napi, int budget)
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800844{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700845 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi);
846 struct net_device *dev = data->dev;
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800847 u32 estat = TSI_READ(TSI108_EC_RXESTAT);
848 u32 intstat = TSI_READ(TSI108_EC_INTSTAT);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700849 int num_received = 0, num_filled = 0;
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800850
851 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
852 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT;
853
854 TSI_WRITE(TSI108_EC_RXESTAT, estat);
855 TSI_WRITE(TSI108_EC_INTSTAT, intstat);
856
857 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT))
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700858 num_received = tsi108_complete_rx(dev, budget);
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800859
860 /* This should normally fill no more slots than the number of
861 * packets received in tsi108_complete_rx(). The exception
862 * is when we previously ran out of memory for RX SKBs. In that
863 * case, it's helpful to obey the budget, not only so that the
864 * CPU isn't hogged, but so that memory (which may still be low)
865 * is not hogged by one device.
866 *
867 * A work unit is considered to be two SKBs to allow us to catch
868 * up when the ring has shrunk due to out-of-memory but we're
869 * still removing the full budget's worth of packets each time.
870 */
871
872 if (data->rxfree < TSI108_RXRING_LEN)
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700873 num_filled = tsi108_refill_rx(dev, budget * 2);
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800874
875 if (intstat & TSI108_INT_RXERROR) {
876 u32 err = TSI_READ(TSI108_EC_RXERR);
877 TSI_WRITE(TSI108_EC_RXERR, err);
878
879 if (err) {
880 if (net_ratelimit())
881 printk(KERN_DEBUG "%s: RX error %x\n",
882 dev->name, err);
883
884 if (!(TSI_READ(TSI108_EC_RXSTAT) &
885 TSI108_EC_RXSTAT_QUEUE0))
886 tsi108_restart_rx(data, dev);
887 }
888 }
889
890 if (intstat & TSI108_INT_RXOVERRUN) {
891 spin_lock_irq(&data->misclock);
892 data->stats.rx_fifo_errors++;
893 spin_unlock_irq(&data->misclock);
894 }
895
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700896 if (num_received < budget) {
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800897 data->rxpending = 0;
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700898 netif_rx_complete(dev, napi);
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800899
900 TSI_WRITE(TSI108_EC_INTMASK,
901 TSI_READ(TSI108_EC_INTMASK)
902 & ~(TSI108_INT_RXQUEUE0
903 | TSI108_INT_RXTHRESH |
904 TSI108_INT_RXOVERRUN |
905 TSI108_INT_RXERROR |
906 TSI108_INT_RXWAIT));
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800907 } else {
908 data->rxpending = 1;
909 }
910
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700911 return num_received;
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800912}
913
914static void tsi108_rx_int(struct net_device *dev)
915{
916 struct tsi108_prv_data *data = netdev_priv(dev);
917
918 /* A race could cause dev to already be scheduled, so it's not an
919 * error if that happens (and interrupts shouldn't be re-masked,
920 * because that can cause harmful races, if poll has already
921 * unmasked them but not cleared LINK_STATE_SCHED).
922 *
923 * This can happen if this code races with tsi108_poll(), which masks
924 * the interrupts after tsi108_irq_one() read the mask, but before
925 * netif_rx_schedule is called. It could also happen due to calls
926 * from tsi108_check_rxring().
927 */
928
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700929 if (netif_rx_schedule_prep(dev, &data->napi)) {
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800930 /* Mask, rather than ack, the receive interrupts. The ack
931 * will happen in tsi108_poll().
932 */
933
934 TSI_WRITE(TSI108_EC_INTMASK,
935 TSI_READ(TSI108_EC_INTMASK) |
936 TSI108_INT_RXQUEUE0
937 | TSI108_INT_RXTHRESH |
938 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR |
939 TSI108_INT_RXWAIT);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700940 __netif_rx_schedule(dev, &data->napi);
Zang Roy-r619115e123b82006-11-08 19:49:13 -0800941 } else {
942 if (!netif_running(dev)) {
943 /* This can happen if an interrupt occurs while the
944 * interface is being brought down, as the START
945 * bit is cleared before the stop function is called.
946 *
947 * In this case, the interrupts must be masked, or
948 * they will continue indefinitely.
949 *
950 * There's a race here if the interface is brought down
951 * and then up in rapid succession, as the device could
952 * be made running after the above check and before
953 * the masking below. This will only happen if the IRQ
954 * thread has a lower priority than the task brining
955 * up the interface. Fixing this race would likely
956 * require changes in generic code.
957 */
958
959 TSI_WRITE(TSI108_EC_INTMASK,
960 TSI_READ
961 (TSI108_EC_INTMASK) |
962 TSI108_INT_RXQUEUE0 |
963 TSI108_INT_RXTHRESH |
964 TSI108_INT_RXOVERRUN |
965 TSI108_INT_RXERROR |
966 TSI108_INT_RXWAIT);
967 }
968 }
969}
970
971/* If the RX ring has run out of memory, try periodically
972 * to allocate some more, as otherwise poll would never
973 * get called (apart from the initial end-of-queue condition).
974 *
975 * This is called once per second (by default) from the thread.
976 */
977
978static void tsi108_check_rxring(struct net_device *dev)
979{
980 struct tsi108_prv_data *data = netdev_priv(dev);
981
982 /* A poll is scheduled, as opposed to caling tsi108_refill_rx
983 * directly, so as to keep the receive path single-threaded
984 * (and thus not needing a lock).
985 */
986
987 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4)
988 tsi108_rx_int(dev);
989}
990
991static void tsi108_tx_int(struct net_device *dev)
992{
993 struct tsi108_prv_data *data = netdev_priv(dev);
994 u32 estat = TSI_READ(TSI108_EC_TXESTAT);
995
996 TSI_WRITE(TSI108_EC_TXESTAT, estat);
997 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 |
998 TSI108_INT_TXIDLE | TSI108_INT_TXERROR);
999 if (estat & TSI108_EC_TXESTAT_Q0_ERR) {
1000 u32 err = TSI_READ(TSI108_EC_TXERR);
1001 TSI_WRITE(TSI108_EC_TXERR, err);
1002
1003 if (err && net_ratelimit())
1004 printk(KERN_ERR "%s: TX error %x\n", dev->name, err);
1005 }
1006
1007 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) {
1008 spin_lock(&data->txlock);
1009 tsi108_complete_tx(dev);
1010 spin_unlock(&data->txlock);
1011 }
1012}
1013
1014
1015static irqreturn_t tsi108_irq(int irq, void *dev_id)
1016{
1017 struct net_device *dev = dev_id;
1018 struct tsi108_prv_data *data = netdev_priv(dev);
1019 u32 stat = TSI_READ(TSI108_EC_INTSTAT);
1020
1021 if (!(stat & TSI108_INT_ANY))
1022 return IRQ_NONE; /* Not our interrupt */
1023
1024 stat &= ~TSI_READ(TSI108_EC_INTMASK);
1025
1026 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE |
1027 TSI108_INT_TXERROR))
1028 tsi108_tx_int(dev);
1029 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH |
1030 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN |
1031 TSI108_INT_RXERROR))
1032 tsi108_rx_int(dev);
1033
1034 if (stat & TSI108_INT_SFN) {
1035 if (net_ratelimit())
1036 printk(KERN_DEBUG "%s: SFN error\n", dev->name);
1037 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN);
1038 }
1039
1040 if (stat & TSI108_INT_STATCARRY) {
1041 tsi108_stat_carry(dev);
1042 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY);
1043 }
1044
1045 return IRQ_HANDLED;
1046}
1047
1048static void tsi108_stop_ethernet(struct net_device *dev)
1049{
1050 struct tsi108_prv_data *data = netdev_priv(dev);
1051 int i = 1000;
1052 /* Disable all TX and RX queues ... */
1053 TSI_WRITE(TSI108_EC_TXCTRL, 0);
1054 TSI_WRITE(TSI108_EC_RXCTRL, 0);
1055
1056 /* ...and wait for them to become idle */
1057 while(i--) {
1058 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE))
1059 break;
1060 udelay(10);
1061 }
1062 i = 1000;
1063 while(i--){
1064 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE))
1065 return;
1066 udelay(10);
1067 }
1068 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
1069}
1070
1071static void tsi108_reset_ether(struct tsi108_prv_data * data)
1072{
1073 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST);
1074 udelay(100);
1075 TSI_WRITE(TSI108_MAC_CFG1, 0);
1076
1077 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST);
1078 udelay(100);
1079 TSI_WRITE(TSI108_EC_PORTCTRL,
1080 TSI_READ(TSI108_EC_PORTCTRL) &
1081 ~TSI108_EC_PORTCTRL_STATRST);
1082
1083 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST);
1084 udelay(100);
1085 TSI_WRITE(TSI108_EC_TXCFG,
1086 TSI_READ(TSI108_EC_TXCFG) &
1087 ~TSI108_EC_TXCFG_RST);
1088
1089 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST);
1090 udelay(100);
1091 TSI_WRITE(TSI108_EC_RXCFG,
1092 TSI_READ(TSI108_EC_RXCFG) &
1093 ~TSI108_EC_RXCFG_RST);
1094
1095 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1096 TSI_READ(TSI108_MAC_MII_MGMT_CFG) |
1097 TSI108_MAC_MII_MGMT_RST);
1098 udelay(100);
1099 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG,
1100 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) &
1101 ~(TSI108_MAC_MII_MGMT_RST |
1102 TSI108_MAC_MII_MGMT_CLK)) | 0x07);
1103}
1104
1105static int tsi108_get_mac(struct net_device *dev)
1106{
1107 struct tsi108_prv_data *data = netdev_priv(dev);
1108 u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
1109 u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
1110
1111 /* Note that the octets are reversed from what the manual says,
1112 * producing an even weirder ordering...
1113 */
1114 if (word2 == 0 && word1 == 0) {
1115 dev->dev_addr[0] = 0x00;
1116 dev->dev_addr[1] = 0x06;
1117 dev->dev_addr[2] = 0xd2;
1118 dev->dev_addr[3] = 0x00;
1119 dev->dev_addr[4] = 0x00;
1120 if (0x8 == data->phy)
1121 dev->dev_addr[5] = 0x01;
1122 else
1123 dev->dev_addr[5] = 0x02;
1124
1125 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1126
1127 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1128 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1129
1130 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1131 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1132 } else {
1133 dev->dev_addr[0] = (word2 >> 16) & 0xff;
1134 dev->dev_addr[1] = (word2 >> 24) & 0xff;
1135 dev->dev_addr[2] = (word1 >> 0) & 0xff;
1136 dev->dev_addr[3] = (word1 >> 8) & 0xff;
1137 dev->dev_addr[4] = (word1 >> 16) & 0xff;
1138 dev->dev_addr[5] = (word1 >> 24) & 0xff;
1139 }
1140
1141 if (!is_valid_ether_addr(dev->dev_addr)) {
1142 printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2);
1143 return -EINVAL;
1144 }
1145
1146 return 0;
1147}
1148
1149static int tsi108_set_mac(struct net_device *dev, void *addr)
1150{
1151 struct tsi108_prv_data *data = netdev_priv(dev);
1152 u32 word1, word2;
1153 int i;
1154
1155 if (!is_valid_ether_addr(addr))
1156 return -EINVAL;
1157
1158 for (i = 0; i < 6; i++)
1159 /* +2 is for the offset of the HW addr type */
1160 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
1161
1162 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
1163
1164 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) |
1165 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24);
1166
1167 spin_lock_irq(&data->misclock);
1168 TSI_WRITE(TSI108_MAC_ADDR1, word1);
1169 TSI_WRITE(TSI108_MAC_ADDR2, word2);
1170 spin_lock(&data->txlock);
1171
1172 if (data->txfree && data->link_up)
1173 netif_wake_queue(dev);
1174
1175 spin_unlock(&data->txlock);
1176 spin_unlock_irq(&data->misclock);
1177 return 0;
1178}
1179
1180/* Protected by dev->xmit_lock. */
1181static void tsi108_set_rx_mode(struct net_device *dev)
1182{
1183 struct tsi108_prv_data *data = netdev_priv(dev);
1184 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG);
1185
1186 if (dev->flags & IFF_PROMISC) {
1187 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH);
1188 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE;
1189 goto out;
1190 }
1191
1192 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE);
1193
1194 if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
1195 int i;
1196 struct dev_mc_list *mc = dev->mc_list;
1197 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH;
1198
1199 memset(data->mc_hash, 0, sizeof(data->mc_hash));
1200
1201 while (mc) {
1202 u32 hash, crc;
1203
1204 if (mc->dmi_addrlen == 6) {
1205 crc = ether_crc(6, mc->dmi_addr);
1206 hash = crc >> 23;
1207
1208 __set_bit(hash, &data->mc_hash[0]);
1209 } else {
1210 printk(KERN_ERR
1211 "%s: got multicast address of length %d "
1212 "instead of 6.\n", dev->name,
1213 mc->dmi_addrlen);
1214 }
1215
1216 mc = mc->next;
1217 }
1218
1219 TSI_WRITE(TSI108_EC_HASHADDR,
1220 TSI108_EC_HASHADDR_AUTOINC |
1221 TSI108_EC_HASHADDR_MCAST);
1222
1223 for (i = 0; i < 16; i++) {
1224 /* The manual says that the hardware may drop
1225 * back-to-back writes to the data register.
1226 */
1227 udelay(1);
1228 TSI_WRITE(TSI108_EC_HASHDATA,
1229 data->mc_hash[i]);
1230 }
1231 }
1232
1233 out:
1234 TSI_WRITE(TSI108_EC_RXCFG, rxcfg);
1235}
1236
1237static void tsi108_init_phy(struct net_device *dev)
1238{
1239 struct tsi108_prv_data *data = netdev_priv(dev);
1240 u32 i = 0;
1241 u16 phyval = 0;
1242 unsigned long flags;
1243
1244 spin_lock_irqsave(&phy_lock, flags);
1245
1246 tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
1247 while (i--){
1248 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
1249 break;
1250 udelay(10);
1251 }
1252 if (i == 0)
1253 printk(KERN_ERR "%s function time out \n", __FUNCTION__);
1254
Josh Boyerc1b78d02007-05-08 07:26:22 +10001255 if (data->phy_type == TSI108_PHY_BCM54XX) {
1256 tsi108_write_mii(data, 0x09, 0x0300);
1257 tsi108_write_mii(data, 0x10, 0x1020);
1258 tsi108_write_mii(data, 0x1c, 0x8c00);
1259 }
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001260
1261 tsi108_write_mii(data,
1262 MII_BMCR,
1263 BMCR_ANENABLE | BMCR_ANRESTART);
1264 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART)
1265 cpu_relax();
1266
1267 /* Set G/MII mode and receive clock select in TBI control #2. The
1268 * second port won't work if this isn't done, even though we don't
1269 * use TBI mode.
1270 */
1271
1272 tsi108_write_tbi(data, 0x11, 0x30);
1273
1274 /* FIXME: It seems to take more than 2 back-to-back reads to the
1275 * PHY_STAT register before the link up status bit is set.
1276 */
1277
1278 data->link_up = 1;
1279
1280 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) &
1281 BMSR_LSTATUS)) {
1282 if (i++ > (MII_READ_DELAY / 10)) {
1283 data->link_up = 0;
1284 break;
1285 }
1286 spin_unlock_irqrestore(&phy_lock, flags);
1287 msleep(10);
1288 spin_lock_irqsave(&phy_lock, flags);
1289 }
1290
1291 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval);
1292 data->phy_ok = 1;
1293 data->init_media = 1;
1294 spin_unlock_irqrestore(&phy_lock, flags);
1295}
1296
1297static void tsi108_kill_phy(struct net_device *dev)
1298{
1299 struct tsi108_prv_data *data = netdev_priv(dev);
1300 unsigned long flags;
1301
1302 spin_lock_irqsave(&phy_lock, flags);
1303 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN);
1304 data->phy_ok = 0;
1305 spin_unlock_irqrestore(&phy_lock, flags);
1306}
1307
1308static int tsi108_open(struct net_device *dev)
1309{
1310 int i;
1311 struct tsi108_prv_data *data = netdev_priv(dev);
1312 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc);
1313 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc);
1314
1315 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev);
1316 if (i != 0) {
1317 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n",
1318 data->id, data->irq_num);
1319 return i;
1320 } else {
1321 dev->irq = data->irq_num;
1322 printk(KERN_NOTICE
1323 "tsi108_open : Port %d Assigned IRQ %d to %s\n",
1324 data->id, dev->irq, dev->name);
1325 }
1326
1327 data->rxring = dma_alloc_coherent(NULL, rxring_size,
1328 &data->rxdma, GFP_KERNEL);
1329
1330 if (!data->rxring) {
1331 printk(KERN_DEBUG
1332 "TSI108_ETH: failed to allocate memory for rxring!\n");
1333 return -ENOMEM;
1334 } else {
1335 memset(data->rxring, 0, rxring_size);
1336 }
1337
1338 data->txring = dma_alloc_coherent(NULL, txring_size,
1339 &data->txdma, GFP_KERNEL);
1340
1341 if (!data->txring) {
1342 printk(KERN_DEBUG
1343 "TSI108_ETH: failed to allocate memory for txring!\n");
1344 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma);
1345 return -ENOMEM;
1346 } else {
1347 memset(data->txring, 0, txring_size);
1348 }
1349
1350 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1351 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc);
1352 data->rxring[i].blen = TSI108_RXBUF_SIZE;
1353 data->rxring[i].vlan = 0;
1354 }
1355
1356 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma;
1357
1358 data->rxtail = 0;
1359 data->rxhead = 0;
1360
1361 for (i = 0; i < TSI108_RXRING_LEN; i++) {
1362 struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN);
1363
1364 if (!skb) {
1365 /* Bah. No memory for now, but maybe we'll get
1366 * some more later.
1367 * For now, we'll live with the smaller ring.
1368 */
1369 printk(KERN_WARNING
1370 "%s: Could only allocate %d receive skb(s).\n",
1371 dev->name, i);
1372 data->rxhead = i;
1373 break;
1374 }
1375
1376 data->rxskbs[i] = skb;
1377 /* Align the payload on a 4-byte boundary */
1378 skb_reserve(skb, 2);
1379 data->rxskbs[i] = skb;
1380 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data);
1381 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT;
1382 }
1383
1384 data->rxfree = i;
1385 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma);
1386
1387 for (i = 0; i < TSI108_TXRING_LEN; i++) {
1388 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc);
1389 data->txring[i].misc = 0;
1390 }
1391
1392 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma;
1393 data->txtail = 0;
1394 data->txhead = 0;
1395 data->txfree = TSI108_TXRING_LEN;
1396 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma);
1397 tsi108_init_phy(dev);
1398
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001399 napi_enable(&data->napi);
1400
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001401 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev);
1402 mod_timer(&data->timer, jiffies + 1);
1403
1404 tsi108_restart_rx(data, dev);
1405
1406 TSI_WRITE(TSI108_EC_INTSTAT, ~0);
1407
1408 TSI_WRITE(TSI108_EC_INTMASK,
1409 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR |
1410 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 |
1411 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT |
1412 TSI108_INT_SFN | TSI108_INT_STATCARRY));
1413
1414 TSI_WRITE(TSI108_MAC_CFG1,
1415 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN);
1416 netif_start_queue(dev);
1417 return 0;
1418}
1419
1420static int tsi108_close(struct net_device *dev)
1421{
1422 struct tsi108_prv_data *data = netdev_priv(dev);
1423
1424 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001425 napi_disable(&data->napi);
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001426
1427 del_timer_sync(&data->timer);
1428
1429 tsi108_stop_ethernet(dev);
1430 tsi108_kill_phy(dev);
1431 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1432 TSI_WRITE(TSI108_MAC_CFG1, 0);
1433
1434 /* Check for any pending TX packets, and drop them. */
1435
1436 while (!data->txfree || data->txhead != data->txtail) {
1437 int tx = data->txtail;
1438 struct sk_buff *skb;
1439 skb = data->txskbs[tx];
1440 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN;
1441 data->txfree++;
1442 dev_kfree_skb(skb);
1443 }
1444
1445 synchronize_irq(data->irq_num);
1446 free_irq(data->irq_num, dev);
1447
1448 /* Discard the RX ring. */
1449
1450 while (data->rxfree) {
1451 int rx = data->rxtail;
1452 struct sk_buff *skb;
1453
1454 skb = data->rxskbs[rx];
1455 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN;
1456 data->rxfree--;
1457 dev_kfree_skb(skb);
1458 }
1459
1460 dma_free_coherent(0,
1461 TSI108_RXRING_LEN * sizeof(rx_desc),
1462 data->rxring, data->rxdma);
1463 dma_free_coherent(0,
1464 TSI108_TXRING_LEN * sizeof(tx_desc),
1465 data->txring, data->txdma);
1466
1467 return 0;
1468}
1469
1470static void tsi108_init_mac(struct net_device *dev)
1471{
1472 struct tsi108_prv_data *data = netdev_priv(dev);
1473
1474 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE |
1475 TSI108_MAC_CFG2_PADCRC);
1476
1477 TSI_WRITE(TSI108_EC_TXTHRESH,
1478 (192 << TSI108_EC_TXTHRESH_STARTFILL) |
1479 (192 << TSI108_EC_TXTHRESH_STOPFILL));
1480
1481 TSI_WRITE(TSI108_STAT_CARRYMASK1,
1482 ~(TSI108_STAT_CARRY1_RXBYTES |
1483 TSI108_STAT_CARRY1_RXPKTS |
1484 TSI108_STAT_CARRY1_RXFCS |
1485 TSI108_STAT_CARRY1_RXMCAST |
1486 TSI108_STAT_CARRY1_RXALIGN |
1487 TSI108_STAT_CARRY1_RXLENGTH |
1488 TSI108_STAT_CARRY1_RXRUNT |
1489 TSI108_STAT_CARRY1_RXJUMBO |
1490 TSI108_STAT_CARRY1_RXFRAG |
1491 TSI108_STAT_CARRY1_RXJABBER |
1492 TSI108_STAT_CARRY1_RXDROP));
1493
1494 TSI_WRITE(TSI108_STAT_CARRYMASK2,
1495 ~(TSI108_STAT_CARRY2_TXBYTES |
1496 TSI108_STAT_CARRY2_TXPKTS |
1497 TSI108_STAT_CARRY2_TXEXDEF |
1498 TSI108_STAT_CARRY2_TXEXCOL |
1499 TSI108_STAT_CARRY2_TXTCOL |
1500 TSI108_STAT_CARRY2_TXPAUSE));
1501
1502 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN);
1503 TSI_WRITE(TSI108_MAC_CFG1, 0);
1504
1505 TSI_WRITE(TSI108_EC_RXCFG,
1506 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE);
1507
1508 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT |
1509 TSI108_EC_TXQ_CFG_EOQ_OWN_INT |
1510 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1511 TSI108_EC_TXQ_CFG_SFNPORT));
1512
1513 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT |
1514 TSI108_EC_RXQ_CFG_EOQ_OWN_INT |
1515 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT <<
1516 TSI108_EC_RXQ_CFG_SFNPORT));
1517
1518 TSI_WRITE(TSI108_EC_TXQ_BUFCFG,
1519 TSI108_EC_TXQ_BUFCFG_BURST256 |
1520 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1521 TSI108_EC_TXQ_BUFCFG_SFNPORT));
1522
1523 TSI_WRITE(TSI108_EC_RXQ_BUFCFG,
1524 TSI108_EC_RXQ_BUFCFG_BURST256 |
1525 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT <<
1526 TSI108_EC_RXQ_BUFCFG_SFNPORT));
1527
1528 TSI_WRITE(TSI108_EC_INTMASK, ~0);
1529}
1530
1531static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1532{
1533 struct tsi108_prv_data *data = netdev_priv(dev);
1534 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL);
1535}
1536
1537static int
1538tsi108_init_one(struct platform_device *pdev)
1539{
1540 struct net_device *dev = NULL;
1541 struct tsi108_prv_data *data = NULL;
1542 hw_info *einfo;
1543 int err = 0;
1544
1545 einfo = pdev->dev.platform_data;
1546
1547 if (NULL == einfo) {
1548 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n",
1549 pdev->id);
1550 return -ENODEV;
1551 }
1552
1553 /* Create an ethernet device instance */
1554
1555 dev = alloc_etherdev(sizeof(struct tsi108_prv_data));
1556 if (!dev) {
1557 printk("tsi108_eth: Could not allocate a device structure\n");
1558 return -ENOMEM;
1559 }
1560
1561 printk("tsi108_eth%d: probe...\n", pdev->id);
1562 data = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001563 data->dev = dev;
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001564
1565 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n",
1566 pdev->id, einfo->regs, einfo->phyregs,
1567 einfo->phy, einfo->irq_num);
1568
1569 data->regs = ioremap(einfo->regs, 0x400);
1570 if (NULL == data->regs) {
1571 err = -ENOMEM;
1572 goto regs_fail;
1573 }
1574
1575 data->phyregs = ioremap(einfo->phyregs, 0x400);
1576 if (NULL == data->phyregs) {
1577 err = -ENOMEM;
1578 goto regs_fail;
1579 }
1580/* MII setup */
1581 data->mii_if.dev = dev;
1582 data->mii_if.mdio_read = tsi108_mdio_read;
1583 data->mii_if.mdio_write = tsi108_mdio_write;
1584 data->mii_if.phy_id = einfo->phy;
1585 data->mii_if.phy_id_mask = 0x1f;
1586 data->mii_if.reg_num_mask = 0x1f;
1587 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if);
1588
1589 data->phy = einfo->phy;
Josh Boyerc1b78d02007-05-08 07:26:22 +10001590 data->phy_type = einfo->phy_type;
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001591 data->irq_num = einfo->irq_num;
1592 data->id = pdev->id;
1593 dev->open = tsi108_open;
1594 dev->stop = tsi108_close;
1595 dev->hard_start_xmit = tsi108_send_packet;
1596 dev->set_mac_address = tsi108_set_mac;
1597 dev->set_multicast_list = tsi108_set_rx_mode;
1598 dev->get_stats = tsi108_get_stats;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001599 netif_napi_add(dev, &data->napi, tsi108_poll, 64);
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001600 dev->do_ioctl = tsi108_do_ioctl;
Zang Roy-r619115e123b82006-11-08 19:49:13 -08001601
1602 /* Apparently, the Linux networking code won't use scatter-gather
1603 * if the hardware doesn't do checksums. However, it's faster
1604 * to checksum in place and use SG, as (among other reasons)
1605 * the cache won't be dirtied (which then has to be flushed
1606 * before DMA). The checksumming is done by the driver (via
1607 * a new function skb_csum_dev() in net/core/skbuff.c).
1608 */
1609
1610 dev->features = NETIF_F_HIGHDMA;
1611 SET_MODULE_OWNER(dev);
1612
1613 spin_lock_init(&data->txlock);
1614 spin_lock_init(&data->misclock);
1615
1616 tsi108_reset_ether(data);
1617 tsi108_kill_phy(dev);
1618
1619 if ((err = tsi108_get_mac(dev)) != 0) {
1620 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n",
1621 dev->name);
1622 goto register_fail;
1623 }
1624
1625 tsi108_init_mac(dev);
1626 err = register_netdev(dev);
1627 if (err) {
1628 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
1629 dev->name);
1630 goto register_fail;
1631 }
1632
1633 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: "
1634 "%02x:%02x:%02x:%02x:%02x:%02x\n", dev->name,
1635 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1636 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1637#ifdef DEBUG
1638 data->msg_enable = DEBUG;
1639 dump_eth_one(dev);
1640#endif
1641
1642 return 0;
1643
1644register_fail:
1645 iounmap(data->regs);
1646 iounmap(data->phyregs);
1647
1648regs_fail:
1649 free_netdev(dev);
1650 return err;
1651}
1652
1653/* There's no way to either get interrupts from the PHY when
1654 * something changes, or to have the Tsi108 automatically communicate
1655 * with the PHY to reconfigure itself.
1656 *
1657 * Thus, we have to do it using a timer.
1658 */
1659
1660static void tsi108_timed_checker(unsigned long dev_ptr)
1661{
1662 struct net_device *dev = (struct net_device *)dev_ptr;
1663 struct tsi108_prv_data *data = netdev_priv(dev);
1664
1665 tsi108_check_phy(dev);
1666 tsi108_check_rxring(dev);
1667 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL);
1668}
1669
1670static int tsi108_ether_init(void)
1671{
1672 int ret;
1673 ret = platform_driver_register (&tsi_eth_driver);
1674 if (ret < 0){
1675 printk("tsi108_ether_init: error initializing ethernet "
1676 "device\n");
1677 return ret;
1678 }
1679 return 0;
1680}
1681
1682static int tsi108_ether_remove(struct platform_device *pdev)
1683{
1684 struct net_device *dev = platform_get_drvdata(pdev);
1685 struct tsi108_prv_data *priv = netdev_priv(dev);
1686
1687 unregister_netdev(dev);
1688 tsi108_stop_ethernet(dev);
1689 platform_set_drvdata(pdev, NULL);
1690 iounmap(priv->regs);
1691 iounmap(priv->phyregs);
1692 free_netdev(dev);
1693
1694 return 0;
1695}
1696static void tsi108_ether_exit(void)
1697{
1698 platform_driver_unregister(&tsi_eth_driver);
1699}
1700
1701module_init(tsi108_ether_init);
1702module_exit(tsi108_ether_exit);
1703
1704MODULE_AUTHOR("Tundra Semiconductor Corporation");
1705MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver");
1706MODULE_LICENSE("GPL");