blob: dd0360ba2412b646e27dd05fd11fbe29c37e211a [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * BIOS Flash chip on Intel 440GX board.
3 *
4 * Bugs this currently does not work under linuxBIOS.
5 */
6
7#include <linux/module.h>
8#include <linux/pci.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <asm/io.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/map.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070014
15#define PIIXE_IOBASE_RESOURCE 11
16
17#define WINDOW_ADDR 0xfff00000
18#define WINDOW_SIZE 0x00100000
19#define BUSWIDTH 1
20
21static u32 iobase;
22#define IOBASE iobase
23#define TRIBUF_PORT (IOBASE+0x37)
24#define VPP_PORT (IOBASE+0x28)
25
26static struct mtd_info *mymtd;
27
28
29/* Is this really the vpp port? */
30static void l440gx_set_vpp(struct map_info *map, int vpp)
31{
32 unsigned long l;
33
34 l = inl(VPP_PORT);
35 if (vpp) {
36 l |= 1;
37 } else {
38 l &= ~1;
39 }
40 outl(l, VPP_PORT);
41}
42
43static struct map_info l440gx_map = {
44 .name = "L440GX BIOS",
45 .size = WINDOW_SIZE,
46 .bankwidth = BUSWIDTH,
47 .phys = WINDOW_ADDR,
48#if 0
Thomas Gleixner69f34c92005-11-07 11:15:40 +000049 /* FIXME verify that this is the
Linus Torvalds1da177e2005-04-16 15:20:36 -070050 * appripriate code for vpp enable/disable
51 */
52 .set_vpp = l440gx_set_vpp
53#endif
54};
55
56static int __init init_l440gx(void)
57{
58 struct pci_dev *dev, *pm_dev;
59 struct resource *pm_iobase;
60 __u16 word;
61
Alan Coxdd8e9ed2006-09-22 10:19:20 +010062 dev = pci_get_device(PCI_VENDOR_ID_INTEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -070063 PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
64
Alan Coxdd8e9ed2006-09-22 10:19:20 +010065 pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -070066 PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
67
Alan Coxdd8e9ed2006-09-22 10:19:20 +010068 pci_dev_put(dev);
69
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 if (!dev || !pm_dev) {
71 printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
Alan Coxdd8e9ed2006-09-22 10:19:20 +010072 pci_dev_put(pm_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070073 return -ENODEV;
74 }
75
76 l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
77
78 if (!l440gx_map.virt) {
79 printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
Alan Coxdd8e9ed2006-09-22 10:19:20 +010080 pci_dev_put(pm_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081 return -ENOMEM;
82 }
83 simple_map_init(&l440gx_map);
84 printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
85
Thomas Gleixner69f34c92005-11-07 11:15:40 +000086 /* Setup the pm iobase resource
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 * This code should move into some kind of generic bridge
88 * driver but for the moment I'm content with getting the
Thomas Gleixner69f34c92005-11-07 11:15:40 +000089 * allocation correct.
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 */
91 pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
92 if (!(pm_iobase->flags & IORESOURCE_IO)) {
93 pm_iobase->name = "pm iobase";
94 pm_iobase->start = 0;
95 pm_iobase->end = 63;
96 pm_iobase->flags = IORESOURCE_IO;
97
98 /* Put the current value in the resource */
99 pci_read_config_dword(pm_dev, 0x40, &iobase);
100 iobase &= ~1;
101 pm_iobase->start += iobase & ~1;
102 pm_iobase->end += iobase & ~1;
103
Alan Coxdd8e9ed2006-09-22 10:19:20 +0100104 pci_dev_put(pm_dev);
105
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106 /* Allocate the resource region */
107 if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
Alan Coxdd8e9ed2006-09-22 10:19:20 +0100108 pci_dev_put(dev);
109 pci_dev_put(pm_dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 printk(KERN_WARNING "Could not allocate pm iobase resource\n");
111 iounmap(l440gx_map.virt);
112 return -ENXIO;
113 }
114 }
115 /* Set the iobase */
116 iobase = pm_iobase->start;
117 pci_write_config_dword(pm_dev, 0x40, iobase | 1);
Thomas Gleixner69f34c92005-11-07 11:15:40 +0000118
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
120 /* Set XBCS# */
121 pci_read_config_word(dev, 0x4e, &word);
122 word |= 0x4;
123 pci_write_config_word(dev, 0x4e, word);
124
125 /* Supply write voltage to the chip */
126 l440gx_set_vpp(&l440gx_map, 1);
127
128 /* Enable the gate on the WE line */
129 outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
Thomas Gleixner69f34c92005-11-07 11:15:40 +0000130
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
132
133 mymtd = do_map_probe("jedec_probe", &l440gx_map);
134 if (!mymtd) {
135 printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
136 mymtd = do_map_probe("map_rom", &l440gx_map);
137 }
138 if (mymtd) {
139 mymtd->owner = THIS_MODULE;
140
Jamie Ilesee0e87b2011-05-23 10:23:40 +0100141 mtd_device_register(mymtd, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 return 0;
143 }
144
145 iounmap(l440gx_map.virt);
146 return -ENXIO;
147}
148
149static void __exit cleanup_l440gx(void)
150{
Jamie Ilesee0e87b2011-05-23 10:23:40 +0100151 mtd_device_unregister(mymtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 map_destroy(mymtd);
Thomas Gleixner69f34c92005-11-07 11:15:40 +0000153
Linus Torvalds1da177e2005-04-16 15:20:36 -0700154 iounmap(l440gx_map.virt);
155}
156
157module_init(init_l440gx);
158module_exit(cleanup_l440gx);
159
160MODULE_LICENSE("GPL");
161MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
162MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");