Alan Olsen | 494a43b | 2010-04-26 10:50:19 -0700 | [diff] [blame] | 1 | /* |
| 2 | * NAND Flash Controller Device Driver |
| 3 | * Copyright (c) 2009, Intel Corporation and its suppliers. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | #ifndef _SPECTRASWCONFIG_ |
| 21 | #define _SPECTRASWCONFIG_ |
| 22 | |
| 23 | /* NAND driver version */ |
| 24 | #define GLOB_VERSION "driver version 20100311" |
| 25 | |
| 26 | |
| 27 | /***** Common Parameters *****/ |
| 28 | #define RETRY_TIMES 3 |
| 29 | |
| 30 | #define READ_BADBLOCK_INFO 1 |
| 31 | #define READBACK_VERIFY 0 |
| 32 | #define AUTO_FORMAT_FLASH 0 |
| 33 | |
| 34 | /***** Cache Parameters *****/ |
| 35 | #define CACHE_ITEM_NUM 128 |
| 36 | #define BLK_NUM_FOR_L2_CACHE 16 |
| 37 | |
| 38 | /***** Block Table Parameters *****/ |
| 39 | #define BLOCK_TABLE_INDEX 0 |
| 40 | |
| 41 | /***** Wear Leveling Parameters *****/ |
| 42 | #define WEAR_LEVELING_GATE 0x10 |
| 43 | #define WEAR_LEVELING_BLOCK_NUM 10 |
| 44 | |
| 45 | #define DEBUG_BNDRY 0 |
| 46 | |
| 47 | /***** Product Feature Support *****/ |
David Woodhouse | bf46b9a | 2010-06-08 18:27:31 +0100 | [diff] [blame] | 48 | #define FLASH_EMU defined(CONFIG_SPECTRA_EMU) |
| 49 | #define FLASH_NAND defined(CONFIG_SPECTRA_MRST_HW) |
| 50 | #define FLASH_MTD defined(CONFIG_SPECTRA_MTD) |
| 51 | #define CMD_DMA defined(CONFIG_SPECTRA_MRST_HW_DMA) |
Alan Olsen | 494a43b | 2010-04-26 10:50:19 -0700 | [diff] [blame] | 52 | |
| 53 | #define SPECTRA_PARTITION_ID 0 |
| 54 | |
| 55 | /* Enable this macro if the number of flash blocks is larger than 16K. */ |
| 56 | #define SUPPORT_LARGE_BLOCKNUM 1 |
| 57 | |
| 58 | /**** Block Table and Reserved Block Parameters *****/ |
| 59 | #define SPECTRA_START_BLOCK 3 |
| 60 | //#define NUM_FREE_BLOCKS_GATE 30 |
| 61 | #define NUM_FREE_BLOCKS_GATE 60 |
| 62 | |
| 63 | /**** Hardware Parameters ****/ |
| 64 | #define GLOB_HWCTL_REG_BASE 0xFFA40000 |
| 65 | #define GLOB_HWCTL_REG_SIZE 4096 |
| 66 | |
| 67 | #define GLOB_HWCTL_MEM_BASE 0xFFA48000 |
| 68 | #define GLOB_HWCTL_MEM_SIZE 4096 |
| 69 | |
| 70 | /* KBV - Updated to LNW scratch register address */ |
| 71 | #define SCRATCH_REG_ADDR 0xFF108018 |
| 72 | #define SCRATCH_REG_SIZE 64 |
| 73 | |
| 74 | #define GLOB_HWCTL_DEFAULT_BLKS 2048 |
| 75 | |
| 76 | #define SUPPORT_15BITECC 1 |
| 77 | #define SUPPORT_8BITECC 1 |
| 78 | |
| 79 | #define ONFI_BLOOM_TIME 0 |
| 80 | #define MODE5_WORKAROUND 1 |
| 81 | |
| 82 | #endif /*_SPECTRASWCONFIG_*/ |