Vasanthakumar Thiagarajan | ae3bb6d | 2010-04-15 17:38:27 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2010 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | #include "hw.h" |
| 17 | |
| 18 | static void ar9003_hw_rx_enable(struct ath_hw *hw) |
| 19 | { |
| 20 | REG_WRITE(hw, AR_CR, 0); |
| 21 | } |
| 22 | |
Vasanthakumar Thiagarajan | 87d5efb | 2010-04-15 17:38:43 -0400 | [diff] [blame] | 23 | static void ar9003_hw_set_desc_link(void *ds, u32 ds_link) |
| 24 | { |
| 25 | ((struct ar9003_txc *) ds)->link = ds_link; |
| 26 | } |
| 27 | |
| 28 | static void ar9003_hw_get_desc_link(void *ds, u32 **ds_link) |
| 29 | { |
| 30 | *ds_link = &((struct ar9003_txc *) ds)->link; |
| 31 | } |
| 32 | |
Vasanthakumar Thiagarajan | ae3bb6d | 2010-04-15 17:38:27 -0400 | [diff] [blame] | 33 | void ar9003_hw_attach_mac_ops(struct ath_hw *hw) |
| 34 | { |
| 35 | struct ath_hw_ops *ops = ath9k_hw_ops(hw); |
| 36 | |
| 37 | ops->rx_enable = ar9003_hw_rx_enable; |
Vasanthakumar Thiagarajan | 87d5efb | 2010-04-15 17:38:43 -0400 | [diff] [blame] | 38 | ops->set_desc_link = ar9003_hw_set_desc_link; |
| 39 | ops->get_desc_link = ar9003_hw_get_desc_link; |
Vasanthakumar Thiagarajan | ae3bb6d | 2010-04-15 17:38:27 -0400 | [diff] [blame] | 40 | } |
Vasanthakumar Thiagarajan | ad7b806 | 2010-04-15 17:38:28 -0400 | [diff] [blame] | 41 | |
| 42 | void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size) |
| 43 | { |
| 44 | REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK); |
| 45 | } |
| 46 | EXPORT_SYMBOL(ath9k_hw_set_rx_bufsize); |
| 47 | |
| 48 | void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp, |
| 49 | enum ath9k_rx_qtype qtype) |
| 50 | { |
| 51 | if (qtype == ATH9K_RX_QUEUE_HP) |
| 52 | REG_WRITE(ah, AR_HP_RXDP, rxdp); |
| 53 | else |
| 54 | REG_WRITE(ah, AR_LP_RXDP, rxdp); |
| 55 | } |
| 56 | EXPORT_SYMBOL(ath9k_hw_addrxbuf_edma); |
| 57 | |
| 58 | int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs, |
| 59 | void *buf_addr) |
| 60 | { |
| 61 | struct ar9003_rxs *rxsp = (struct ar9003_rxs *) buf_addr; |
| 62 | unsigned int phyerr; |
| 63 | |
| 64 | /* TODO: byte swap on big endian for ar9300_10 */ |
| 65 | |
| 66 | if ((rxsp->status11 & AR_RxDone) == 0) |
| 67 | return -EINPROGRESS; |
| 68 | |
| 69 | if (MS(rxsp->ds_info, AR_DescId) != 0x168c) |
| 70 | return -EINVAL; |
| 71 | |
| 72 | if ((rxsp->ds_info & (AR_TxRxDesc | AR_CtrlStat)) != 0) |
| 73 | return -EINPROGRESS; |
| 74 | |
| 75 | rxs->rs_status = 0; |
| 76 | rxs->rs_flags = 0; |
| 77 | |
| 78 | rxs->rs_datalen = rxsp->status2 & AR_DataLen; |
| 79 | rxs->rs_tstamp = rxsp->status3; |
| 80 | |
| 81 | /* XXX: Keycache */ |
| 82 | rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined); |
| 83 | rxs->rs_rssi_ctl0 = MS(rxsp->status1, AR_RxRSSIAnt00); |
| 84 | rxs->rs_rssi_ctl1 = MS(rxsp->status1, AR_RxRSSIAnt01); |
| 85 | rxs->rs_rssi_ctl2 = MS(rxsp->status1, AR_RxRSSIAnt02); |
| 86 | rxs->rs_rssi_ext0 = MS(rxsp->status5, AR_RxRSSIAnt10); |
| 87 | rxs->rs_rssi_ext1 = MS(rxsp->status5, AR_RxRSSIAnt11); |
| 88 | rxs->rs_rssi_ext2 = MS(rxsp->status5, AR_RxRSSIAnt12); |
| 89 | |
| 90 | if (rxsp->status11 & AR_RxKeyIdxValid) |
| 91 | rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx); |
| 92 | else |
| 93 | rxs->rs_keyix = ATH9K_RXKEYIX_INVALID; |
| 94 | |
| 95 | rxs->rs_rate = MS(rxsp->status1, AR_RxRate); |
| 96 | rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0; |
| 97 | |
| 98 | rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0; |
| 99 | rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0; |
| 100 | rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7); |
| 101 | rxs->rs_flags = (rxsp->status4 & AR_GI) ? ATH9K_RX_GI : 0; |
| 102 | rxs->rs_flags |= (rxsp->status4 & AR_2040) ? ATH9K_RX_2040 : 0; |
| 103 | |
| 104 | rxs->evm0 = rxsp->status6; |
| 105 | rxs->evm1 = rxsp->status7; |
| 106 | rxs->evm2 = rxsp->status8; |
| 107 | rxs->evm3 = rxsp->status9; |
| 108 | rxs->evm4 = (rxsp->status10 & 0xffff); |
| 109 | |
| 110 | if (rxsp->status11 & AR_PreDelimCRCErr) |
| 111 | rxs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE; |
| 112 | |
| 113 | if (rxsp->status11 & AR_PostDelimCRCErr) |
| 114 | rxs->rs_flags |= ATH9K_RX_DELIM_CRC_POST; |
| 115 | |
| 116 | if (rxsp->status11 & AR_DecryptBusyErr) |
| 117 | rxs->rs_flags |= ATH9K_RX_DECRYPT_BUSY; |
| 118 | |
| 119 | if ((rxsp->status11 & AR_RxFrameOK) == 0) { |
| 120 | if (rxsp->status11 & AR_CRCErr) { |
| 121 | rxs->rs_status |= ATH9K_RXERR_CRC; |
| 122 | } else if (rxsp->status11 & AR_PHYErr) { |
| 123 | rxs->rs_status |= ATH9K_RXERR_PHY; |
| 124 | phyerr = MS(rxsp->status11, AR_PHYErrCode); |
| 125 | rxs->rs_phyerr = phyerr; |
| 126 | } else if (rxsp->status11 & AR_DecryptCRCErr) { |
| 127 | rxs->rs_status |= ATH9K_RXERR_DECRYPT; |
| 128 | } else if (rxsp->status11 & AR_MichaelErr) { |
| 129 | rxs->rs_status |= ATH9K_RXERR_MIC; |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | return 0; |
| 134 | } |
| 135 | EXPORT_SYMBOL(ath9k_hw_process_rxdesc_edma); |