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Russell Kinga09e64f2008-08-05 16:14:15 +01001/* arch/arm/mach-msm/include/mach/memory.h
2 *
3 * Copyright (C) 2007 Google, Inc.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004 * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
Russell Kinga09e64f2008-08-05 16:14:15 +01005 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
Russell Kinga09e64f2008-08-05 16:14:15 +010016#ifndef __ASM_ARCH_MEMORY_H
17#define __ASM_ARCH_MEMORY_H
18
19/* physical offset of RAM */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
21
22#define MAX_PHYSMEM_BITS 32
23#define SECTION_SIZE_BITS 28
24
25/* Certain configurations of MSM7x30 have multiple memory banks.
26* One or more of these banks can contain holes in the memory map as well.
27* These macros define appropriate conversion routines between the physical
28* and virtual address domains for supporting these configurations using
29* SPARSEMEM and a 3G/1G VM split.
30*/
31
32#if defined(CONFIG_ARCH_MSM7X30)
33
34#define EBI0_PHYS_OFFSET PHYS_OFFSET
35#define EBI0_PAGE_OFFSET PAGE_OFFSET
36#define EBI0_SIZE 0x10000000
37
38#define EBI1_PHYS_OFFSET 0x40000000
39#define EBI1_PAGE_OFFSET (EBI0_PAGE_OFFSET + EBI0_SIZE)
40
41#if (defined(CONFIG_SPARSEMEM) && defined(CONFIG_VMSPLIT_3G))
42
43#define __phys_to_virt(phys) \
44 ((phys) >= EBI1_PHYS_OFFSET ? \
45 (phys) - EBI1_PHYS_OFFSET + EBI1_PAGE_OFFSET : \
46 (phys) - EBI0_PHYS_OFFSET + EBI0_PAGE_OFFSET)
47
48#define __virt_to_phys(virt) \
49 ((virt) >= EBI1_PAGE_OFFSET ? \
50 (virt) - EBI1_PAGE_OFFSET + EBI1_PHYS_OFFSET : \
51 (virt) - EBI0_PAGE_OFFSET + EBI0_PHYS_OFFSET)
52
Daniel Walker81d658a2010-05-06 14:16:04 -070053#endif
Russell Kinga09e64f2008-08-05 16:14:15 +010054
Russell Kinga09e64f2008-08-05 16:14:15 +010055#endif
56
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070057#define HAS_ARCH_IO_REMAP_PFN_RANGE
58
59#ifndef __ASSEMBLY__
60void *alloc_bootmem_aligned(unsigned long size, unsigned long alignment);
61void *allocate_contiguous_ebi(unsigned long, unsigned long, int);
62unsigned long allocate_contiguous_ebi_nomap(unsigned long, unsigned long);
63void clean_and_invalidate_caches(unsigned long, unsigned long, unsigned long);
64void clean_caches(unsigned long, unsigned long, unsigned long);
65void invalidate_caches(unsigned long, unsigned long, unsigned long);
66int platform_physical_remove_pages(unsigned long, unsigned long);
67int platform_physical_active_pages(unsigned long, unsigned long);
68int platform_physical_low_power_pages(unsigned long, unsigned long);
69
Larry Bassela7eadea2011-07-14 10:46:00 -070070extern int (*change_memory_power)(unsigned long, unsigned long, int);
71
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070072#if defined(CONFIG_ARCH_MSM_ARM11) || defined(CONFIG_ARCH_MSM_CORTEX_A5)
73void write_to_strongly_ordered_memory(void);
74void map_page_strongly_ordered(void);
75#endif
76
77#ifdef CONFIG_CACHE_L2X0
78extern void l2x0_cache_sync(void);
79#define finish_arch_switch(prev) do { l2x0_cache_sync(); } while (0)
80#endif
81
Vikram Mulukutlac39c6092011-07-29 18:36:35 -070082#if defined(CONFIG_ARCH_MSM8X60) || defined(CONFIG_ARCH_MSM8960)
83extern void store_ttbr0(void);
84#define finish_arch_switch(prev) do { store_ttbr0(); } while (0)
85#endif
86
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070087#endif
88
89#if defined CONFIG_ARCH_MSM_SCORPION || defined CONFIG_ARCH_MSM_KRAIT
90#define arch_has_speculative_dfetch() 1
91#endif
92
93#endif
94
95/* these correspond to values known by the modem */
96#define MEMORY_DEEP_POWERDOWN 0
97#define MEMORY_SELF_REFRESH 1
98#define MEMORY_ACTIVE 2
99
100#define NPA_MEMORY_NODE_NAME "/mem/apps/ddr_dpd"
101
102#ifndef CONFIG_ARCH_MSM7X27
103#define CONSISTENT_DMA_SIZE (SZ_1M * 14)
104#endif