| Clemens Ladisch | a9d3cc4 | 2008-04-07 10:29:44 +0200 | [diff] [blame] | 1 | /* register 01h */ |
| 2 | #define CS4362A_PDN 0x01 |
| 3 | #define CS4362A_DAC1_DIS 0x02 |
| 4 | #define CS4362A_DAC2_DIS 0x04 |
| 5 | #define CS4362A_DAC3_DIS 0x08 |
| 6 | #define CS4362A_MCLKDIV 0x20 |
| 7 | #define CS4362A_FREEZE 0x40 |
| 8 | #define CS4362A_CPEN 0x80 |
| 9 | /* register 02h */ |
| 10 | #define CS4362A_DIF_MASK 0x70 |
| 11 | #define CS4362A_DIF_LJUST 0x00 |
| 12 | #define CS4362A_DIF_I2S 0x10 |
| 13 | #define CS4362A_DIF_RJUST_16 0x20 |
| 14 | #define CS4362A_DIF_RJUST_24 0x30 |
| 15 | #define CS4362A_DIF_RJUST_20 0x40 |
| 16 | #define CS4362A_DIF_RJUST_18 0x50 |
| 17 | /* register 03h */ |
| 18 | #define CS4362A_MUTEC_MASK 0x03 |
| 19 | #define CS4362A_MUTEC_6 0x00 |
| 20 | #define CS4362A_MUTEC_1 0x01 |
| 21 | #define CS4362A_MUTEC_3 0x03 |
| 22 | #define CS4362A_AMUTE 0x04 |
| 23 | #define CS4362A_MUTEC_POL 0x08 |
| 24 | #define CS4362A_RMP_UP 0x10 |
| 25 | #define CS4362A_SNGLVOL 0x20 |
| 26 | #define CS4362A_ZERO_CROSS 0x40 |
| 27 | #define CS4362A_SOFT_RAMP 0x80 |
| 28 | /* register 04h */ |
| 29 | #define CS4362A_RMP_DN 0x01 |
| 30 | #define CS4362A_DEM_MASK 0x06 |
| 31 | #define CS4362A_DEM_NONE 0x00 |
| 32 | #define CS4362A_DEM_44100 0x02 |
| 33 | #define CS4362A_DEM_48000 0x04 |
| 34 | #define CS4362A_DEM_32000 0x06 |
| 35 | #define CS4362A_FILT_SEL 0x10 |
| 36 | /* register 05h */ |
| 37 | #define CS4362A_INV_A1 0x01 |
| 38 | #define CS4362A_INV_B1 0x02 |
| 39 | #define CS4362A_INV_A2 0x04 |
| 40 | #define CS4362A_INV_B2 0x08 |
| 41 | #define CS4362A_INV_A3 0x10 |
| 42 | #define CS4362A_INV_B3 0x20 |
| 43 | /* register 06h */ |
| 44 | #define CS4362A_FM_MASK 0x03 |
| 45 | #define CS4362A_FM_SINGLE 0x00 |
| 46 | #define CS4362A_FM_DOUBLE 0x01 |
| 47 | #define CS4362A_FM_QUAD 0x02 |
| 48 | #define CS4362A_FM_DSD 0x03 |
| 49 | #define CS4362A_ATAPI_MASK 0x7c |
| 50 | #define CS4362A_ATAPI_B_MUTE 0x00 |
| 51 | #define CS4362A_ATAPI_B_R 0x04 |
| 52 | #define CS4362A_ATAPI_B_L 0x08 |
| 53 | #define CS4362A_ATAPI_B_LR 0x0c |
| 54 | #define CS4362A_ATAPI_A_MUTE 0x00 |
| 55 | #define CS4362A_ATAPI_A_R 0x10 |
| 56 | #define CS4362A_ATAPI_A_L 0x20 |
| 57 | #define CS4362A_ATAPI_A_LR 0x30 |
| 58 | #define CS4362A_ATAPI_MIX_LR_VOL 0x40 |
| 59 | #define CS4362A_A_EQ_B 0x80 |
| 60 | /* register 07h */ |
| 61 | #define CS4362A_VOL_MASK 0x7f |
| 62 | #define CS4362A_MUTE 0x80 |
| 63 | /* register 08h: like 07h */ |
| 64 | /* registers 09h..0Bh: like 06h..08h */ |
| 65 | /* registers 0Ch..0Eh: like 06h..08h */ |
| 66 | /* register 12h */ |
| 67 | #define CS4362A_REV_MASK 0x07 |
| 68 | #define CS4362A_PART_MASK 0xf8 |
| 69 | #define CS4362A_PART_CS4362A 0x50 |