Dimitris Michailidis | 56d36be | 2010-04-01 15:28:23 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the Chelsio T4 Ethernet driver for Linux. |
| 3 | * |
| 4 | * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved. |
| 5 | * |
| 6 | * This software is available to you under a choice of one of two |
| 7 | * licenses. You may choose to be licensed under the terms of the GNU |
| 8 | * General Public License (GPL) Version 2, available from the file |
| 9 | * COPYING in the main directory of this source tree, or the |
| 10 | * OpenIB.org BSD license below: |
| 11 | * |
| 12 | * Redistribution and use in source and binary forms, with or |
| 13 | * without modification, are permitted provided that the following |
| 14 | * conditions are met: |
| 15 | * |
| 16 | * - Redistributions of source code must retain the above |
| 17 | * copyright notice, this list of conditions and the following |
| 18 | * disclaimer. |
| 19 | * |
| 20 | * - Redistributions in binary form must reproduce the above |
| 21 | * copyright notice, this list of conditions and the following |
| 22 | * disclaimer in the documentation and/or other materials |
| 23 | * provided with the distribution. |
| 24 | * |
| 25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 26 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 27 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 28 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 29 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 30 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 31 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 32 | * SOFTWARE. |
| 33 | */ |
| 34 | |
| 35 | #ifndef __T4_HW_H |
| 36 | #define __T4_HW_H |
| 37 | |
| 38 | #include <linux/types.h> |
| 39 | |
| 40 | enum { |
| 41 | NCHAN = 4, /* # of HW channels */ |
| 42 | MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ |
| 43 | EEPROMSIZE = 17408, /* Serial EEPROM physical size */ |
| 44 | EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ |
| 45 | RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ |
| 46 | TCB_SIZE = 128, /* TCB size */ |
| 47 | NMTUS = 16, /* size of MTU table */ |
| 48 | NCCTRL_WIN = 32, /* # of congestion control windows */ |
| 49 | NEXACT_MAC = 336, /* # of exact MAC address filters */ |
| 50 | L2T_SIZE = 4096, /* # of L2T entries */ |
| 51 | MBOX_LEN = 64, /* mailbox size in bytes */ |
| 52 | TRACE_LEN = 112, /* length of trace data and mask */ |
| 53 | FILTER_OPT_LEN = 36, /* filter tuple width for optional components */ |
| 54 | NWOL_PAT = 8, /* # of WoL patterns */ |
| 55 | WOL_PAT_LEN = 128, /* length of WoL patterns */ |
| 56 | }; |
| 57 | |
| 58 | enum { |
| 59 | SF_PAGE_SIZE = 256, /* serial flash page size */ |
| 60 | SF_SEC_SIZE = 64 * 1024, /* serial flash sector size */ |
| 61 | SF_SIZE = SF_SEC_SIZE * 16, /* serial flash size */ |
| 62 | }; |
| 63 | |
| 64 | enum { RSP_TYPE_FLBUF, RSP_TYPE_CPL, RSP_TYPE_INTR }; /* response entry types */ |
| 65 | |
| 66 | enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */ |
| 67 | |
| 68 | enum { |
| 69 | SGE_MAX_WR_LEN = 512, /* max WR size in bytes */ |
| 70 | SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */ |
| 71 | SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */ |
| 72 | }; |
| 73 | |
| 74 | struct sge_qstat { /* data written to SGE queue status entries */ |
| 75 | __be32 qid; |
| 76 | __be16 cidx; |
| 77 | __be16 pidx; |
| 78 | }; |
| 79 | |
| 80 | /* |
| 81 | * Structure for last 128 bits of response descriptors |
| 82 | */ |
| 83 | struct rsp_ctrl { |
| 84 | __be32 hdrbuflen_pidx; |
| 85 | __be32 pldbuflen_qid; |
| 86 | union { |
| 87 | u8 type_gen; |
| 88 | __be64 last_flit; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | #define RSPD_NEWBUF 0x80000000U |
| 93 | #define RSPD_LEN 0x7fffffffU |
| 94 | |
| 95 | #define RSPD_GEN(x) ((x) >> 7) |
| 96 | #define RSPD_TYPE(x) (((x) >> 4) & 3) |
| 97 | |
| 98 | #define QINTR_CNT_EN 0x1 |
| 99 | #define QINTR_TIMER_IDX(x) ((x) << 1) |
| 100 | #endif /* __T4_HW_H */ |