Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is subject to the terms and conditions of the GNU General Public |
| 3 | * License. See the file "COPYING" in the main directory of this archive |
| 4 | * for more details. |
| 5 | * |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 6 | * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003, 06 by Ralf Baechle |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * Copyright (C) 1996 by Paul M. Antoine |
| 8 | * Copyright (C) 1999 Silicon Graphics |
| 9 | * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com |
| 10 | * Copyright (C) 2000 MIPS Technologies, Inc. |
| 11 | */ |
| 12 | #ifndef _ASM_SYSTEM_H |
| 13 | #define _ASM_SYSTEM_H |
| 14 | |
Ralf Baechle | c677189 | 2009-11-24 13:16:02 +0000 | [diff] [blame] | 15 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/types.h> |
Ralf Baechle | 192ef36 | 2006-07-07 14:07:18 +0100 | [diff] [blame] | 17 | #include <linux/irqflags.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | |
| 19 | #include <asm/addrspace.h> |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 20 | #include <asm/barrier.h> |
Ralf Baechle | fef7470 | 2007-10-01 04:15:00 +0100 | [diff] [blame] | 21 | #include <asm/cmpxchg.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <asm/cpu-features.h> |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 23 | #include <asm/dsp.h> |
David Daney | 2c708cb | 2008-09-23 00:09:51 -0700 | [diff] [blame] | 24 | #include <asm/watch.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | #include <asm/war.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | /* |
| 29 | * switch_to(n) should switch tasks to task nr n, first |
| 30 | * checking that n isn't the current task, in which case it does nothing. |
| 31 | */ |
| 32 | extern asmlinkage void *resume(void *last, void *next, void *next_ti); |
| 33 | |
| 34 | struct task_struct; |
| 35 | |
Ralf Baechle | f1e39a4 | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 36 | extern unsigned int ll_bit; |
| 37 | extern struct task_struct *ll_task; |
| 38 | |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 39 | #ifdef CONFIG_MIPS_MT_FPAFF |
| 40 | |
| 41 | /* |
| 42 | * Handle the scheduler resume end of FPU affinity management. We do this |
| 43 | * inline to try to keep the overhead down. If we have been forced to run on |
| 44 | * a "CPU" with an FPU because of a previous high level of FP computation, |
| 45 | * but did not actually use the FPU during the most recent time-slice (CU1 |
| 46 | * isn't set), we undo the restriction on cpus_allowed. |
| 47 | * |
| 48 | * We're not calling set_cpus_allowed() here, because we have no need to |
| 49 | * force prompt migration - we're already switching the current CPU to a |
| 50 | * different thread. |
| 51 | */ |
| 52 | |
Ralf Baechle | d223a86 | 2007-07-10 17:33:02 +0100 | [diff] [blame] | 53 | #define __mips_mt_fpaff_switch_to(prev) \ |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 54 | do { \ |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 55 | struct thread_info *__prev_ti = task_thread_info(prev); \ |
| 56 | \ |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 57 | if (cpu_has_fpu && \ |
Ralf Baechle | 293c5bd | 2007-07-25 16:19:33 +0100 | [diff] [blame] | 58 | test_ti_thread_flag(__prev_ti, TIF_FPUBOUND) && \ |
| 59 | (!(KSTK_STATUS(prev) & ST0_CU1))) { \ |
| 60 | clear_ti_thread_flag(__prev_ti, TIF_FPUBOUND); \ |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 61 | prev->cpus_allowed = prev->thread.user_cpus_allowed; \ |
| 62 | } \ |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 63 | next->thread.emulated_fp = 0; \ |
Ralf Baechle | f088fc8 | 2006-04-05 09:45:47 +0100 | [diff] [blame] | 64 | } while(0) |
| 65 | |
| 66 | #else |
Ralf Baechle | 35c700c | 2007-07-10 08:59:17 +0100 | [diff] [blame] | 67 | #define __mips_mt_fpaff_switch_to(prev) do { (void) (prev); } while (0) |
Ralf Baechle | d223a86 | 2007-07-10 17:33:02 +0100 | [diff] [blame] | 68 | #endif |
| 69 | |
Ralf Baechle | f4c6b6b | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 70 | #define __clear_software_ll_bit() \ |
| 71 | do { \ |
Ralf Baechle | 43e6ae6 | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 72 | if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \ |
| 73 | ll_bit = 0; \ |
Ralf Baechle | f4c6b6b | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 74 | } while (0) |
Ralf Baechle | f4c6b6b | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 75 | |
Ralf Baechle | 21a151d | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 76 | #define switch_to(prev, next, last) \ |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 77 | do { \ |
Ralf Baechle | d223a86 | 2007-07-10 17:33:02 +0100 | [diff] [blame] | 78 | __mips_mt_fpaff_switch_to(prev); \ |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 79 | if (cpu_has_dsp) \ |
| 80 | __save_dsp(prev); \ |
Ralf Baechle | f4c6b6b | 2009-09-17 02:25:05 +0200 | [diff] [blame] | 81 | __clear_software_ll_bit(); \ |
Al Viro | 40bc9c6 | 2006-01-12 01:06:07 -0800 | [diff] [blame] | 82 | (last) = resume(prev, next, task_thread_info(next)); \ |
Ralf Baechle | 07500b0 | 2007-10-30 17:25:26 +0000 | [diff] [blame] | 83 | } while (0) |
| 84 | |
| 85 | #define finish_arch_switch(prev) \ |
| 86 | do { \ |
Ralf Baechle | e50c0a8 | 2005-05-31 11:49:19 +0000 | [diff] [blame] | 87 | if (cpu_has_dsp) \ |
| 88 | __restore_dsp(current); \ |
Ralf Baechle | a369202 | 2007-07-10 17:33:02 +0100 | [diff] [blame] | 89 | if (cpu_has_userlocal) \ |
Ralf Baechle | 07500b0 | 2007-10-30 17:25:26 +0000 | [diff] [blame] | 90 | write_c0_userlocal(current_thread_info()->tp_value); \ |
David Daney | 2c708cb | 2008-09-23 00:09:51 -0700 | [diff] [blame] | 91 | __restore_watch(); \ |
Ralf Baechle | 07500b0 | 2007-10-30 17:25:26 +0000 | [diff] [blame] | 92 | } while (0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) |
| 95 | { |
| 96 | __u32 retval; |
| 97 | |
David Daney | f252ffd | 2010-01-08 17:17:43 -0800 | [diff] [blame] | 98 | smp_mb__before_llsc(); |
| 99 | |
David Daney | b791d11 | 2009-07-13 11:15:19 -0700 | [diff] [blame] | 100 | if (kernel_uses_llsc && R10000_LLSC_WAR) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | unsigned long dummy; |
| 102 | |
| 103 | __asm__ __volatile__( |
Maciej W. Rozycki | c4559f6 | 2005-06-23 15:57:15 +0000 | [diff] [blame] | 104 | " .set mips3 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | "1: ll %0, %3 # xchg_u32 \n" |
Ralf Baechle | 7222424 | 2005-06-29 13:35:19 +0000 | [diff] [blame] | 106 | " .set mips0 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | " move %2, %z4 \n" |
Ralf Baechle | 7222424 | 2005-06-29 13:35:19 +0000 | [diff] [blame] | 108 | " .set mips3 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | " sc %2, %1 \n" |
| 110 | " beqzl %2, 1b \n" |
Maciej W. Rozycki | aac8aa7 | 2005-06-14 17:35:03 +0000 | [diff] [blame] | 111 | " .set mips0 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
| 113 | : "R" (*m), "Jr" (val) |
| 114 | : "memory"); |
David Daney | b791d11 | 2009-07-13 11:15:19 -0700 | [diff] [blame] | 115 | } else if (kernel_uses_llsc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | unsigned long dummy; |
| 117 | |
Ralf Baechle | 7837314 | 2010-10-29 19:08:24 +0100 | [diff] [blame] | 118 | do { |
| 119 | __asm__ __volatile__( |
| 120 | " .set mips3 \n" |
| 121 | " ll %0, %3 # xchg_u32 \n" |
| 122 | " .set mips0 \n" |
| 123 | " move %2, %z4 \n" |
| 124 | " .set mips3 \n" |
| 125 | " sc %2, %1 \n" |
| 126 | " .set mips0 \n" |
| 127 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
| 128 | : "R" (*m), "Jr" (val) |
| 129 | : "memory"); |
| 130 | } while (unlikely(!dummy)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 131 | } else { |
| 132 | unsigned long flags; |
| 133 | |
Ralf Baechle | 49edd09 | 2007-03-16 16:10:36 +0000 | [diff] [blame] | 134 | raw_local_irq_save(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | retval = *m; |
| 136 | *m = val; |
Ralf Baechle | 49edd09 | 2007-03-16 16:10:36 +0000 | [diff] [blame] | 137 | raw_local_irq_restore(flags); /* implies memory barrier */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | } |
| 139 | |
Ralf Baechle | 17099b1 | 2007-07-14 13:24:05 +0100 | [diff] [blame] | 140 | smp_llsc_mb(); |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 141 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | return retval; |
| 143 | } |
| 144 | |
Ralf Baechle | 875d43e | 2005-09-03 15:56:16 -0700 | [diff] [blame] | 145 | #ifdef CONFIG_64BIT |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) |
| 147 | { |
| 148 | __u64 retval; |
| 149 | |
David Daney | f252ffd | 2010-01-08 17:17:43 -0800 | [diff] [blame] | 150 | smp_mb__before_llsc(); |
| 151 | |
David Daney | b791d11 | 2009-07-13 11:15:19 -0700 | [diff] [blame] | 152 | if (kernel_uses_llsc && R10000_LLSC_WAR) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | unsigned long dummy; |
| 154 | |
| 155 | __asm__ __volatile__( |
Maciej W. Rozycki | aac8aa7 | 2005-06-14 17:35:03 +0000 | [diff] [blame] | 156 | " .set mips3 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | "1: lld %0, %3 # xchg_u64 \n" |
| 158 | " move %2, %z4 \n" |
| 159 | " scd %2, %1 \n" |
| 160 | " beqzl %2, 1b \n" |
Maciej W. Rozycki | aac8aa7 | 2005-06-14 17:35:03 +0000 | [diff] [blame] | 161 | " .set mips0 \n" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
| 163 | : "R" (*m), "Jr" (val) |
| 164 | : "memory"); |
David Daney | b791d11 | 2009-07-13 11:15:19 -0700 | [diff] [blame] | 165 | } else if (kernel_uses_llsc) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | unsigned long dummy; |
| 167 | |
Ralf Baechle | 7837314 | 2010-10-29 19:08:24 +0100 | [diff] [blame] | 168 | do { |
| 169 | __asm__ __volatile__( |
| 170 | " .set mips3 \n" |
| 171 | " lld %0, %3 # xchg_u64 \n" |
| 172 | " move %2, %z4 \n" |
| 173 | " scd %2, %1 \n" |
| 174 | " .set mips0 \n" |
| 175 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
| 176 | : "R" (*m), "Jr" (val) |
| 177 | : "memory"); |
| 178 | } while (unlikely(!dummy)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 179 | } else { |
| 180 | unsigned long flags; |
| 181 | |
Ralf Baechle | 49edd09 | 2007-03-16 16:10:36 +0000 | [diff] [blame] | 182 | raw_local_irq_save(flags); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | retval = *m; |
| 184 | *m = val; |
Ralf Baechle | 49edd09 | 2007-03-16 16:10:36 +0000 | [diff] [blame] | 185 | raw_local_irq_restore(flags); /* implies memory barrier */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | } |
| 187 | |
Ralf Baechle | 17099b1 | 2007-07-14 13:24:05 +0100 | [diff] [blame] | 188 | smp_llsc_mb(); |
Ralf Baechle | 0004a9d | 2006-10-31 03:45:07 +0000 | [diff] [blame] | 189 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | return retval; |
| 191 | } |
| 192 | #else |
| 193 | extern __u64 __xchg_u64_unsupported_on_32bit_kernels(volatile __u64 * m, __u64 val); |
| 194 | #define __xchg_u64 __xchg_u64_unsupported_on_32bit_kernels |
| 195 | #endif |
| 196 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) |
| 198 | { |
| 199 | switch (size) { |
Ralf Baechle | 0cea043 | 2006-03-03 09:42:05 +0000 | [diff] [blame] | 200 | case 4: |
| 201 | return __xchg_u32(ptr, x); |
| 202 | case 8: |
| 203 | return __xchg_u64(ptr, x); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | } |
Ralf Baechle | c677189 | 2009-11-24 13:16:02 +0000 | [diff] [blame] | 205 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | return x; |
| 207 | } |
| 208 | |
Ralf Baechle | c677189 | 2009-11-24 13:16:02 +0000 | [diff] [blame] | 209 | #define xchg(ptr, x) \ |
| 210 | ({ \ |
| 211 | BUILD_BUG_ON(sizeof(*(ptr)) & ~0xc); \ |
| 212 | \ |
| 213 | ((__typeof__(*(ptr))) \ |
| 214 | __xchg((unsigned long)(x), (ptr), sizeof(*(ptr)))); \ |
| 215 | }) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 217 | extern void set_handler(unsigned long offset, void *addr, unsigned long len); |
| 218 | extern void set_uncached_handler(unsigned long offset, void *addr, unsigned long len); |
Ralf Baechle | ef300e4 | 2007-05-06 18:31:18 +0100 | [diff] [blame] | 219 | |
| 220 | typedef void (*vi_handler_t)(void); |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 221 | extern void *set_vi_handler(int n, vi_handler_t addr); |
Ralf Baechle | ef300e4 | 2007-05-06 18:31:18 +0100 | [diff] [blame] | 222 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | extern void *set_except_vector(int n, void *addr); |
Ralf Baechle | 91b05e6 | 2006-03-29 18:53:00 +0100 | [diff] [blame] | 224 | extern unsigned long ebase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | extern void per_cpu_trap_init(void); |
| 226 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | /* |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame] | 228 | * See include/asm-ia64/system.h; prevents deadlock on SMP |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | * systems. |
| 230 | */ |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame] | 231 | #define __ARCH_WANT_UNLOCKED_CTXSW |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | |
Franck Bui-Huu | 9410910 | 2007-07-19 14:04:21 +0200 | [diff] [blame] | 233 | extern unsigned long arch_align_stack(unsigned long sp); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | |
| 235 | #endif /* _ASM_SYSTEM_H */ |