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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030016# MSM IOMMU support
Olav Haugan0858ae02013-06-04 16:51:50 -070017
18# MSM_IOMMU always gets selected by whoever wants it.
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030019config MSM_IOMMU
Olav Haugan0858ae02013-06-04 16:51:50 -070020 bool
21
22# MSM IOMMUv0 support
23config MSM_IOMMU_V0
24 bool "MSM IOMMUv0 Support"
25 depends on ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8610
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030026 select IOMMU_API
Olav Haugan0858ae02013-06-04 16:51:50 -070027 select MSM_IOMMU
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030028 help
Olav Haugan0858ae02013-06-04 16:51:50 -070029 Support for the IOMMUs (v0) found on certain Qualcomm SOCs.
30 These IOMMUs allow virtualization of the address space used by most
31 cores within the multimedia subsystem.
32
33 If unsure, say N here.
34
35# MSM IOMMUv1 support
36config MSM_IOMMU_V1
37 bool "MSM IOMMUv1 Support"
38 depends on ARCH_MSM8974 || ARCH_MPQ8092 || ARCH_MSM8226 || ARCH_APQ8084
39 select IOMMU_API
40 select MSM_IOMMU
41 help
42 Support for the IOMMUs (v1) found on certain Qualcomm SOCs.
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030043 These IOMMUs allow virtualization of the address space used by most
44 cores within the multimedia subsystem.
45
46 If unsure, say N here.
47
Olav Haugan65209cd2012-11-07 15:02:56 -080048# MSM IOMMU CPU-GPU sync programming support
49config MSM_IOMMU_GPU_SYNC
50 bool "MSM IOMMU CPU-GPU Sync Support"
Olav Haugan0858ae02013-06-04 16:51:50 -070051 depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSM8930) && MSM_IOMMU_V0 && MSM_REMOTE_SPINLOCK_SFPB
Olav Haugan65209cd2012-11-07 15:02:56 -080052 help
53 Say Y here if you want to synchronize access to IOMMU configuration
54 port between CPU and GPU. CPU will grab a remote spinlock before
55 accessing IOMMU configuration registers and GPU will do the same.
56
57 If unsure, say N here.
58
Olav Haugan99660ca2012-12-04 13:30:41 -080059config MSM_IOMMU_PMON
60 bool "MSM IOMMU Perfomance Monitoring Support"
Olav Haugan7a2f99c2013-02-04 14:43:26 -080061 depends on (ARCH_MSM8974 || ARCH_MSM8610 || ARCH_MSM8226) && MSM_IOMMU
Olav Haugan99660ca2012-12-04 13:30:41 -080062 help
63 Support for monitoring IOMMUs performance on certain Qualcomm SOCs.
64 It captures TLB statistics per context bank of the IOMMU as an
65 indication of its performance metric.
66
67 If unsure, say N here.
68
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030069config IOMMU_PGTABLES_L2
Steve Mucklef132c6c2012-06-06 18:30:57 -070070 bool "Allow SMMU page tables in the L2 cache (Experimental)"
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030071 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Steve Mucklef132c6c2012-06-06 18:30:57 -070072 help
73 Improves TLB miss latency at the expense of potential L2 pollution.
74 However, with large multimedia buffers, the TLB should mostly contain
75 section mappings and TLB misses should be quite infrequent.
76 Most people can probably say Y here.
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030077
78# AMD IOMMU support
79config AMD_IOMMU
80 bool "AMD IOMMU support"
81 select SWIOTLB
82 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010083 select PCI_ATS
84 select PCI_PRI
85 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030086 select IOMMU_API
87 depends on X86_64 && PCI && ACPI
88 ---help---
89 With this option you can enable support for AMD IOMMU hardware in
90 your system. An IOMMU is a hardware component which provides
91 remapping of DMA memory accesses from devices. With an AMD IOMMU you
92 can isolate the the DMA memory of different devices and protect the
93 system from misbehaving device drivers or hardware.
94
95 You can find out if your system has an AMD IOMMU if you look into
96 your BIOS for an option to enable it or if you have an IVRS ACPI
97 table.
98
99config AMD_IOMMU_STATS
100 bool "Export AMD IOMMU statistics to debugfs"
101 depends on AMD_IOMMU
102 select DEBUG_FS
103 ---help---
104 This option enables code in the AMD IOMMU driver to collect various
105 statistics about whats happening in the driver and exports that
106 information to userspace via debugfs.
107 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300108
Joerg Roedele3c495c2011-11-09 12:31:15 +0100109config AMD_IOMMU_V2
110 tristate "AMD IOMMU Version 2 driver (EXPERIMENTAL)"
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100111 depends on AMD_IOMMU && PROFILING && EXPERIMENTAL
112 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100113 ---help---
114 This option enables support for the AMD IOMMUv2 features of the IOMMU
115 hardware. Select this option if you want to use devices that support
116 the the PCI PRI and PASID interface.
117
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300118# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700119config DMAR_TABLE
120 bool
121
122config INTEL_IOMMU
123 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300124 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
125 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -0700126 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300127 help
128 DMA remapping (DMAR) devices support enables independent address
129 translations for Direct Memory Access (DMA) from devices.
130 These DMA remapping devices are reported via ACPI tables
131 and include PCI device scope covered by these DMA
132 remapping devices.
133
Suresh Siddhad3f13812011-08-23 17:05:25 -0700134config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300135 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700136 prompt "Enable Intel DMA Remapping Devices by default"
137 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300138 help
139 Selecting this option will enable a DMAR device at boot time if
140 one is found. If this option is not selected, DMAR support can
141 be enabled by passing intel_iommu=on to the kernel.
142
Suresh Siddhad3f13812011-08-23 17:05:25 -0700143config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300144 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700145 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300146 ---help---
147 Current Graphics drivers tend to use physical address
148 for DMA and avoid using DMA APIs. Setting this config
149 option permits the IOMMU driver to set a unity map for
150 all the OS-visible memory. Hence the driver can continue
151 to use physical addresses for DMA, at least until this
152 option is removed in the 2.6.32 kernel.
153
Suresh Siddhad3f13812011-08-23 17:05:25 -0700154config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300155 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700156 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300157 ---help---
158 Floppy disk drivers are known to bypass DMA API calls
159 thereby failing to work when IOMMU is enabled. This
160 workaround will setup a 1:1 mapping for the first
161 16MiB to make floppy (an ISA device) work.
162
Suresh Siddhad3f13812011-08-23 17:05:25 -0700163config IRQ_REMAP
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300164 bool "Support for Interrupt Remapping (EXPERIMENTAL)"
165 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
Suresh Siddhad3f13812011-08-23 17:05:25 -0700166 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300167 ---help---
168 Supports Interrupt remapping for IO-APIC and MSI devices.
169 To use x2apic mode in the CPU's which support x2APIC enhancements or
170 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200171
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300172# OMAP IOMMU support
173config OMAP_IOMMU
174 bool "OMAP IOMMU Support"
Ohad Ben-Cohen024ae882011-08-29 07:57:44 +0300175 depends on ARCH_OMAP
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300176 select IOMMU_API
177
178config OMAP_IOVMM
Joerg Roedel7b6d45f2011-09-14 16:03:45 +0200179 tristate "OMAP IO Virtual Memory Manager Support"
180 depends on OMAP_IOMMU
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300181
182config OMAP_IOMMU_DEBUG
183 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
184 depends on OMAP_IOVMM && DEBUG_FS
185 help
186 Select this to see extensive information about
187 the internal state of OMAP IOMMU/IOVMM in debugfs.
188
189 Say N unless you know you need this.
190
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200191config TEGRA_IOMMU_GART
192 bool "Tegra GART IOMMU Support"
193 depends on ARCH_TEGRA_2x_SOC
194 select IOMMU_API
195 help
196 Enables support for remapping discontiguous physical memory
197 shared with the operating system into contiguous I/O virtual
198 space through the GART (Graphics Address Relocation Table)
199 hardware included on Tegra SoCs.
200
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200201config TEGRA_IOMMU_SMMU
202 bool "Tegra SMMU IOMMU Support"
203 depends on ARCH_TEGRA_3x_SOC
204 select IOMMU_API
205 help
206 Enables support for remapping discontiguous physical memory
207 shared with the operating system into contiguous I/O virtual
208 space through the SMMU (System Memory Management Unit)
209 hardware included on Tegra SoCs.
210
Joerg Roedel68255b62011-06-14 15:51:54 +0200211endif # IOMMU_SUPPORT