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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030016# MSM IOMMU support
17config MSM_IOMMU
18 bool "MSM IOMMU Support"
Steve Mucklef132c6c2012-06-06 18:30:57 -070019 depends on ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_APQ8064 || ARCH_MSMCOPPER
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030020 select IOMMU_API
21 help
22 Support for the IOMMUs found on certain Qualcomm SOCs.
23 These IOMMUs allow virtualization of the address space used by most
24 cores within the multimedia subsystem.
25
26 If unsure, say N here.
27
28config IOMMU_PGTABLES_L2
Steve Mucklef132c6c2012-06-06 18:30:57 -070029 bool "Allow SMMU page tables in the L2 cache (Experimental)"
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030030 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Steve Mucklef132c6c2012-06-06 18:30:57 -070031 default y
32 help
33 Improves TLB miss latency at the expense of potential L2 pollution.
34 However, with large multimedia buffers, the TLB should mostly contain
35 section mappings and TLB misses should be quite infrequent.
36 Most people can probably say Y here.
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030037
38# AMD IOMMU support
39config AMD_IOMMU
40 bool "AMD IOMMU support"
41 select SWIOTLB
42 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010043 select PCI_ATS
44 select PCI_PRI
45 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030046 select IOMMU_API
47 depends on X86_64 && PCI && ACPI
48 ---help---
49 With this option you can enable support for AMD IOMMU hardware in
50 your system. An IOMMU is a hardware component which provides
51 remapping of DMA memory accesses from devices. With an AMD IOMMU you
52 can isolate the the DMA memory of different devices and protect the
53 system from misbehaving device drivers or hardware.
54
55 You can find out if your system has an AMD IOMMU if you look into
56 your BIOS for an option to enable it or if you have an IVRS ACPI
57 table.
58
59config AMD_IOMMU_STATS
60 bool "Export AMD IOMMU statistics to debugfs"
61 depends on AMD_IOMMU
62 select DEBUG_FS
63 ---help---
64 This option enables code in the AMD IOMMU driver to collect various
65 statistics about whats happening in the driver and exports that
66 information to userspace via debugfs.
67 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030068
Joerg Roedele3c495c2011-11-09 12:31:15 +010069config AMD_IOMMU_V2
70 tristate "AMD IOMMU Version 2 driver (EXPERIMENTAL)"
Joerg Roedel8736b2c2011-11-24 16:21:52 +010071 depends on AMD_IOMMU && PROFILING && EXPERIMENTAL
72 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +010073 ---help---
74 This option enables support for the AMD IOMMUv2 features of the IOMMU
75 hardware. Select this option if you want to use devices that support
76 the the PCI PRI and PASID interface.
77
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030078# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -070079config DMAR_TABLE
80 bool
81
82config INTEL_IOMMU
83 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030084 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
85 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -070086 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030087 help
88 DMA remapping (DMAR) devices support enables independent address
89 translations for Direct Memory Access (DMA) from devices.
90 These DMA remapping devices are reported via ACPI tables
91 and include PCI device scope covered by these DMA
92 remapping devices.
93
Suresh Siddhad3f13812011-08-23 17:05:25 -070094config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030095 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -070096 prompt "Enable Intel DMA Remapping Devices by default"
97 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +030098 help
99 Selecting this option will enable a DMAR device at boot time if
100 one is found. If this option is not selected, DMAR support can
101 be enabled by passing intel_iommu=on to the kernel.
102
Suresh Siddhad3f13812011-08-23 17:05:25 -0700103config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300104 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700105 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300106 ---help---
107 Current Graphics drivers tend to use physical address
108 for DMA and avoid using DMA APIs. Setting this config
109 option permits the IOMMU driver to set a unity map for
110 all the OS-visible memory. Hence the driver can continue
111 to use physical addresses for DMA, at least until this
112 option is removed in the 2.6.32 kernel.
113
Suresh Siddhad3f13812011-08-23 17:05:25 -0700114config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300115 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700116 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300117 ---help---
118 Floppy disk drivers are known to bypass DMA API calls
119 thereby failing to work when IOMMU is enabled. This
120 workaround will setup a 1:1 mapping for the first
121 16MiB to make floppy (an ISA device) work.
122
Suresh Siddhad3f13812011-08-23 17:05:25 -0700123config IRQ_REMAP
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300124 bool "Support for Interrupt Remapping (EXPERIMENTAL)"
125 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI && EXPERIMENTAL
Suresh Siddhad3f13812011-08-23 17:05:25 -0700126 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300127 ---help---
128 Supports Interrupt remapping for IO-APIC and MSI devices.
129 To use x2apic mode in the CPU's which support x2APIC enhancements or
130 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200131
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300132# OMAP IOMMU support
133config OMAP_IOMMU
134 bool "OMAP IOMMU Support"
Ohad Ben-Cohen024ae882011-08-29 07:57:44 +0300135 depends on ARCH_OMAP
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300136 select IOMMU_API
137
138config OMAP_IOVMM
Joerg Roedel7b6d45f2011-09-14 16:03:45 +0200139 tristate "OMAP IO Virtual Memory Manager Support"
140 depends on OMAP_IOMMU
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300141
142config OMAP_IOMMU_DEBUG
143 tristate "Export OMAP IOMMU/IOVMM internals in DebugFS"
144 depends on OMAP_IOVMM && DEBUG_FS
145 help
146 Select this to see extensive information about
147 the internal state of OMAP IOMMU/IOVMM in debugfs.
148
149 Say N unless you know you need this.
150
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200151config TEGRA_IOMMU_GART
152 bool "Tegra GART IOMMU Support"
153 depends on ARCH_TEGRA_2x_SOC
154 select IOMMU_API
155 help
156 Enables support for remapping discontiguous physical memory
157 shared with the operating system into contiguous I/O virtual
158 space through the GART (Graphics Address Relocation Table)
159 hardware included on Tegra SoCs.
160
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200161config TEGRA_IOMMU_SMMU
162 bool "Tegra SMMU IOMMU Support"
163 depends on ARCH_TEGRA_3x_SOC
164 select IOMMU_API
165 help
166 Enables support for remapping discontiguous physical memory
167 shared with the operating system into contiguous I/O virtual
168 space through the SMMU (System Memory Management Unit)
169 hardware included on Tegra SoCs.
170
Joerg Roedel68255b62011-06-14 15:51:54 +0200171endif # IOMMU_SUPPORT