blob: 8ccab2c67a2094680ef743df277cd7e20a8d16c2 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings906bb262009-11-29 15:16:19 +00004 * Copyright 2006-2009 Solarflare Communications Inc.
Ben Hutchings8ceee662008-04-27 12:55:59 +01005 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/delay.h>
12#include "net_driver.h"
13#include "efx.h"
Ben Hutchings744093c2009-11-29 15:12:08 +000014#include "nic.h"
Ben Hutchings3e6c4532009-10-23 08:30:36 +000015#include "regs.h"
Ben Hutchings12d00ca2009-10-23 08:30:46 +000016#include "io.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010017#include "mac.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010018#include "mdio_10g.h"
19#include "phy.h"
Ben Hutchings8ceee662008-04-27 12:55:59 +010020#include "workarounds.h"
21
22/**************************************************************************
23 *
Ben Hutchings8ceee662008-04-27 12:55:59 +010024 * MAC operations
25 *
26 *************************************************************************/
Ben Hutchings8ceee662008-04-27 12:55:59 +010027
28/* Configure the XAUI driver that is an output from Falcon */
29static void falcon_setup_xaui(struct efx_nic *efx)
30{
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +010031 efx_oword_t sdctl, txdrv;
Ben Hutchings8ceee662008-04-27 12:55:59 +010032
33 /* Move the XAUI into low power, unless there is no PHY, in
34 * which case the XAUI will have to drive a cable. */
35 if (efx->phy_type == PHY_TYPE_NONE)
36 return;
37
Ben Hutchings12d00ca2009-10-23 08:30:46 +000038 efx_reado(efx, &sdctl, FR_AB_XX_SD_CTL);
Ben Hutchings3e6c4532009-10-23 08:30:36 +000039 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVD, FFE_AB_XX_SD_CTL_DRV_DEF);
40 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVD, FFE_AB_XX_SD_CTL_DRV_DEF);
41 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVC, FFE_AB_XX_SD_CTL_DRV_DEF);
42 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVC, FFE_AB_XX_SD_CTL_DRV_DEF);
43 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVB, FFE_AB_XX_SD_CTL_DRV_DEF);
44 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVB, FFE_AB_XX_SD_CTL_DRV_DEF);
45 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_HIDRVA, FFE_AB_XX_SD_CTL_DRV_DEF);
46 EFX_SET_OWORD_FIELD(sdctl, FRF_AB_XX_LODRVA, FFE_AB_XX_SD_CTL_DRV_DEF);
Ben Hutchings12d00ca2009-10-23 08:30:46 +000047 efx_writeo(efx, &sdctl, FR_AB_XX_SD_CTL);
Ben Hutchings8ceee662008-04-27 12:55:59 +010048
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +010049 EFX_POPULATE_OWORD_8(txdrv,
Ben Hutchings3e6c4532009-10-23 08:30:36 +000050 FRF_AB_XX_DEQD, FFE_AB_XX_TXDRV_DEQ_DEF,
51 FRF_AB_XX_DEQC, FFE_AB_XX_TXDRV_DEQ_DEF,
52 FRF_AB_XX_DEQB, FFE_AB_XX_TXDRV_DEQ_DEF,
53 FRF_AB_XX_DEQA, FFE_AB_XX_TXDRV_DEQ_DEF,
54 FRF_AB_XX_DTXD, FFE_AB_XX_TXDRV_DTX_DEF,
55 FRF_AB_XX_DTXC, FFE_AB_XX_TXDRV_DTX_DEF,
56 FRF_AB_XX_DTXB, FFE_AB_XX_TXDRV_DTX_DEF,
57 FRF_AB_XX_DTXA, FFE_AB_XX_TXDRV_DTX_DEF);
Ben Hutchings12d00ca2009-10-23 08:30:46 +000058 efx_writeo(efx, &txdrv, FR_AB_XX_TXDRV_CTL);
Ben Hutchings8ceee662008-04-27 12:55:59 +010059}
60
Ben Hutchingsef08af02008-09-01 12:49:20 +010061int falcon_reset_xaui(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +010062{
Ben Hutchings55edc6e2009-11-25 16:11:35 +000063 struct falcon_nic_data *nic_data = efx->nic_data;
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +010064 efx_oword_t reg;
Ben Hutchings8ceee662008-04-27 12:55:59 +010065 int count;
66
Ben Hutchings55edc6e2009-11-25 16:11:35 +000067 /* Don't fetch MAC statistics over an XMAC reset */
68 WARN_ON(nic_data->stats_disable_count == 0);
69
Ben Hutchingsd4ec09a2009-08-26 08:16:46 +000070 /* Start reset sequence */
Ben Hutchings80cb9a02009-11-25 16:08:41 +000071 EFX_POPULATE_OWORD_1(reg, FRF_AB_XX_RST_XX_EN, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +000072 efx_writeo(efx, &reg, FR_AB_XX_PWR_RST);
Ben Hutchings8ceee662008-04-27 12:55:59 +010073
Ben Hutchingsd4ec09a2009-08-26 08:16:46 +000074 /* Wait up to 10 ms for completion, then reinitialise */
75 for (count = 0; count < 1000; count++) {
Ben Hutchings12d00ca2009-10-23 08:30:46 +000076 efx_reado(efx, &reg, FR_AB_XX_PWR_RST);
Ben Hutchings3e6c4532009-10-23 08:30:36 +000077 if (EFX_OWORD_FIELD(reg, FRF_AB_XX_RST_XX_EN) == 0 &&
78 EFX_OWORD_FIELD(reg, FRF_AB_XX_SD_RST_ACT) == 0) {
Ben Hutchings8ceee662008-04-27 12:55:59 +010079 falcon_setup_xaui(efx);
80 return 0;
81 }
82 udelay(10);
83 }
84 EFX_ERR(efx, "timed out waiting for XAUI/XGXS reset\n");
85 return -ETIMEDOUT;
86}
87
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +010088static void falcon_mask_status_intr(struct efx_nic *efx, bool enable)
Ben Hutchings8ceee662008-04-27 12:55:59 +010089{
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +010090 efx_oword_t reg;
Ben Hutchings8ceee662008-04-27 12:55:59 +010091
Ben Hutchingsdaeda632009-11-28 05:36:04 +000092 if ((efx_nic_rev(efx) != EFX_REV_FALCON_B0) || LOOPBACK_INTERNAL(efx))
Ben Hutchings177dfcd2008-12-12 21:50:08 -080093 return;
94
95 /* We expect xgmii faults if the wireside link is up */
Ben Hutchingseb50c0d2009-11-23 16:06:30 +000096 if (!EFX_WORKAROUND_5147(efx) || !efx->link_state.up)
Ben Hutchings177dfcd2008-12-12 21:50:08 -080097 return;
98
99 /* We can only use this interrupt to signal the negative edge of
100 * xaui_align [we have to poll the positive edge]. */
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000101 if (efx->xmac_poll_required)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100102 return;
103
104 /* Flush the ISR */
105 if (enable)
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000106 efx_reado(efx, &reg, FR_AB_XM_MGT_INT_MSK);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100107
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +0100108 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000109 FRF_AB_XM_MSK_RMTFLT, !enable,
110 FRF_AB_XM_MSK_LCLFLT, !enable);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000111 efx_writeo(efx, &reg, FR_AB_XM_MGT_INT_MASK);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100112}
113
Ben Hutchingsa3550202009-12-23 13:46:47 +0000114static bool falcon_xgxs_link_ok(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100115{
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +0100116 efx_oword_t reg;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100117 bool align_done, link_ok = false;
118 int sync_status;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100119
120 /* Read link status */
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000121 efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100122
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000123 align_done = EFX_OWORD_FIELD(reg, FRF_AB_XX_ALIGN_DONE);
124 sync_status = EFX_OWORD_FIELD(reg, FRF_AB_XX_SYNC_STAT);
125 if (align_done && (sync_status == FFE_AB_XX_STAT_ALL_LANES))
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100126 link_ok = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100127
128 /* Clear link status ready for next read */
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000129 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_COMMA_DET, FFE_AB_XX_STAT_ALL_LANES);
130 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_CHAR_ERR, FFE_AB_XX_STAT_ALL_LANES);
131 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_DISPERR, FFE_AB_XX_STAT_ALL_LANES);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000132 efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100133
Ben Hutchings8ceee662008-04-27 12:55:59 +0100134 return link_ok;
135}
136
Ben Hutchingsa3550202009-12-23 13:46:47 +0000137static bool falcon_xmac_link_ok(struct efx_nic *efx)
138{
139 /*
140 * Check MAC's XGXS link status except when using XGMII loopback
141 * which bypasses the XGXS block.
142 * If possible, check PHY's XGXS link status except when using
143 * MAC loopback.
144 */
145 return (efx->loopback_mode == LOOPBACK_XGMII ||
146 falcon_xgxs_link_ok(efx)) &&
147 (!(efx->mdio.mmds & (1 << MDIO_MMD_PHYXS)) ||
148 LOOPBACK_INTERNAL(efx) ||
149 efx_mdio_phyxgxs_lane_sync(efx));
150}
151
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000152void falcon_reconfigure_xmac_core(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100153{
154 unsigned int max_frame_len;
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +0100155 efx_oword_t reg;
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000156 bool rx_fc = !!(efx->link_state.fc & EFX_FC_RX);
Ben Hutchings4b0d29d2009-11-29 03:42:18 +0000157 bool tx_fc = !!(efx->link_state.fc & EFX_FC_TX);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100158
159 /* Configure MAC - cut-thru mode is hard wired on */
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000160 EFX_POPULATE_OWORD_3(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000161 FRF_AB_XM_RX_JUMBO_MODE, 1,
162 FRF_AB_XM_TX_STAT_EN, 1,
163 FRF_AB_XM_RX_STAT_EN, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000164 efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100165
166 /* Configure TX */
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000167 EFX_POPULATE_OWORD_6(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000168 FRF_AB_XM_TXEN, 1,
169 FRF_AB_XM_TX_PRMBL, 1,
170 FRF_AB_XM_AUTO_PAD, 1,
171 FRF_AB_XM_TXCRC, 1,
Ben Hutchings4b0d29d2009-11-29 03:42:18 +0000172 FRF_AB_XM_FCNTL, tx_fc,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000173 FRF_AB_XM_IPG, 0x3);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000174 efx_writeo(efx, &reg, FR_AB_XM_TX_CFG);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100175
176 /* Configure RX */
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000177 EFX_POPULATE_OWORD_5(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000178 FRF_AB_XM_RXEN, 1,
179 FRF_AB_XM_AUTO_DEPAD, 0,
180 FRF_AB_XM_ACPT_ALL_MCAST, 1,
181 FRF_AB_XM_ACPT_ALL_UCAST, efx->promiscuous,
182 FRF_AB_XM_PASS_CRC_ERR, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000183 efx_writeo(efx, &reg, FR_AB_XM_RX_CFG);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100184
185 /* Set frame length */
186 max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000187 EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_MAX_RX_FRM_SIZE, max_frame_len);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000188 efx_writeo(efx, &reg, FR_AB_XM_RX_PARAM);
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000189 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000190 FRF_AB_XM_MAX_TX_FRM_SIZE, max_frame_len,
191 FRF_AB_XM_TX_JUMBO_MODE, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000192 efx_writeo(efx, &reg, FR_AB_XM_TX_PARAM);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100193
Ben Hutchings80cb9a02009-11-25 16:08:41 +0000194 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000195 FRF_AB_XM_PAUSE_TIME, 0xfffe, /* MAX PAUSE TIME */
196 FRF_AB_XM_DIS_FCNTL, !rx_fc);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000197 efx_writeo(efx, &reg, FR_AB_XM_FC);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100198
199 /* Set MAC address */
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000200 memcpy(&reg, &efx->net_dev->dev_addr[0], 4);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000201 efx_writeo(efx, &reg, FR_AB_XM_ADR_LO);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000202 memcpy(&reg, &efx->net_dev->dev_addr[4], 2);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000203 efx_writeo(efx, &reg, FR_AB_XM_ADR_HI);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100204}
205
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100206static void falcon_reconfigure_xgxs_core(struct efx_nic *efx)
207{
Ben Hutchingsc1e5fcc2008-09-01 12:48:41 +0100208 efx_oword_t reg;
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100209 bool xgxs_loopback = (efx->loopback_mode == LOOPBACK_XGXS);
210 bool xaui_loopback = (efx->loopback_mode == LOOPBACK_XAUI);
211 bool xgmii_loopback = (efx->loopback_mode == LOOPBACK_XGMII);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100212
213 /* XGXS block is flaky and will need to be reset if moving
214 * into our out of XGMII, XGXS or XAUI loopbacks. */
215 if (EFX_WORKAROUND_5147(efx)) {
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100216 bool old_xgmii_loopback, old_xgxs_loopback, old_xaui_loopback;
217 bool reset_xgxs;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100218
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000219 efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000220 old_xgxs_loopback = EFX_OWORD_FIELD(reg, FRF_AB_XX_XGXS_LB_EN);
221 old_xgmii_loopback =
222 EFX_OWORD_FIELD(reg, FRF_AB_XX_XGMII_LB_EN);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100223
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000224 efx_reado(efx, &reg, FR_AB_XX_SD_CTL);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000225 old_xaui_loopback = EFX_OWORD_FIELD(reg, FRF_AB_XX_LPBKA);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100226
227 /* The PHY driver may have turned XAUI off */
228 reset_xgxs = ((xgxs_loopback != old_xgxs_loopback) ||
229 (xaui_loopback != old_xaui_loopback) ||
230 (xgmii_loopback != old_xgmii_loopback));
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100231
232 if (reset_xgxs)
233 falcon_reset_xaui(efx);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100234 }
235
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000236 efx_reado(efx, &reg, FR_AB_XX_CORE_STAT);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000237 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_FORCE_SIG,
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100238 (xgxs_loopback || xaui_loopback) ?
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000239 FFE_AB_XX_FORCE_SIG_ALL_LANES : 0);
240 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_XGXS_LB_EN, xgxs_loopback);
241 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_XGMII_LB_EN, xgmii_loopback);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000242 efx_writeo(efx, &reg, FR_AB_XX_CORE_STAT);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100243
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000244 efx_reado(efx, &reg, FR_AB_XX_SD_CTL);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000245 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKD, xaui_loopback);
246 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKC, xaui_loopback);
247 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKB, xaui_loopback);
248 EFX_SET_OWORD_FIELD(reg, FRF_AB_XX_LPBKA, xaui_loopback);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000249 efx_writeo(efx, &reg, FR_AB_XX_SD_CTL);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100250}
251
252
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000253/* Try to bring up the Falcon side of the Falcon-Phy XAUI link */
Ben Hutchingsa3550202009-12-23 13:46:47 +0000254static bool falcon_xmac_link_ok_retry(struct efx_nic *efx, int tries)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100255{
Ben Hutchingsa3550202009-12-23 13:46:47 +0000256 bool mac_up = falcon_xmac_link_ok(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100257
Ben Hutchingse58f69f2009-11-29 15:08:41 +0000258 if (LOOPBACK_MASK(efx) & LOOPBACKS_EXTERNAL(efx) & LOOPBACKS_WS ||
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100259 efx_phy_mode_disabled(efx->phy_mode))
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800260 /* XAUI link is expected to be down */
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000261 return mac_up;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100262
Ben Hutchings55edc6e2009-11-25 16:11:35 +0000263 falcon_stop_nic_stats(efx);
264
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000265 while (!mac_up && tries) {
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800266 EFX_LOG(efx, "bashing xaui\n");
Ben Hutchings91ad7572008-05-16 21:14:27 +0100267 falcon_reset_xaui(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100268 udelay(200);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100269
Ben Hutchingsa3550202009-12-23 13:46:47 +0000270 mac_up = falcon_xmac_link_ok(efx);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800271 --tries;
272 }
Ben Hutchings55edc6e2009-11-25 16:11:35 +0000273
274 falcon_start_nic_stats(efx);
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000275
276 return mac_up;
277}
278
279static bool falcon_xmac_check_fault(struct efx_nic *efx)
280{
Ben Hutchingsa3550202009-12-23 13:46:47 +0000281 return !falcon_xmac_link_ok_retry(efx, 5);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100282}
283
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000284static int falcon_reconfigure_xmac(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100285{
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100286 falcon_mask_status_intr(efx, false);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100287
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100288 falcon_reconfigure_xgxs_core(efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100289 falcon_reconfigure_xmac_core(efx);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100290
Ben Hutchings8ceee662008-04-27 12:55:59 +0100291 falcon_reconfigure_mac_wrapper(efx);
292
Ben Hutchingsa3550202009-12-23 13:46:47 +0000293 efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 5);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800294 falcon_mask_status_intr(efx, true);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000295
296 return 0;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100297}
298
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800299static void falcon_update_stats_xmac(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100300{
301 struct efx_mac_stats *mac_stats = &efx->mac_stats;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100302
303 /* Update MAC stats from DMAed values */
304 FALCON_STAT(efx, XgRxOctets, rx_bytes);
305 FALCON_STAT(efx, XgRxOctetsOK, rx_good_bytes);
306 FALCON_STAT(efx, XgRxPkts, rx_packets);
307 FALCON_STAT(efx, XgRxPktsOK, rx_good);
308 FALCON_STAT(efx, XgRxBroadcastPkts, rx_broadcast);
309 FALCON_STAT(efx, XgRxMulticastPkts, rx_multicast);
310 FALCON_STAT(efx, XgRxUnicastPkts, rx_unicast);
311 FALCON_STAT(efx, XgRxUndersizePkts, rx_lt64);
312 FALCON_STAT(efx, XgRxOversizePkts, rx_gtjumbo);
313 FALCON_STAT(efx, XgRxJabberPkts, rx_bad_gtjumbo);
314 FALCON_STAT(efx, XgRxUndersizeFCSerrorPkts, rx_bad_lt64);
315 FALCON_STAT(efx, XgRxDropEvents, rx_overflow);
316 FALCON_STAT(efx, XgRxFCSerrorPkts, rx_bad);
317 FALCON_STAT(efx, XgRxAlignError, rx_align_error);
318 FALCON_STAT(efx, XgRxSymbolError, rx_symbol_error);
319 FALCON_STAT(efx, XgRxInternalMACError, rx_internal_error);
320 FALCON_STAT(efx, XgRxControlPkts, rx_control);
321 FALCON_STAT(efx, XgRxPausePkts, rx_pause);
322 FALCON_STAT(efx, XgRxPkts64Octets, rx_64);
323 FALCON_STAT(efx, XgRxPkts65to127Octets, rx_65_to_127);
324 FALCON_STAT(efx, XgRxPkts128to255Octets, rx_128_to_255);
325 FALCON_STAT(efx, XgRxPkts256to511Octets, rx_256_to_511);
326 FALCON_STAT(efx, XgRxPkts512to1023Octets, rx_512_to_1023);
327 FALCON_STAT(efx, XgRxPkts1024to15xxOctets, rx_1024_to_15xx);
328 FALCON_STAT(efx, XgRxPkts15xxtoMaxOctets, rx_15xx_to_jumbo);
329 FALCON_STAT(efx, XgRxLengthError, rx_length_error);
330 FALCON_STAT(efx, XgTxPkts, tx_packets);
331 FALCON_STAT(efx, XgTxOctets, tx_bytes);
332 FALCON_STAT(efx, XgTxMulticastPkts, tx_multicast);
333 FALCON_STAT(efx, XgTxBroadcastPkts, tx_broadcast);
334 FALCON_STAT(efx, XgTxUnicastPkts, tx_unicast);
335 FALCON_STAT(efx, XgTxControlPkts, tx_control);
336 FALCON_STAT(efx, XgTxPausePkts, tx_pause);
337 FALCON_STAT(efx, XgTxPkts64Octets, tx_64);
338 FALCON_STAT(efx, XgTxPkts65to127Octets, tx_65_to_127);
339 FALCON_STAT(efx, XgTxPkts128to255Octets, tx_128_to_255);
340 FALCON_STAT(efx, XgTxPkts256to511Octets, tx_256_to_511);
341 FALCON_STAT(efx, XgTxPkts512to1023Octets, tx_512_to_1023);
342 FALCON_STAT(efx, XgTxPkts1024to15xxOctets, tx_1024_to_15xx);
343 FALCON_STAT(efx, XgTxPkts1519toMaxOctets, tx_15xx_to_jumbo);
344 FALCON_STAT(efx, XgTxUndersizePkts, tx_lt64);
345 FALCON_STAT(efx, XgTxOversizePkts, tx_gtjumbo);
346 FALCON_STAT(efx, XgTxNonTcpUdpPkt, tx_non_tcpudp);
347 FALCON_STAT(efx, XgTxMacSrcErrPkt, tx_mac_src_error);
348 FALCON_STAT(efx, XgTxIpSrcErrPkt, tx_ip_src_error);
349
350 /* Update derived statistics */
351 mac_stats->tx_good_bytes =
Ben Hutchingsc2643612008-09-01 12:46:10 +0100352 (mac_stats->tx_bytes - mac_stats->tx_bad_bytes -
353 mac_stats->tx_control * 64);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100354 mac_stats->rx_bad_bytes =
Ben Hutchingsc2643612008-09-01 12:46:10 +0100355 (mac_stats->rx_bytes - mac_stats->rx_good_bytes -
356 mac_stats->rx_control * 64);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100357}
358
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000359void falcon_poll_xmac(struct efx_nic *efx)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100360{
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000361 if (!EFX_WORKAROUND_5147(efx) || !efx->link_state.up ||
362 !efx->xmac_poll_required)
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800363 return;
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100364
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100365 falcon_mask_status_intr(efx, false);
Ben Hutchingsa3550202009-12-23 13:46:47 +0000366 efx->xmac_poll_required = !falcon_xmac_link_ok_retry(efx, 1);
Ben Hutchings766ca0f2008-12-12 21:59:24 -0800367 falcon_mask_status_intr(efx, true);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100368}
369
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800370struct efx_mac_operations falcon_xmac_operations = {
371 .reconfigure = falcon_reconfigure_xmac,
372 .update_stats = falcon_update_stats_xmac,
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000373 .check_fault = falcon_xmac_check_fault,
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800374};