Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Palmchip bk3710 IDE controller |
| 3 | * |
| 4 | * Copyright (C) 2006 Texas Instruments. |
| 5 | * Copyright (C) 2007 MontaVista Software, Inc., <source@mvista.com> |
| 6 | * |
| 7 | * ---------------------------------------------------------------------------- |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 22 | * ---------------------------------------------------------------------------- |
| 23 | * |
| 24 | */ |
| 25 | |
| 26 | #include <linux/types.h> |
| 27 | #include <linux/module.h> |
| 28 | #include <linux/kernel.h> |
| 29 | #include <linux/ioport.h> |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 30 | #include <linux/ide.h> |
| 31 | #include <linux/delay.h> |
| 32 | #include <linux/init.h> |
| 33 | #include <linux/clk.h> |
| 34 | #include <linux/platform_device.h> |
| 35 | |
| 36 | /* Offset of the primary interface registers */ |
| 37 | #define IDE_PALM_ATA_PRI_REG_OFFSET 0x1F0 |
| 38 | |
| 39 | /* Primary Control Offset */ |
| 40 | #define IDE_PALM_ATA_PRI_CTL_OFFSET 0x3F6 |
| 41 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 42 | #define BK3710_BMICP 0x00 |
| 43 | #define BK3710_BMISP 0x02 |
| 44 | #define BK3710_BMIDTP 0x04 |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 45 | #define BK3710_IDETIMP 0x40 |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 46 | #define BK3710_IDESTATUS 0x47 |
| 47 | #define BK3710_UDMACTL 0x48 |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 48 | #define BK3710_MISCCTL 0x50 |
| 49 | #define BK3710_REGSTB 0x54 |
| 50 | #define BK3710_REGRCVR 0x58 |
| 51 | #define BK3710_DATSTB 0x5C |
| 52 | #define BK3710_DATRCVR 0x60 |
| 53 | #define BK3710_DMASTB 0x64 |
| 54 | #define BK3710_DMARCVR 0x68 |
| 55 | #define BK3710_UDMASTB 0x6C |
| 56 | #define BK3710_UDMATRP 0x70 |
| 57 | #define BK3710_UDMAENV 0x74 |
| 58 | #define BK3710_IORDYTMP 0x78 |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 59 | |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 60 | static unsigned ideclk_period; /* in nanoseconds */ |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 61 | |
David Brownell | db2f38c | 2009-04-22 20:33:40 +0200 | [diff] [blame] | 62 | struct palm_bk3710_udmatiming { |
| 63 | unsigned int rptime; /* tRP -- Ready to pause time (nsec) */ |
| 64 | unsigned int cycletime; /* tCYCTYP2/2 -- avg Cycle Time (nsec) */ |
| 65 | /* tENV is always a minimum of 20 nsec */ |
| 66 | }; |
| 67 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 68 | static const struct palm_bk3710_udmatiming palm_bk3710_udmatimings[6] = { |
Bartlomiej Zolnierkiewicz | d7f51435 | 2009-04-23 22:53:45 +0200 | [diff] [blame] | 69 | { 160, 240 / 2 }, /* UDMA Mode 0 */ |
| 70 | { 125, 160 / 2 }, /* UDMA Mode 1 */ |
| 71 | { 100, 120 / 2 }, /* UDMA Mode 2 */ |
| 72 | { 100, 90 / 2 }, /* UDMA Mode 3 */ |
| 73 | { 100, 60 / 2 }, /* UDMA Mode 4 */ |
| 74 | { 85, 40 / 2 }, /* UDMA Mode 5 */ |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 75 | }; |
| 76 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 77 | static void palm_bk3710_setudmamode(void __iomem *base, unsigned int dev, |
| 78 | unsigned int mode) |
| 79 | { |
| 80 | u8 tenv, trp, t0; |
| 81 | u32 val32; |
| 82 | u16 val16; |
| 83 | |
| 84 | /* DMA Data Setup */ |
Julia Lawall | 00fe8b7 | 2008-04-26 17:36:35 +0200 | [diff] [blame] | 85 | t0 = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].cycletime, |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 86 | ideclk_period) - 1; |
| 87 | tenv = DIV_ROUND_UP(20, ideclk_period) - 1; |
Julia Lawall | 00fe8b7 | 2008-04-26 17:36:35 +0200 | [diff] [blame] | 88 | trp = DIV_ROUND_UP(palm_bk3710_udmatimings[mode].rptime, |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 89 | ideclk_period) - 1; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 90 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 91 | /* udmastb Ultra DMA Access Strobe Width */ |
| 92 | val32 = readl(base + BK3710_UDMASTB) & (0xFF << (dev ? 0 : 8)); |
| 93 | val32 |= (t0 << (dev ? 8 : 0)); |
| 94 | writel(val32, base + BK3710_UDMASTB); |
| 95 | |
| 96 | /* udmatrp Ultra DMA Ready to Pause Time */ |
| 97 | val32 = readl(base + BK3710_UDMATRP) & (0xFF << (dev ? 0 : 8)); |
| 98 | val32 |= (trp << (dev ? 8 : 0)); |
| 99 | writel(val32, base + BK3710_UDMATRP); |
| 100 | |
| 101 | /* udmaenv Ultra DMA envelop Time */ |
| 102 | val32 = readl(base + BK3710_UDMAENV) & (0xFF << (dev ? 0 : 8)); |
| 103 | val32 |= (tenv << (dev ? 8 : 0)); |
| 104 | writel(val32, base + BK3710_UDMAENV); |
| 105 | |
| 106 | /* Enable UDMA for Device */ |
| 107 | val16 = readw(base + BK3710_UDMACTL) | (1 << dev); |
| 108 | writew(val16, base + BK3710_UDMACTL); |
| 109 | } |
| 110 | |
| 111 | static void palm_bk3710_setdmamode(void __iomem *base, unsigned int dev, |
| 112 | unsigned short min_cycle, |
| 113 | unsigned int mode) |
| 114 | { |
| 115 | u8 td, tkw, t0; |
| 116 | u32 val32; |
| 117 | u16 val16; |
| 118 | struct ide_timing *t; |
| 119 | int cycletime; |
| 120 | |
| 121 | t = ide_timing_find_mode(mode); |
| 122 | cycletime = max_t(int, t->cycle, min_cycle); |
| 123 | |
| 124 | /* DMA Data Setup */ |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 125 | t0 = DIV_ROUND_UP(cycletime, ideclk_period); |
| 126 | td = DIV_ROUND_UP(t->active, ideclk_period); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 127 | tkw = t0 - td - 1; |
| 128 | td -= 1; |
| 129 | |
| 130 | val32 = readl(base + BK3710_DMASTB) & (0xFF << (dev ? 0 : 8)); |
| 131 | val32 |= (td << (dev ? 8 : 0)); |
| 132 | writel(val32, base + BK3710_DMASTB); |
| 133 | |
| 134 | val32 = readl(base + BK3710_DMARCVR) & (0xFF << (dev ? 0 : 8)); |
| 135 | val32 |= (tkw << (dev ? 8 : 0)); |
| 136 | writel(val32, base + BK3710_DMARCVR); |
| 137 | |
| 138 | /* Disable UDMA for Device */ |
| 139 | val16 = readw(base + BK3710_UDMACTL) & ~(1 << dev); |
| 140 | writew(val16, base + BK3710_UDMACTL); |
| 141 | } |
| 142 | |
| 143 | static void palm_bk3710_setpiomode(void __iomem *base, ide_drive_t *mate, |
| 144 | unsigned int dev, unsigned int cycletime, |
| 145 | unsigned int mode) |
| 146 | { |
| 147 | u8 t2, t2i, t0; |
| 148 | u32 val32; |
| 149 | struct ide_timing *t; |
| 150 | |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 151 | t = ide_timing_find_mode(XFER_PIO_0 + mode); |
| 152 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 153 | /* PIO Data Setup */ |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 154 | t0 = DIV_ROUND_UP(cycletime, ideclk_period); |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 155 | t2 = DIV_ROUND_UP(t->active, ideclk_period); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 156 | |
| 157 | t2i = t0 - t2 - 1; |
| 158 | t2 -= 1; |
| 159 | |
| 160 | val32 = readl(base + BK3710_DATSTB) & (0xFF << (dev ? 0 : 8)); |
| 161 | val32 |= (t2 << (dev ? 8 : 0)); |
| 162 | writel(val32, base + BK3710_DATSTB); |
| 163 | |
| 164 | val32 = readl(base + BK3710_DATRCVR) & (0xFF << (dev ? 0 : 8)); |
| 165 | val32 |= (t2i << (dev ? 8 : 0)); |
| 166 | writel(val32, base + BK3710_DATRCVR); |
| 167 | |
Bartlomiej Zolnierkiewicz | 7e59ea2 | 2008-10-10 22:39:26 +0200 | [diff] [blame] | 168 | if (mate) { |
Bartlomiej Zolnierkiewicz | 0716302 | 2010-01-18 07:22:09 +0000 | [diff] [blame] | 169 | u8 mode2 = mate->pio_mode - XFER_PIO_0; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 170 | |
| 171 | if (mode2 < mode) |
| 172 | mode = mode2; |
| 173 | } |
| 174 | |
| 175 | /* TASKFILE Setup */ |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 176 | t0 = DIV_ROUND_UP(t->cyc8b, ideclk_period); |
| 177 | t2 = DIV_ROUND_UP(t->act8b, ideclk_period); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 178 | |
| 179 | t2i = t0 - t2 - 1; |
| 180 | t2 -= 1; |
| 181 | |
| 182 | val32 = readl(base + BK3710_REGSTB) & (0xFF << (dev ? 0 : 8)); |
| 183 | val32 |= (t2 << (dev ? 8 : 0)); |
| 184 | writel(val32, base + BK3710_REGSTB); |
| 185 | |
| 186 | val32 = readl(base + BK3710_REGRCVR) & (0xFF << (dev ? 0 : 8)); |
| 187 | val32 |= (t2i << (dev ? 8 : 0)); |
| 188 | writel(val32, base + BK3710_REGRCVR); |
| 189 | } |
| 190 | |
Bartlomiej Zolnierkiewicz | 8776168 | 2010-01-19 01:45:29 -0800 | [diff] [blame] | 191 | static void palm_bk3710_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 192 | { |
| 193 | int is_slave = drive->dn & 1; |
Bartlomiej Zolnierkiewicz | 8776168 | 2010-01-19 01:45:29 -0800 | [diff] [blame] | 194 | void __iomem *base = (void *)hwif->dma_base; |
| 195 | const u8 xferspeed = drive->dma_mode; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 196 | |
| 197 | if (xferspeed >= XFER_UDMA_0) { |
| 198 | palm_bk3710_setudmamode(base, is_slave, |
| 199 | xferspeed - XFER_UDMA_0); |
| 200 | } else { |
Bartlomiej Zolnierkiewicz | 4dde449 | 2008-10-10 22:39:19 +0200 | [diff] [blame] | 201 | palm_bk3710_setdmamode(base, is_slave, |
| 202 | drive->id[ATA_ID_EIDE_DMA_MIN], |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 203 | xferspeed); |
| 204 | } |
| 205 | } |
| 206 | |
Bartlomiej Zolnierkiewicz | e085b3c | 2010-01-19 01:44:41 -0800 | [diff] [blame] | 207 | static void palm_bk3710_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 208 | { |
| 209 | unsigned int cycle_time; |
| 210 | int is_slave = drive->dn & 1; |
| 211 | ide_drive_t *mate; |
Bartlomiej Zolnierkiewicz | e085b3c | 2010-01-19 01:44:41 -0800 | [diff] [blame] | 212 | void __iomem *base = (void *)hwif->dma_base; |
| 213 | const u8 pio = drive->pio_mode - XFER_PIO_0; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 214 | |
| 215 | /* |
| 216 | * Obtain the drive PIO data for tuning the Palm Chip registers |
| 217 | */ |
| 218 | cycle_time = ide_pio_cycle_time(drive, pio); |
Bartlomiej Zolnierkiewicz | 7e59ea2 | 2008-10-10 22:39:26 +0200 | [diff] [blame] | 219 | mate = ide_get_pair_dev(drive); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 220 | palm_bk3710_setpiomode(base, mate, is_slave, cycle_time, pio); |
| 221 | } |
| 222 | |
| 223 | static void __devinit palm_bk3710_chipinit(void __iomem *base) |
| 224 | { |
| 225 | /* |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 226 | * REVISIT: the ATA reset signal needs to be managed through a |
| 227 | * GPIO, which means it should come from platform_data. Until |
| 228 | * we get and use such information, we have to trust that things |
| 229 | * have been reset before we get here. |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 230 | */ |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 231 | |
| 232 | /* |
| 233 | * Program the IDETIMP Register Value based on the following assumptions |
| 234 | * |
| 235 | * (ATA_IDETIMP_IDEEN , ENABLE ) | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 236 | * (ATA_IDETIMP_PREPOST1 , DISABLE) | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 237 | * (ATA_IDETIMP_PREPOST0 , DISABLE) | |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 238 | * |
| 239 | * DM6446 silicon rev 2.1 and earlier have no observed net benefit |
| 240 | * from enabling prefetch/postwrite. |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 241 | */ |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 242 | writew(BIT(15), base + BK3710_IDETIMP); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 243 | |
| 244 | /* |
| 245 | * UDMACTL Ultra-ATA DMA Control |
| 246 | * (ATA_UDMACTL_UDMAP1 , 0 ) | |
| 247 | * (ATA_UDMACTL_UDMAP0 , 0 ) |
| 248 | * |
| 249 | */ |
| 250 | writew(0, base + BK3710_UDMACTL); |
| 251 | |
| 252 | /* |
| 253 | * MISCCTL Miscellaneous Conrol Register |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 254 | * (ATA_MISCCTL_HWNHLD1P , 1 cycle) |
| 255 | * (ATA_MISCCTL_HWNHLD0P , 1 cycle) |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 256 | * (ATA_MISCCTL_TIMORIDE , 1) |
| 257 | */ |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 258 | writel(0x001, base + BK3710_MISCCTL); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 259 | |
| 260 | /* |
| 261 | * IORDYTMP IORDY Timer for Primary Register |
| 262 | * (ATA_IORDYTMP_IORDYTMP , 0xffff ) |
| 263 | */ |
| 264 | writel(0xFFFF, base + BK3710_IORDYTMP); |
| 265 | |
| 266 | /* |
| 267 | * Configure BMISP Register |
| 268 | * (ATA_BMISP_DMAEN1 , DISABLE ) | |
| 269 | * (ATA_BMISP_DMAEN0 , DISABLE ) | |
| 270 | * (ATA_BMISP_IORDYINT , CLEAR) | |
| 271 | * (ATA_BMISP_INTRSTAT , CLEAR) | |
| 272 | * (ATA_BMISP_DMAERROR , CLEAR) |
| 273 | */ |
| 274 | writew(0, base + BK3710_BMISP); |
| 275 | |
| 276 | palm_bk3710_setpiomode(base, NULL, 0, 600, 0); |
| 277 | palm_bk3710_setpiomode(base, NULL, 1, 600, 0); |
| 278 | } |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 279 | |
Bartlomiej Zolnierkiewicz | f454cbe | 2008-08-05 18:17:04 +0200 | [diff] [blame] | 280 | static u8 palm_bk3710_cable_detect(ide_hwif_t *hwif) |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 281 | { |
| 282 | return ATA_CBL_PATA80; |
| 283 | } |
| 284 | |
Bartlomiej Zolnierkiewicz | b552a2c | 2008-04-26 22:25:23 +0200 | [diff] [blame] | 285 | static int __devinit palm_bk3710_init_dma(ide_hwif_t *hwif, |
| 286 | const struct ide_port_info *d) |
| 287 | { |
Bartlomiej Zolnierkiewicz | b552a2c | 2008-04-26 22:25:23 +0200 | [diff] [blame] | 288 | printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name); |
| 289 | |
| 290 | if (ide_allocate_dma_engine(hwif)) |
| 291 | return -1; |
| 292 | |
Bartlomiej Zolnierkiewicz | 81e8d5a | 2008-07-23 19:55:51 +0200 | [diff] [blame] | 293 | hwif->dma_base = hwif->io_ports.data_addr - IDE_PALM_ATA_PRI_REG_OFFSET; |
| 294 | |
Bartlomiej Zolnierkiewicz | b552a2c | 2008-04-26 22:25:23 +0200 | [diff] [blame] | 295 | return 0; |
| 296 | } |
| 297 | |
Bartlomiej Zolnierkiewicz | ac95bee | 2008-04-26 22:25:14 +0200 | [diff] [blame] | 298 | static const struct ide_port_ops palm_bk3710_ports_ops = { |
| 299 | .set_pio_mode = palm_bk3710_set_pio_mode, |
| 300 | .set_dma_mode = palm_bk3710_set_dma_mode, |
| 301 | .cable_detect = palm_bk3710_cable_detect, |
| 302 | }; |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 303 | |
Sergei Shtylyov | a0f403b | 2008-07-24 22:53:34 +0200 | [diff] [blame] | 304 | static struct ide_port_info __devinitdata palm_bk3710_port_info = { |
Bartlomiej Zolnierkiewicz | b552a2c | 2008-04-26 22:25:23 +0200 | [diff] [blame] | 305 | .init_dma = palm_bk3710_init_dma, |
Bartlomiej Zolnierkiewicz | ac95bee | 2008-04-26 22:25:14 +0200 | [diff] [blame] | 306 | .port_ops = &palm_bk3710_ports_ops, |
Sergei Shtylyov | 3f023b0 | 2009-01-06 17:21:01 +0100 | [diff] [blame] | 307 | .dma_ops = &sff_dma_ops, |
Bartlomiej Zolnierkiewicz | c5dd43e | 2008-04-28 23:44:37 +0200 | [diff] [blame] | 308 | .host_flags = IDE_HFLAG_MMIO, |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 309 | .pio_mask = ATA_PIO4, |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 310 | .mwdma_mask = ATA_MWDMA2, |
Bartlomiej Zolnierkiewicz | 29e52cf | 2009-05-17 19:12:22 +0200 | [diff] [blame] | 311 | .chipset = ide_palm3710, |
Bartlomiej Zolnierkiewicz | c79b60d | 2008-02-11 00:32:13 +0100 | [diff] [blame] | 312 | }; |
| 313 | |
David Brownell | bfc2f01 | 2008-09-02 20:18:47 +0200 | [diff] [blame] | 314 | static int __init palm_bk3710_probe(struct platform_device *pdev) |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 315 | { |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 316 | struct clk *clk; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 317 | struct resource *mem, *irq; |
David Brownell | ef183f6 | 2009-01-19 13:46:57 +0100 | [diff] [blame] | 318 | void __iomem *base; |
Kevin Hilman | 13b8860 | 2009-01-30 11:59:27 -0800 | [diff] [blame] | 319 | unsigned long rate, mem_size; |
Bartlomiej Zolnierkiewicz | 6f904d0 | 2008-07-23 19:55:57 +0200 | [diff] [blame] | 320 | int i, rc; |
Bartlomiej Zolnierkiewicz | 9f36d31 | 2009-05-17 19:12:25 +0200 | [diff] [blame] | 321 | struct ide_hw hw, *hws[] = { &hw }; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 322 | |
Kevin Hilman | 468b5ef | 2009-07-06 12:26:16 +0000 | [diff] [blame] | 323 | clk = clk_get(&pdev->dev, NULL); |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 324 | if (IS_ERR(clk)) |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 325 | return -ENODEV; |
| 326 | |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 327 | clk_enable(clk); |
| 328 | rate = clk_get_rate(clk); |
Sergei Shtylyov | ffab6cf | 2008-07-08 19:27:22 +0200 | [diff] [blame] | 329 | |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 330 | /* NOTE: round *down* to meet minimum timings; we count in clocks */ |
| 331 | ideclk_period = 1000000000UL / rate; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 332 | |
| 333 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 334 | if (mem == NULL) { |
| 335 | printk(KERN_ERR "failed to get memory region resource\n"); |
| 336 | return -ENODEV; |
| 337 | } |
Sergei Shtylyov | ce42a54 | 2008-06-20 20:53:32 +0200 | [diff] [blame] | 338 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 339 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 340 | if (irq == NULL) { |
| 341 | printk(KERN_ERR "failed to get IRQ resource\n"); |
| 342 | return -ENODEV; |
| 343 | } |
| 344 | |
Joe Perches | 28f65c1 | 2011-06-09 09:13:32 -0700 | [diff] [blame] | 345 | mem_size = resource_size(mem); |
Kevin Hilman | 13b8860 | 2009-01-30 11:59:27 -0800 | [diff] [blame] | 346 | if (request_mem_region(mem->start, mem_size, "palm_bk3710") == NULL) { |
Sergei Shtylyov | ce42a54 | 2008-06-20 20:53:32 +0200 | [diff] [blame] | 347 | printk(KERN_ERR "failed to request memory region\n"); |
| 348 | return -EBUSY; |
| 349 | } |
| 350 | |
Kevin Hilman | 13b8860 | 2009-01-30 11:59:27 -0800 | [diff] [blame] | 351 | base = ioremap(mem->start, mem_size); |
| 352 | if (!base) { |
| 353 | printk(KERN_ERR "failed to map IO memory\n"); |
| 354 | release_mem_region(mem->start, mem_size); |
| 355 | return -ENOMEM; |
| 356 | } |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 357 | |
| 358 | /* Configure the Palm Chip controller */ |
David Brownell | ef183f6 | 2009-01-19 13:46:57 +0100 | [diff] [blame] | 359 | palm_bk3710_chipinit(base); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 360 | |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 361 | memset(&hw, 0, sizeof(hw)); |
Bartlomiej Zolnierkiewicz | 7824bc6 | 2008-02-11 00:32:12 +0100 | [diff] [blame] | 362 | for (i = 0; i < IDE_NR_PORTS - 2; i++) |
David Brownell | ef183f6 | 2009-01-19 13:46:57 +0100 | [diff] [blame] | 363 | hw.io_ports_array[i] = (unsigned long) |
| 364 | (base + IDE_PALM_ATA_PRI_REG_OFFSET + i); |
| 365 | hw.io_ports.ctl_addr = (unsigned long) |
| 366 | (base + IDE_PALM_ATA_PRI_CTL_OFFSET); |
Bartlomiej Zolnierkiewicz | 7824bc6 | 2008-02-11 00:32:12 +0100 | [diff] [blame] | 367 | hw.irq = irq->start; |
David Brownell | bfc2f01 | 2008-09-02 20:18:47 +0200 | [diff] [blame] | 368 | hw.dev = &pdev->dev; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 369 | |
Sergei Shtylyov | a0f403b | 2008-07-24 22:53:34 +0200 | [diff] [blame] | 370 | palm_bk3710_port_info.udma_mask = rate < 100000000 ? ATA_UDMA4 : |
| 371 | ATA_UDMA5; |
| 372 | |
David Brownell | 33e86019 | 2009-04-23 22:53:43 +0200 | [diff] [blame] | 373 | /* Register the IDE interface with Linux */ |
Bartlomiej Zolnierkiewicz | dca3983 | 2009-05-17 19:12:24 +0200 | [diff] [blame] | 374 | rc = ide_host_add(&palm_bk3710_port_info, hws, 1, NULL); |
Bartlomiej Zolnierkiewicz | 6f904d0 | 2008-07-23 19:55:57 +0200 | [diff] [blame] | 375 | if (rc) |
Bartlomiej Zolnierkiewicz | 7824bc6 | 2008-02-11 00:32:12 +0100 | [diff] [blame] | 376 | goto out; |
| 377 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 378 | return 0; |
Bartlomiej Zolnierkiewicz | 7824bc6 | 2008-02-11 00:32:12 +0100 | [diff] [blame] | 379 | out: |
| 380 | printk(KERN_WARNING "Palm Chip BK3710 IDE Register Fail\n"); |
Bartlomiej Zolnierkiewicz | 6f904d0 | 2008-07-23 19:55:57 +0200 | [diff] [blame] | 381 | return rc; |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 382 | } |
| 383 | |
Kay Sievers | 458622f | 2008-04-18 13:41:57 -0700 | [diff] [blame] | 384 | /* work with hotplug and coldplug */ |
| 385 | MODULE_ALIAS("platform:palm_bk3710"); |
| 386 | |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 387 | static struct platform_driver platform_bk_driver = { |
| 388 | .driver = { |
| 389 | .name = "palm_bk3710", |
Kay Sievers | 458622f | 2008-04-18 13:41:57 -0700 | [diff] [blame] | 390 | .owner = THIS_MODULE, |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 391 | }, |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 392 | }; |
| 393 | |
| 394 | static int __init palm_bk3710_init(void) |
| 395 | { |
David Brownell | bfc2f01 | 2008-09-02 20:18:47 +0200 | [diff] [blame] | 396 | return platform_driver_probe(&platform_bk_driver, palm_bk3710_probe); |
Anton Salnikov | 7c7e92a | 2008-02-06 02:57:48 +0100 | [diff] [blame] | 397 | } |
| 398 | |
| 399 | module_init(palm_bk3710_init); |
| 400 | MODULE_LICENSE("GPL"); |