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gerrit-public.fairphone.software / kernel / msm / cdf4ff866d957c23db13c6459a7e74dee1e5bc8f / . / drivers / media / video / vcap_vp.h
blob: 70b10c3c02731f4eb129aecbb36d9a9be47f830a [file] [log] [blame]
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]1/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef VCAP_VP_H
14#define VCAP_VP_H
15
16#include <linux/interrupt.h>
17
18#include <media/vcap_v4l2.h>
19
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]20#define VCAP_VP_INT_STATUS (VCAP_BASE + 0x404)
21#define VCAP_VP_INT_CLEAR (VCAP_BASE + 0x40C)
22
23#define VCAP_VP_SW_RESET (VCAP_BASE + 0x410)
24#define VCAP_VP_INTERRUPT_ENABLE (VCAP_BASE + 0x408)
25
26#define VCAP_VP_FILM_PROJECTION_T0 (VCAP_BASE + 0x50C)
27#define VCAP_VP_FILM_PROJECTION_T2 (VCAP_BASE + 0x508)
28#define VCAP_VP_FILM_PAST_MAX_PROJ (VCAP_BASE + 0x510)
29#define VCAP_VP_FILM_PAST_MIN_PROJ (VCAP_BASE + 0x514)
30#define VCAP_VP_FILM_SEQUENCE_HIST (VCAP_BASE + 0x504)
31#define VCAP_VP_FILM_MODE_STATE (VCAP_BASE + 0x500)
32
33#define VCAP_VP_BAL_VMOTION_STATE (VCAP_BASE + 0x690)
34#define VCAP_VP_REDUCT_AVG_MOTION (VCAP_BASE + 0x610)
35#define VCAP_VP_REDUCT_AVG_MOTION2 (VCAP_BASE + 0x614)
36
37#define VCAP_VP_NR_AVG_LUMA (VCAP_BASE + 0x608)
38#define VCAP_VP_NR_AVG_CHROMA (VCAP_BASE + 0x60C)
39#define VCAP_VP_NR_CTRL_LUMA (VCAP_BASE + 0x600)
40#define VCAP_VP_NR_CTRL_CHROMA (VCAP_BASE + 0x604)
41
42#define VCAP_VP_BAL_AVG_BLEND (VCAP_BASE + 0x694)
43#define VCAP_VP_VMOTION_HIST (VCAP_BASE + 0x6F8)
44
45#define VCAP_VP_MOTION_EST_ADDR (VCAP_BASE + 0x4E0)
46#define VCAP_VP_FILM_ANALYSIS_CONFIG (VCAP_BASE + 0x520)
47#define VCAP_VP_FILM_STATE_CONFIG (VCAP_BASE + 0x524)
48
49#define VCAP_VP_FVM_CONFIG (VCAP_BASE + 0x550)
50#define VCAP_VP_FILM_ANALYSIS_CONFIG2 (VCAP_BASE + 0x52C)
51#define VCAP_VP_MIXED_ANALYSIS_CONFIG (VCAP_BASE + 0x530)
52
53#define VCAP_VP_SPATIAL_CONFIG (VCAP_BASE + 0x580)
54#define VCAP_VP_SPATIAL_CONFIG2 (VCAP_BASE + 0x584)
55#define VCAP_VP_SPATIAL_CONFIG3 (VCAP_BASE + 0x588)
56#define VCAP_VP_TEMPORAL_CONFIG (VCAP_BASE + 0x5C0)
57
58#define VCAP_VP_PIXEL_DIFF_CONFIG (VCAP_BASE + 0x6FC)
59#define VCAP_VP_H_FREQ_CONFIG (VCAP_BASE + 0x528)
60#define VCAP_VP_NR_CONFIG (VCAP_BASE + 0x620)
61#define VCAP_VP_NR_LUMA_CONFIG (VCAP_BASE + 0x624)
62#define VCAP_VP_NR_CHROMA_CONFIG (VCAP_BASE + 0x628)
63#define VCAP_VP_BAL_CONFIG (VCAP_BASE + 0x680)
64#define VCAP_VP_BAL_MOTION_CONFIG (VCAP_BASE + 0x684)
65#define VCAP_VP_BAL_LIGHT_COMB (VCAP_BASE + 0x688)
66#define VCAP_VP_BAL_VMOTION_CONFIG (VCAP_BASE + 0x68C)
67
68#define VCAP_VP_NR_CONFIG2 (VCAP_BASE + 0x484)
69#define VCAP_VP_FRAME_SIZE (VCAP_BASE + 0x48C)
70#define VCAP_VP_SPLIT_SCRN_CTRL (VCAP_BASE + 0x750)
71
72#define VCAP_VP_IN_CONFIG (VCAP_BASE + 0x480)
73#define VCAP_VP_OUT_CONFIG (VCAP_BASE + 0x488)
74
75#define VCAP_VP_T2_Y_BASE_ADDR (VCAP_BASE + 0x4C0)
76#define VCAP_VP_T2_C_BASE_ADDR (VCAP_BASE + 0x4C4)
77#define VCAP_VP_OUT_Y_BASE_ADDR (VCAP_BASE + 0x4CC)
78#define VCAP_VP_OUT_C_BASE_ADDR (VCAP_BASE + 0x4D0)
79#define VCAP_VP_OUT_CR_BASE_ADDR (VCAP_BASE + 0x4D4)
80
81#define VCAP_VP_CTRL (VCAP_BASE + 0x4D8)
82
83#define VCAP_VP_T1_Y_BASE_ADDR (VCAP_BASE + 0x4A8)
84#define VCAP_VP_T1_C_BASE_ADDR (VCAP_BASE + 0x4Ac)
85#define VCAP_VP_NR_T2_Y_BASE_ADDR (VCAP_BASE + 0x4B4)
86#define VCAP_VP_NR_T2_C_BASE_ADDR (VCAP_BASE + 0x4B8)
87
88#define VP_PIC_DONE (0x1 << 0)
Terence Hampsonad33c512012-07-16 17:50:00 -0400[diff] [blame]89#define VP_MODE_CHANGE (0x1 << 8)
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]90
Terence Hampson3dff4ef2012-06-13 15:20:59 -0400[diff] [blame]91#define VP_NR_MAX_WINDOW 120
92#define VP_NR_MAX_RATIO 16
Terence Hampson6a744e32012-12-07 15:50:32 -0500[diff] [blame]93#define VP_NR_DYNAMIC_THRESHOLD 0x000F0000
Terence Hampson3dff4ef2012-06-13 15:20:59 -0400[diff] [blame]94
95#define BITS_MASK(start, num_of_bits) \
96 (((1 << (num_of_bits)) - 1) << (start))
97
98#define BITS_VALUE(x, start, num_of_bits) \
99 (((x) & BITS_MASK(start, num_of_bits)) >> (start))
100
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]101irqreturn_t vp_handler(struct vcap_dev *dev);
102int config_vp_format(struct vcap_client_data *c_data);
103void vp_stop_capture(struct vcap_client_data *c_data);
104int init_motion_buf(struct vcap_client_data *c_data);
105void deinit_motion_buf(struct vcap_client_data *c_data);
106int init_nr_buf(struct vcap_client_data *c_data);
107void deinit_nr_buf(struct vcap_client_data *c_data);
Terence Hampson3dff4ef2012-06-13 15:20:59 -0400[diff] [blame]108int nr_s_param(struct vcap_client_data *c_data, struct nr_param *param);
109void nr_g_param(struct vcap_client_data *c_data, struct nr_param *param);
110void s_default_nr_val(struct nr_param *param);
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]111int kickoff_vp(struct vcap_client_data *c_data);
112int continue_vp(struct vcap_client_data *c_data);
Terence Hampson54d3a6d2012-07-10 14:05:35 -0400[diff] [blame]113int vp_dummy_event(struct vcap_client_data *c_data);
Terence Hampsonaeb793e2012-05-11 11:41:16 -0400[diff] [blame]114
115#endif