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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
67 select ZCRYPT_MONOLITHIC if ZCRYPT="y"
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020068 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020069 help
70 Select this option if you want to use a PCI-attached cryptographic
71 adapter like:
72 + PCI Cryptographic Accelerator (PCICA)
73 + PCI Cryptographic Coprocessor (PCICC)
74 + PCI-X Cryptographic Coprocessor (PCIXCC)
75 + Crypto Express2 Coprocessor (CEX2C)
76 + Crypto Express2 Accelerator (CEX2A)
77
78config ZCRYPT_MONOLITHIC
79 bool "Monolithic zcrypt module"
Heiko Carstens57a49552010-08-13 10:06:40 +020080 depends on ZCRYPT
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020081 help
Pavel Machek4737f092009-06-05 00:44:53 +020082 Select this option if you want to have a single module z90crypt,
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020083 that contains all parts of the crypto device driver (ap bus,
84 request router and all the card drivers).
85
Jan Glauber3f5615e2008-01-26 14:11:07 +010086config CRYPTO_SHA1_S390
87 tristate "SHA1 digest algorithm"
88 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110089 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010090 help
91 This is the s390 hardware accelerated implementation of the
92 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
93
94config CRYPTO_SHA256_S390
95 tristate "SHA256 digest algorithm"
96 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110097 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010098 help
99 This is the s390 hardware accelerated implementation of the
100 SHA256 secure hash standard (DFIPS 180-2).
101
102 This version of SHA implements a 256 bit hash with 128 bits of
103 security against collision attacks.
104
Jan Glauber291dc7c2008-03-06 19:52:00 +0800105config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800106 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800107 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100108 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800109 help
110 This is the s390 hardware accelerated implementation of the
111 SHA512 secure hash standard.
112
113 This version of SHA implements a 512 bit hash with 256 bits of
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800114 security against collision attacks. The code also includes SHA-384,
115 a 384 bit hash with 192 bits of security against collision attacks.
116
Jan Glauber291dc7c2008-03-06 19:52:00 +0800117
Jan Glauber3f5615e2008-01-26 14:11:07 +0100118config CRYPTO_DES_S390
119 tristate "DES and Triple DES cipher algorithms"
120 depends on S390
121 select CRYPTO_ALGAPI
122 select CRYPTO_BLKCIPHER
123 help
124 This us the s390 hardware accelerated implementation of the
125 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
126
127config CRYPTO_AES_S390
128 tristate "AES cipher algorithms"
129 depends on S390
130 select CRYPTO_ALGAPI
131 select CRYPTO_BLKCIPHER
132 help
133 This is the s390 hardware accelerated implementation of the
134 AES cipher algorithms (FIPS-197). AES uses the Rijndael
135 algorithm.
136
137 Rijndael appears to be consistently a very good performer in
138 both hardware and software across a wide range of computing
139 environments regardless of its use in feedback or non-feedback
140 modes. Its key setup time is excellent, and its key agility is
141 good. Rijndael's very low memory requirements make it very well
142 suited for restricted-space environments, in which it also
143 demonstrates excellent performance. Rijndael's operations are
144 among the easiest to defend against power and timing attacks.
145
146 On s390 the System z9-109 currently only supports the key size
147 of 128 bit.
148
149config S390_PRNG
150 tristate "Pseudo random number generator device driver"
151 depends on S390
152 default "m"
153 help
154 Select this option if you want to use the s390 pseudo random number
155 generator. The PRNG is part of the cryptographic processor functions
156 and uses triple-DES to generate secure random numbers like the
157 ANSI X9.17 standard. The PRNG is usable via the char device
158 /dev/prandom.
159
Sebastian Andrzej Siewior85a7f0ac2009-08-10 12:50:03 +1000160config CRYPTO_DEV_MV_CESA
161 tristate "Marvell's Cryptographic Engine"
162 depends on PLAT_ORION
163 select CRYPTO_ALGAPI
164 select CRYPTO_AES
165 select CRYPTO_BLKCIPHER2
166 help
167 This driver allows you to utilize the Cryptographic Engines and
168 Security Accelerator (CESA) which can be found on the Marvell Orion
169 and Kirkwood SoCs, such as QNAP's TS-209.
170
171 Currently the driver supports AES in ECB and CBC mode without DMA.
172
David S. Miller0a625fd2010-05-19 14:14:04 +1000173config CRYPTO_DEV_NIAGARA2
174 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800175 select CRYPTO_DES
David S. Miller0a625fd2010-05-19 14:14:04 +1000176 select CRYPTO_ALGAPI
177 depends on SPARC64
178 help
179 Each core of a Niagara2 processor contains a Stream
180 Processing Unit, which itself contains several cryptographic
181 sub-units. One set provides the Modular Arithmetic Unit,
182 used for SSL offload. The other set provides the Cipher
183 Group, which can perform encryption, decryption, hashing,
184 checksumming, and raw copies.
185
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800186config CRYPTO_DEV_HIFN_795X
187 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800188 select CRYPTO_DES
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800189 select CRYPTO_ALGAPI
Herbert Xu653ebd92007-11-27 19:48:27 +0800190 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100191 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800192 depends on PCI
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800193 help
194 This option allows you to have support for HIFN 795x crypto adapters.
195
Herbert Xu946fef42008-01-26 09:48:44 +1100196config CRYPTO_DEV_HIFN_795X_RNG
197 bool "HIFN 795x random number generator"
198 depends on CRYPTO_DEV_HIFN_795X
199 help
200 Select this option if you want to enable the random number generator
201 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800202
Kim Phillips9c4a7962008-06-23 19:50:15 +0800203config CRYPTO_DEV_TALITOS
204 tristate "Talitos Freescale Security Engine (SEC)"
205 select CRYPTO_ALGAPI
206 select CRYPTO_AUTHENC
207 select HW_RANDOM
208 depends on FSL_SOC
209 help
210 Say 'Y' here to use the Freescale Security Engine (SEC)
211 to offload cryptographic algorithm computation.
212
213 The Freescale SEC is present on PowerQUICC 'E' processors, such
214 as the MPC8349E and MPC8548E.
215
216 To compile this driver as a module, choose M here: the module
217 will be called talitos.
218
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800219config CRYPTO_DEV_IXP4XX
220 tristate "Driver for IXP4xx crypto hardware acceleration"
221 depends on ARCH_IXP4XX
222 select CRYPTO_DES
223 select CRYPTO_ALGAPI
Imre Kaloz090657e2008-07-13 20:12:11 +0800224 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800225 select CRYPTO_BLKCIPHER
226 help
227 Driver for the IXP4xx NPE crypto engine.
228
James Hsiao049359d2009-02-05 16:18:13 +1100229config CRYPTO_DEV_PPC4XX
230 tristate "Driver AMCC PPC4xx crypto accelerator"
231 depends on PPC && 4xx
232 select CRYPTO_HASH
233 select CRYPTO_ALGAPI
234 select CRYPTO_BLKCIPHER
235 help
236 This option allows you to have support for AMCC crypto acceleration.
237
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800238config CRYPTO_DEV_OMAP_SHAM
239 tristate "Support for OMAP SHA1/MD5 hw accelerator"
240 depends on ARCH_OMAP2 || ARCH_OMAP3
241 select CRYPTO_SHA1
242 select CRYPTO_MD5
243 help
244 OMAP processors have SHA1/MD5 hw accelerator. Select this if you
245 want to use the OMAP module for SHA1/MD5 algorithms.
246
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800247config CRYPTO_DEV_OMAP_AES
248 tristate "Support for OMAP AES hw engine"
249 depends on ARCH_OMAP2 || ARCH_OMAP3
250 select CRYPTO_AES
251 help
252 OMAP processors have AES module accelerator. Select this if you
253 want to use the OMAP module for AES algorithms.
254
Jamie Ilesce921362011-02-21 16:43:21 +1100255config CRYPTO_DEV_PICOXCELL
256 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
257 depends on ARCH_PICOXCELL
258 select CRYPTO_AES
259 select CRYPTO_AUTHENC
260 select CRYPTO_ALGAPI
261 select CRYPTO_DES
262 select CRYPTO_CBC
263 select CRYPTO_ECB
264 select CRYPTO_SEQIV
265 help
266 This option enables support for the hardware offload engines in the
267 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
268 and for 3gpp Layer 2 ciphering support.
269
270 Saying m here will build a module named pipcoxcell_crypto.
271
Jan Engelhardtb5114312007-07-15 23:39:36 -0700272endif # CRYPTO_HW