Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 15 | |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/slab.h> |
| 21 | #include <linux/spinlock.h> |
| 22 | #include <linux/platform_device.h> |
| 23 | #include <linux/regulator/driver.h> |
| 24 | #include <mach/rpm.h> |
| 25 | #include <mach/rpm-regulator.h> |
| 26 | |
| 27 | #include "rpm_resources.h" |
| 28 | |
| 29 | /* Debug Definitions */ |
| 30 | |
| 31 | enum { |
| 32 | MSM_RPM_VREG_DEBUG_REQUEST = BIT(0), |
| 33 | MSM_RPM_VREG_DEBUG_VOTE = BIT(1), |
| 34 | MSM_RPM_VREG_DEBUG_DUPLICATE = BIT(2), |
| 35 | MSM_RPM_VREG_DEBUG_IGNORE_VDD_MEM_DIG = BIT(3), |
| 36 | }; |
| 37 | |
| 38 | static int msm_rpm_vreg_debug_mask; |
| 39 | module_param_named( |
| 40 | debug_mask, msm_rpm_vreg_debug_mask, int, S_IRUSR | S_IWUSR |
| 41 | ); |
| 42 | |
| 43 | #define REGULATOR_TYPE_LDO 0 |
| 44 | #define REGULATOR_TYPE_SMPS 1 |
| 45 | #define REGULATOR_TYPE_VS 2 |
| 46 | #define REGULATOR_TYPE_NCP 3 |
| 47 | |
| 48 | #define MICRO_TO_MILLI(uV) ((uV) / 1000) |
| 49 | #define MILLI_TO_MICRO(mV) ((mV) * 1000) |
| 50 | |
| 51 | #define SET_PART(_vreg, _part, _val) \ |
| 52 | _vreg->req[_vreg->part->_part.word].value \ |
| 53 | = (_vreg->req[_vreg->part->_part.word].value \ |
| 54 | & ~vreg->part->_part.mask) \ |
| 55 | | (((_val) << vreg->part->_part.shift) & vreg->part->_part.mask) |
| 56 | |
| 57 | #define GET_PART(_vreg, _part) \ |
| 58 | ((_vreg->req[_vreg->part->_part.word].value & vreg->part->_part.mask) \ |
| 59 | >> vreg->part->_part.shift) |
| 60 | |
| 61 | struct request_member { |
| 62 | int word; |
| 63 | unsigned int mask; |
| 64 | int shift; |
| 65 | }; |
| 66 | |
| 67 | struct rpm_vreg_parts { |
| 68 | struct request_member mV; /* voltage: used if voltage is in mV */ |
| 69 | struct request_member uV; /* voltage: used if voltage is in uV */ |
| 70 | struct request_member ip; /* peak current in mA */ |
| 71 | struct request_member pd; /* pull down enable */ |
| 72 | struct request_member ia; /* average current in mA */ |
| 73 | struct request_member fm; /* force mode */ |
| 74 | struct request_member pm; /* power mode */ |
| 75 | struct request_member pc; /* pin control */ |
| 76 | struct request_member pf; /* pin function */ |
| 77 | struct request_member enable_state; /* NCP and switch */ |
| 78 | struct request_member comp_mode; /* NCP */ |
| 79 | struct request_member freq; /* frequency: NCP and SMPS */ |
| 80 | struct request_member freq_clk_src; /* clock source: SMPS */ |
| 81 | struct request_member hpm; /* switch: control OCP ans SS */ |
| 82 | int request_len; |
| 83 | }; |
| 84 | |
| 85 | #define REQUEST_MEMBER(_word, _mask, _shift) \ |
| 86 | { \ |
| 87 | .word = _word, \ |
| 88 | .mask = _mask, \ |
| 89 | .shift = _shift, \ |
| 90 | } |
| 91 | |
| 92 | struct rpm_vreg_parts ldo_parts = { |
| 93 | .request_len = 2, |
| 94 | .uV = REQUEST_MEMBER(0, 0x007FFFFF, 0), |
| 95 | .pd = REQUEST_MEMBER(0, 0x00800000, 23), |
David Collins | d090389 | 2011-07-14 16:08:30 -0700 | [diff] [blame^] | 96 | .pc = REQUEST_MEMBER(0, 0x0F000000, 24), |
| 97 | .pf = REQUEST_MEMBER(0, 0xF0000000, 28), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 98 | .ip = REQUEST_MEMBER(1, 0x000003FF, 0), |
David Collins | d090389 | 2011-07-14 16:08:30 -0700 | [diff] [blame^] | 99 | .ia = REQUEST_MEMBER(1, 0x000FFC00, 10), |
| 100 | .fm = REQUEST_MEMBER(1, 0x00700000, 20), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 101 | }; |
| 102 | |
| 103 | struct rpm_vreg_parts smps_parts = { |
| 104 | .request_len = 2, |
| 105 | .uV = REQUEST_MEMBER(0, 0x007FFFFF, 0), |
| 106 | .pd = REQUEST_MEMBER(0, 0x00800000, 23), |
David Collins | d090389 | 2011-07-14 16:08:30 -0700 | [diff] [blame^] | 107 | .pc = REQUEST_MEMBER(0, 0x0F000000, 24), |
| 108 | .pf = REQUEST_MEMBER(0, 0xF0000000, 28), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 109 | .ip = REQUEST_MEMBER(1, 0x000003FF, 0), |
David Collins | d090389 | 2011-07-14 16:08:30 -0700 | [diff] [blame^] | 110 | .ia = REQUEST_MEMBER(1, 0x000FFC00, 10), |
| 111 | .fm = REQUEST_MEMBER(1, 0x00700000, 20), |
| 112 | .pm = REQUEST_MEMBER(1, 0x00800000, 23), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 113 | .freq = REQUEST_MEMBER(1, 0x1F000000, 24), |
| 114 | .freq_clk_src = REQUEST_MEMBER(1, 0x60000000, 29), |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | struct rpm_vreg_parts switch_parts = { |
| 118 | .request_len = 1, |
| 119 | .enable_state = REQUEST_MEMBER(0, 0x00000001, 0), |
| 120 | .pd = REQUEST_MEMBER(0, 0x00000002, 1), |
| 121 | .pc = REQUEST_MEMBER(0, 0x0000003C, 2), |
| 122 | .pf = REQUEST_MEMBER(0, 0x000003C0, 6), |
| 123 | .hpm = REQUEST_MEMBER(0, 0x00000C00, 10), |
| 124 | }; |
| 125 | |
| 126 | struct rpm_vreg_parts ncp_parts = { |
| 127 | .request_len = 1, |
| 128 | .uV = REQUEST_MEMBER(0, 0x007FFFFF, 0), |
| 129 | .enable_state = REQUEST_MEMBER(0, 0x00800000, 23), |
| 130 | .comp_mode = REQUEST_MEMBER(0, 0x01000000, 24), |
| 131 | .freq = REQUEST_MEMBER(0, 0x3E000000, 25), |
| 132 | }; |
| 133 | |
| 134 | struct vreg_range { |
| 135 | int min_uV; |
| 136 | int max_uV; |
| 137 | int step_uV; |
| 138 | unsigned n_voltages; |
| 139 | }; |
| 140 | |
| 141 | struct vreg_set_points { |
| 142 | struct vreg_range *range; |
| 143 | int count; |
| 144 | unsigned n_voltages; |
| 145 | }; |
| 146 | |
| 147 | #define VOLTAGE_RANGE(_min_uV, _max_uV, _step_uV) \ |
| 148 | { \ |
| 149 | .min_uV = _min_uV, \ |
| 150 | .max_uV = _max_uV, \ |
| 151 | .step_uV = _step_uV, \ |
| 152 | } |
| 153 | |
| 154 | static struct vreg_range pldo_ranges[] = { |
| 155 | VOLTAGE_RANGE( 750000, 1487500, 12500), |
| 156 | VOLTAGE_RANGE(1500000, 3075000, 25000), |
| 157 | VOLTAGE_RANGE(3100000, 4900000, 50000), |
| 158 | }; |
| 159 | |
| 160 | static struct vreg_range nldo_ranges[] = { |
| 161 | VOLTAGE_RANGE( 750000, 1537500, 12500), |
| 162 | }; |
| 163 | |
| 164 | static struct vreg_range nldo1200_ranges[] = { |
| 165 | VOLTAGE_RANGE( 375000, 743750, 6250), |
| 166 | VOLTAGE_RANGE( 750000, 1537500, 12500), |
| 167 | }; |
| 168 | |
| 169 | static struct vreg_range smps_ranges[] = { |
| 170 | VOLTAGE_RANGE( 375000, 737500, 12500), |
| 171 | VOLTAGE_RANGE( 750000, 1487500, 12500), |
| 172 | VOLTAGE_RANGE(1500000, 3075000, 25000), |
| 173 | }; |
| 174 | |
| 175 | static struct vreg_range ftsmps_ranges[] = { |
| 176 | VOLTAGE_RANGE( 350000, 650000, 50000), |
| 177 | VOLTAGE_RANGE( 700000, 1400000, 12500), |
| 178 | VOLTAGE_RANGE(1500000, 3300000, 50000), |
| 179 | }; |
| 180 | |
| 181 | static struct vreg_range ncp_ranges[] = { |
| 182 | VOLTAGE_RANGE(1500000, 3050000, 50000), |
| 183 | }; |
| 184 | |
| 185 | #define SET_POINTS(_ranges) \ |
| 186 | { \ |
| 187 | .range = _ranges, \ |
| 188 | .count = ARRAY_SIZE(_ranges), \ |
| 189 | }; |
| 190 | |
| 191 | static struct vreg_set_points pldo_set_points = SET_POINTS(pldo_ranges); |
| 192 | static struct vreg_set_points nldo_set_points = SET_POINTS(nldo_ranges); |
| 193 | static struct vreg_set_points nldo1200_set_points = SET_POINTS(nldo1200_ranges); |
| 194 | static struct vreg_set_points smps_set_points = SET_POINTS(smps_ranges); |
| 195 | static struct vreg_set_points ftsmps_set_points = SET_POINTS(ftsmps_ranges); |
| 196 | static struct vreg_set_points ncp_set_points = SET_POINTS(ncp_ranges); |
| 197 | |
| 198 | /* |
| 199 | * This is used when voting for LPM or HPM by subtracting or adding to the |
| 200 | * hpm_min_load of a regulator. It has units of uA. |
| 201 | */ |
| 202 | #define LOAD_THRESHOLD_STEP 1000 |
| 203 | |
| 204 | /* This is the maximum uA load that can be passed to the RPM. */ |
| 205 | #define MAX_POSSIBLE_LOAD (MILLI_TO_MICRO(0xFFF)) |
| 206 | |
| 207 | struct vreg { |
| 208 | struct msm_rpm_iv_pair req[2]; |
| 209 | struct msm_rpm_iv_pair prev_active_req[2]; |
| 210 | struct msm_rpm_iv_pair prev_sleep_req[2]; |
| 211 | struct rpm_regulator_init_data pdata; |
| 212 | struct regulator_dev *rdev; |
| 213 | struct regulator_dev *rdev_pc; |
| 214 | const char *name; |
| 215 | struct vreg_set_points *set_points; |
| 216 | struct rpm_vreg_parts *part; |
| 217 | int type; |
| 218 | enum rpm_vreg_id id; |
| 219 | struct mutex pc_lock; |
| 220 | int save_uV; |
| 221 | int mode; |
| 222 | bool is_enabled; |
| 223 | bool is_enabled_pc; |
| 224 | const int hpm_min_load; |
| 225 | int active_min_uV_vote[RPM_VREG_VOTER_COUNT]; |
| 226 | int sleep_min_uV_vote[RPM_VREG_VOTER_COUNT]; |
| 227 | |
| 228 | }; |
| 229 | |
| 230 | #define LDO(_id, _ranges, _hpm_min_load) \ |
| 231 | [RPM_VREG_ID_PM8921_##_id] = { \ |
| 232 | .req = { \ |
| 233 | [0] = { .id = MSM_RPM_ID_PM8921_##_id##_0, }, \ |
| 234 | [1] = { .id = MSM_RPM_ID_PM8921_##_id##_1, }, \ |
| 235 | }, \ |
| 236 | .hpm_min_load = RPM_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \ |
| 237 | .type = REGULATOR_TYPE_LDO, \ |
| 238 | .set_points = &_ranges##_set_points, \ |
| 239 | .part = &ldo_parts, \ |
| 240 | .id = RPM_VREG_ID_PM8921_##_id, \ |
| 241 | } |
| 242 | |
| 243 | #define SMPS(_id, _ranges, _hpm_min_load) \ |
| 244 | [RPM_VREG_ID_PM8921_##_id] = { \ |
| 245 | .req = { \ |
| 246 | [0] = { .id = MSM_RPM_ID_PM8921_##_id##_0, }, \ |
| 247 | [1] = { .id = MSM_RPM_ID_PM8921_##_id##_1, }, \ |
| 248 | }, \ |
| 249 | .hpm_min_load = RPM_VREG_##_hpm_min_load##_HPM_MIN_LOAD, \ |
| 250 | .type = REGULATOR_TYPE_SMPS, \ |
| 251 | .set_points = &_ranges##_set_points, \ |
| 252 | .part = &smps_parts, \ |
| 253 | .id = RPM_VREG_ID_PM8921_##_id, \ |
| 254 | } |
| 255 | |
| 256 | #define LVS(_id) \ |
| 257 | [RPM_VREG_ID_PM8921_##_id] = { \ |
| 258 | .req = { \ |
| 259 | [0] = { .id = MSM_RPM_ID_PM8921_##_id, }, \ |
| 260 | [1] = { .id = -1, }, \ |
| 261 | }, \ |
| 262 | .type = REGULATOR_TYPE_VS, \ |
| 263 | .part = &switch_parts, \ |
| 264 | .id = RPM_VREG_ID_PM8921_##_id, \ |
| 265 | } |
| 266 | |
| 267 | #define MVS(_vreg_id, _rpm_id) \ |
| 268 | [RPM_VREG_ID_PM8921_##_vreg_id] = { \ |
| 269 | .req = { \ |
| 270 | [0] = { .id = MSM_RPM_ID_##_rpm_id, }, \ |
| 271 | [1] = { .id = -1, }, \ |
| 272 | }, \ |
| 273 | .type = REGULATOR_TYPE_VS, \ |
| 274 | .part = &switch_parts, \ |
| 275 | .id = RPM_VREG_ID_PM8921_##_vreg_id, \ |
| 276 | } |
| 277 | |
| 278 | #define NCP(_id) \ |
| 279 | [RPM_VREG_ID_PM8921_##_id] = { \ |
| 280 | .req = { \ |
| 281 | [0] = { .id = MSM_RPM_ID_##_id##_0, }, \ |
| 282 | [1] = { .id = MSM_RPM_ID_##_id##_1, }, \ |
| 283 | }, \ |
| 284 | .type = REGULATOR_TYPE_NCP, \ |
| 285 | .set_points = &ncp_set_points, \ |
| 286 | .part = &ncp_parts, \ |
| 287 | .id = RPM_VREG_ID_PM8921_##_id, \ |
| 288 | } |
| 289 | |
| 290 | static struct vreg vregs[] = { |
| 291 | LDO(L1, nldo, LDO_150), |
| 292 | LDO(L2, nldo, LDO_150), |
| 293 | LDO(L3 , pldo, LDO_150), |
| 294 | LDO(L4, pldo, LDO_50), |
| 295 | LDO(L5, pldo, LDO_300), |
| 296 | LDO(L6, pldo, LDO_600), |
| 297 | LDO(L7, pldo, LDO_150), |
| 298 | LDO(L8, pldo, LDO_300), |
| 299 | LDO(L9, pldo, LDO_300), |
| 300 | LDO(L10, pldo, LDO_600), |
| 301 | LDO(L11, pldo, LDO_150), |
| 302 | LDO(L12, nldo, LDO_150), |
| 303 | LDO(L14, pldo, LDO_50), |
| 304 | LDO(L15, pldo, LDO_150), |
| 305 | LDO(L16, pldo, LDO_300), |
| 306 | LDO(L17, pldo, LDO_150), |
| 307 | LDO(L18, nldo, LDO_150), |
| 308 | LDO(L21, pldo, LDO_150), |
| 309 | LDO(L22, pldo, LDO_150), |
| 310 | LDO(L23, pldo, LDO_150), |
| 311 | LDO(L24, nldo1200, LDO_1200), |
| 312 | LDO(L25, nldo1200, LDO_1200), |
| 313 | LDO(L26, nldo1200, LDO_1200), |
| 314 | LDO(L27, nldo1200, LDO_1200), |
| 315 | LDO(L28, nldo1200, LDO_1200), |
| 316 | LDO(L29, pldo, LDO_150), |
| 317 | |
| 318 | SMPS(S1, smps, SMPS_1500), |
| 319 | SMPS(S2, smps, SMPS_1500), |
| 320 | SMPS(S3, smps, SMPS_1500), |
| 321 | SMPS(S4, smps, SMPS_1500), |
| 322 | SMPS(S5, ftsmps, SMPS_2000), |
| 323 | SMPS(S6, ftsmps, SMPS_2000), |
| 324 | SMPS(S7, smps, SMPS_1500), |
| 325 | SMPS(S8, smps, SMPS_1500), |
| 326 | |
| 327 | LVS(LVS1), |
| 328 | LVS(LVS2), |
| 329 | LVS(LVS3), |
| 330 | LVS(LVS4), |
| 331 | LVS(LVS5), |
| 332 | LVS(LVS6), |
| 333 | LVS(LVS7), |
| 334 | MVS(USB_OTG, USB_OTG_SWITCH), |
| 335 | MVS(HDMI_MVS, HDMI_SWITCH), |
| 336 | |
| 337 | NCP(NCP), |
| 338 | }; |
| 339 | |
| 340 | #define vreg_err(vreg, fmt, ...) \ |
| 341 | pr_err("%s: " fmt, vreg->name, ##__VA_ARGS__) |
| 342 | |
| 343 | #define VREG_ID_IS_VDD_MEM_OR_DIG(id) \ |
| 344 | ((id == RPM_VREG_ID_PM8921_L24) || (id == RPM_VREG_ID_PM8921_S3)) |
| 345 | |
| 346 | const char *pin_func_label[] = { |
| 347 | [RPM_VREG_PIN_FN_DONT_CARE] = "don't care", |
| 348 | [RPM_VREG_PIN_FN_ENABLE] = "on/off", |
| 349 | [RPM_VREG_PIN_FN_MODE] = "HPM/LPM", |
| 350 | [RPM_VREG_PIN_FN_SLEEP_B] = "sleep_b", |
| 351 | [RPM_VREG_PIN_FN_NONE] = "none", |
| 352 | }; |
| 353 | |
| 354 | const char *force_mode_label[] = { |
| 355 | [RPM_VREG_FORCE_MODE_NONE] = "none", |
| 356 | [RPM_VREG_FORCE_MODE_LPM] = "LPM", |
| 357 | [RPM_VREG_FORCE_MODE_AUTO] = "auto", |
| 358 | [RPM_VREG_FORCE_MODE_HPM] = "HPM", |
| 359 | [RPM_VREG_FORCE_MODE_BYPASS] = "BYP", |
| 360 | }; |
| 361 | |
| 362 | const char *power_mode_label[] = { |
| 363 | [RPM_VREG_POWER_MODE_HYSTERETIC] = "HYS", |
| 364 | [RPM_VREG_POWER_MODE_PWM] = "PWM", |
| 365 | }; |
| 366 | |
| 367 | static void rpm_regulator_req(struct vreg *vreg, int set) |
| 368 | { |
| 369 | int uV, ip, fm, pm, pc, pf, pd, ia, freq, clk, state, hpm, comp_mode; |
| 370 | const char *pf_label = "", *fm_label = "", *pc_total = ""; |
| 371 | const char *pc_en0 = "", *pc_en1 = "", *pc_en2 = "", *pc_en3 = ""; |
| 372 | const char *pm_label = ""; |
| 373 | |
| 374 | /* Suppress VDD_MEM and VDD_DIG printing. */ |
| 375 | if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_VDD_MEM_DIG) |
| 376 | && VREG_ID_IS_VDD_MEM_OR_DIG(vreg->id)) |
| 377 | return; |
| 378 | |
| 379 | if (vreg->part->uV.mask) |
| 380 | uV = GET_PART(vreg, uV); |
| 381 | else |
| 382 | uV = MILLI_TO_MICRO(GET_PART(vreg, mV)); |
| 383 | |
| 384 | ip = GET_PART(vreg, ip); |
| 385 | fm = GET_PART(vreg, fm); |
| 386 | pm = GET_PART(vreg, pm); |
| 387 | pc = GET_PART(vreg, pc); |
| 388 | pf = GET_PART(vreg, pf); |
| 389 | pd = GET_PART(vreg, pd); |
| 390 | ia = GET_PART(vreg, ia); |
| 391 | freq = GET_PART(vreg, freq); |
| 392 | clk = GET_PART(vreg, freq_clk_src); |
| 393 | state = GET_PART(vreg, enable_state); |
| 394 | hpm = GET_PART(vreg, hpm); |
| 395 | comp_mode = GET_PART(vreg, comp_mode); |
| 396 | |
| 397 | if (pf >= 0 && pf < ARRAY_SIZE(pin_func_label)) |
| 398 | pf_label = pin_func_label[pf]; |
| 399 | |
| 400 | if (fm >= 0 && fm < ARRAY_SIZE(force_mode_label)) |
| 401 | fm_label = force_mode_label[fm]; |
| 402 | |
| 403 | if (pm >= 0 && pm < ARRAY_SIZE(power_mode_label)) |
| 404 | pm_label = power_mode_label[pm]; |
| 405 | |
| 406 | if (pc & RPM_VREG_PIN_CTRL_EN0) |
| 407 | pc_en0 = " D1"; |
| 408 | if (pc & RPM_VREG_PIN_CTRL_EN1) |
| 409 | pc_en1 = " A0"; |
| 410 | if (pc & RPM_VREG_PIN_CTRL_EN2) |
| 411 | pc_en2 = " A1"; |
| 412 | if (pc & RPM_VREG_PIN_CTRL_EN3) |
| 413 | pc_en3 = " A2"; |
| 414 | if (pc == RPM_VREG_PIN_CTRL_NONE) |
| 415 | pc_total = " none"; |
| 416 | |
| 417 | switch (vreg->type) { |
| 418 | case REGULATOR_TYPE_LDO: |
| 419 | pr_info("%s %-9s: s=%c, v=%7d uV, ip=%4d mA, fm=%s (%d), " |
| 420 | "pc=%s%s%s%s%s (%d), pf=%s (%d), pd=%s (%d), " |
| 421 | "ia=%4d mA; req[0]={%d, 0x%08X}, req[1]={%d, 0x%08X}\n", |
| 422 | (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"), |
| 423 | vreg->name, |
| 424 | (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), uV, ip, |
| 425 | fm_label, fm, pc_en0, pc_en1, pc_en2, pc_en3, pc_total, |
| 426 | pc, pf_label, pf, (pd == 1 ? "Y" : "N"), pd, ia, |
| 427 | vreg->req[0].id, vreg->req[0].value, |
| 428 | vreg->req[1].id, vreg->req[1].value); |
| 429 | break; |
| 430 | case REGULATOR_TYPE_SMPS: |
| 431 | pr_info("%s %-9s: s=%c, v=%7d uV, ip=%4d mA, fm=%s (%d), " |
| 432 | "pc=%s%s%s%s%s (%d), pf=%s (%d), pd=%s (%d), " |
| 433 | "ia=%4d mA, freq=%2d, pm=%s (%d), clk_src=%d; " |
| 434 | "req[0]={%d, 0x%08X}, req[1]={%d, 0x%08X}\n", |
| 435 | (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"), |
| 436 | vreg->name, |
| 437 | (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), uV, ip, |
| 438 | fm_label, fm, pc_en0, pc_en1, pc_en2, pc_en3, pc_total, |
| 439 | pc, pf_label, pf, (pd == 1 ? "Y" : "N"), pd, ia, freq, |
| 440 | pm_label, pm, clk, vreg->req[0].id, vreg->req[0].value, |
| 441 | vreg->req[1].id, vreg->req[1].value); |
| 442 | break; |
| 443 | case REGULATOR_TYPE_VS: |
| 444 | pr_info("%s %-9s: s=%c, state=%s (%d), pd=%s (%d), " |
| 445 | "pc =%s%s%s%s%s (%d), pf=%s (%d), hpm=%d; " |
| 446 | "req[0]={%d, 0x%08X}\n", |
| 447 | (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"), |
| 448 | vreg->name, (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), |
| 449 | (state == 1 ? "on" : "off"), state, |
| 450 | (pd == 1 ? "Y" : "N"), pd, pc_en0, pc_en1, pc_en2, |
| 451 | pc_en3, pc_total, pc, pf_label, pf, hpm, |
| 452 | vreg->req[0].id, vreg->req[0].value); |
| 453 | break; |
| 454 | case REGULATOR_TYPE_NCP: |
| 455 | pr_info("%s %-9s: s=%c, v=-%7d uV, state=%s (%d), freq=%2d, " |
| 456 | "comp=%d; req[0]={%d, 0x%08X}\n", |
| 457 | (set == MSM_RPM_CTX_SET_0 ? "sending " : "buffered"), |
| 458 | vreg->name, (set == MSM_RPM_CTX_SET_0 ? 'A' : 'S'), |
| 459 | uV, (state == 1 ? "on" : "off"), state, freq, comp_mode, |
| 460 | vreg->req[0].id, vreg->req[0].value); |
| 461 | break; |
| 462 | } |
| 463 | } |
| 464 | |
| 465 | static void rpm_regulator_vote(struct vreg *vreg, enum rpm_vreg_voter voter, |
| 466 | int set, int voter_uV, int aggregate_uV) |
| 467 | { |
| 468 | /* Suppress VDD_MEM and VDD_DIG printing. */ |
| 469 | if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_VDD_MEM_DIG) |
| 470 | && VREG_ID_IS_VDD_MEM_OR_DIG(vreg->id)) |
| 471 | return; |
| 472 | |
| 473 | pr_info("vote received %-9s: voter=%d, set=%c, v_voter=%7d uV, " |
| 474 | "v_aggregate=%7d uV\n", vreg->name, voter, |
| 475 | (set == 0 ? 'A' : 'S'), voter_uV, aggregate_uV); |
| 476 | } |
| 477 | |
| 478 | static void rpm_regulator_duplicate(struct vreg *vreg, int set, int cnt) |
| 479 | { |
| 480 | /* Suppress VDD_MEM and VDD_DIG printing. */ |
| 481 | if ((msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_IGNORE_VDD_MEM_DIG) |
| 482 | && VREG_ID_IS_VDD_MEM_OR_DIG(vreg->id)) |
| 483 | return; |
| 484 | |
| 485 | if (cnt == 2) |
| 486 | pr_info("ignored request %-9s: set=%c; req[0]={%d, 0x%08X}, " |
| 487 | "req[1]={%d, 0x%08X}\n", vreg->name, |
| 488 | (set == 0 ? 'A' : 'S'), |
| 489 | vreg->req[0].id, vreg->req[0].value, |
| 490 | vreg->req[1].id, vreg->req[1].value); |
| 491 | else if (cnt == 1) |
| 492 | pr_info("ignored request %-9s: set=%c; req[0]={%d, 0x%08X}\n", |
| 493 | vreg->name, (set == 0 ? 'A' : 'S'), |
| 494 | vreg->req[0].id, vreg->req[0].value); |
| 495 | } |
| 496 | |
| 497 | /* Spin lock needed for sleep-selectable regulators. */ |
| 498 | static DEFINE_SPINLOCK(pm8921_noirq_lock); |
| 499 | |
| 500 | static int voltage_from_req(struct vreg *vreg) |
| 501 | { |
| 502 | int uV = 0; |
| 503 | |
| 504 | if (vreg->part->uV.mask) |
| 505 | uV = GET_PART(vreg, uV); |
| 506 | else |
| 507 | uV = MILLI_TO_MICRO(GET_PART(vreg, mV)); |
| 508 | |
| 509 | return uV; |
| 510 | } |
| 511 | |
| 512 | static void voltage_to_req(int uV, struct vreg *vreg) |
| 513 | { |
| 514 | if (vreg->part->uV.mask) |
| 515 | SET_PART(vreg, uV, uV); |
| 516 | else |
| 517 | SET_PART(vreg, mV, MICRO_TO_MILLI(uV)); |
| 518 | } |
| 519 | |
| 520 | static int vreg_send_request(struct vreg *vreg, enum rpm_vreg_voter voter, |
| 521 | int set, unsigned mask0, unsigned val0, |
| 522 | unsigned mask1, unsigned val1, unsigned cnt, |
| 523 | int update_voltage) |
| 524 | { |
| 525 | struct msm_rpm_iv_pair *prev_req; |
| 526 | int rc = 0, max_uV_vote = 0; |
| 527 | unsigned prev0, prev1; |
| 528 | int *min_uV_vote; |
| 529 | int i; |
| 530 | |
| 531 | if (set == MSM_RPM_CTX_SET_0) { |
| 532 | min_uV_vote = vreg->active_min_uV_vote; |
| 533 | prev_req = vreg->prev_active_req; |
| 534 | } else { |
| 535 | min_uV_vote = vreg->sleep_min_uV_vote; |
| 536 | prev_req = vreg->prev_sleep_req; |
| 537 | } |
| 538 | |
| 539 | prev0 = vreg->req[0].value; |
| 540 | vreg->req[0].value &= ~mask0; |
| 541 | vreg->req[0].value |= val0 & mask0; |
| 542 | |
| 543 | prev1 = vreg->req[1].value; |
| 544 | vreg->req[1].value &= ~mask1; |
| 545 | vreg->req[1].value |= val1 & mask1; |
| 546 | |
| 547 | if (update_voltage) |
| 548 | min_uV_vote[voter] = voltage_from_req(vreg); |
| 549 | |
| 550 | /* Find the highest voltage voted for and use it. */ |
| 551 | for (i = 0; i < RPM_VREG_VOTER_COUNT; i++) |
| 552 | max_uV_vote = max(max_uV_vote, min_uV_vote[i]); |
| 553 | voltage_to_req(max_uV_vote, vreg); |
| 554 | |
| 555 | if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_VOTE) |
| 556 | rpm_regulator_vote(vreg, voter, set, min_uV_vote[voter], |
| 557 | max_uV_vote); |
| 558 | |
| 559 | /* Ignore duplicate requests */ |
| 560 | if (vreg->req[0].value != prev_req[0].value || |
| 561 | vreg->req[1].value != prev_req[1].value) { |
| 562 | rc = msm_rpmrs_set_noirq(set, vreg->req, cnt); |
| 563 | if (rc) { |
| 564 | vreg->req[0].value = prev0; |
| 565 | vreg->req[1].value = prev1; |
| 566 | |
| 567 | vreg_err(vreg, "msm_rpmrs_set_noirq failed - " |
| 568 | "set=%s, id=%d, rc=%d\n", |
| 569 | (set == MSM_RPM_CTX_SET_0 ? "active" : "sleep"), |
| 570 | vreg->req[0].id, rc); |
| 571 | } else { |
| 572 | /* Only save if nonzero and active set. */ |
| 573 | if (max_uV_vote && (set == MSM_RPM_CTX_SET_0)) |
| 574 | vreg->save_uV = max_uV_vote; |
| 575 | if (msm_rpm_vreg_debug_mask |
| 576 | & MSM_RPM_VREG_DEBUG_REQUEST) |
| 577 | rpm_regulator_req(vreg, set); |
| 578 | prev_req[0].value = vreg->req[0].value; |
| 579 | prev_req[1].value = vreg->req[1].value; |
| 580 | } |
| 581 | } else if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_DUPLICATE) { |
| 582 | rpm_regulator_duplicate(vreg, set, cnt); |
| 583 | } |
| 584 | |
| 585 | return rc; |
| 586 | } |
| 587 | |
| 588 | static int vreg_set_noirq(struct vreg *vreg, enum rpm_vreg_voter voter, |
| 589 | int sleep, unsigned mask0, unsigned val0, |
| 590 | unsigned mask1, unsigned val1, unsigned cnt, |
| 591 | int update_voltage) |
| 592 | { |
| 593 | unsigned int s_mask[2] = {mask0, mask1}, s_val[2] = {val0, val1}; |
| 594 | unsigned long flags; |
| 595 | int rc; |
| 596 | |
| 597 | if (voter < 0 || voter >= RPM_VREG_VOTER_COUNT) |
| 598 | return -EINVAL; |
| 599 | |
| 600 | spin_lock_irqsave(&pm8921_noirq_lock, flags); |
| 601 | |
| 602 | /* |
| 603 | * Send sleep set request first so that subsequent set_mode, etc calls |
| 604 | * use the voltage from the active set. |
| 605 | */ |
| 606 | if (sleep) |
| 607 | rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_SLEEP, |
| 608 | mask0, val0, mask1, val1, cnt, update_voltage); |
| 609 | else { |
| 610 | /* |
| 611 | * Vote for 0 V in the sleep set when active set-only is |
| 612 | * specified. This ensures that a disable vote will be issued |
| 613 | * at some point for the sleep set of the regulator. |
| 614 | */ |
| 615 | if (vreg->part->uV.mask) { |
| 616 | s_val[vreg->part->uV.word] = 0 << vreg->part->uV.shift; |
| 617 | s_mask[vreg->part->uV.word] = vreg->part->uV.mask; |
| 618 | } else { |
| 619 | s_val[vreg->part->mV.word] = 0 << vreg->part->mV.shift; |
| 620 | s_mask[vreg->part->mV.word] = vreg->part->mV.mask; |
| 621 | } |
| 622 | |
| 623 | rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_SLEEP, |
| 624 | s_mask[0], s_val[0], s_mask[1], s_val[1], |
| 625 | cnt, update_voltage); |
| 626 | } |
| 627 | |
| 628 | rc = vreg_send_request(vreg, voter, MSM_RPM_CTX_SET_0, mask0, val0, |
| 629 | mask1, val1, cnt, update_voltage); |
| 630 | |
| 631 | spin_unlock_irqrestore(&pm8921_noirq_lock, flags); |
| 632 | |
| 633 | return rc; |
| 634 | } |
| 635 | |
| 636 | /** |
| 637 | * rpm_vreg_set_voltage - vote for a min_uV value of specified regualtor |
| 638 | * @vreg: ID for regulator |
| 639 | * @voter: ID for the voter |
| 640 | * @min_uV: minimum acceptable voltage (in uV) that is voted for |
| 641 | * @max_uV: maximum acceptable voltage (in uV) that is voted for |
| 642 | * @sleep_also: 0 for active set only, non-0 for active set and sleep set |
| 643 | * |
| 644 | * Returns 0 on success or errno. |
| 645 | * |
| 646 | * This function is used to vote for the voltage of a regulator without |
| 647 | * using the regulator framework. It is needed by consumers which hold spin |
| 648 | * locks or have interrupts disabled because the regulator framework can sleep. |
| 649 | * It is also needed by consumers which wish to only vote for active set |
| 650 | * regulator voltage. |
| 651 | * |
| 652 | * If sleep_also == 0, then a sleep-set value of 0V will be voted for. |
| 653 | * |
| 654 | * This function may only be called for regulators which have the sleep flag |
| 655 | * specified in their private data. |
| 656 | */ |
| 657 | int rpm_vreg_set_voltage(enum rpm_vreg_id vreg_id, enum rpm_vreg_voter voter, |
| 658 | int min_uV, int max_uV, int sleep_also) |
| 659 | { |
| 660 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 661 | struct vreg_range *range; |
| 662 | struct vreg *vreg; |
| 663 | int uV = min_uV; |
| 664 | int lim_min_uV, lim_max_uV, i, rc; |
| 665 | |
| 666 | /* |
| 667 | * TODO: make this function a no-op so that it can be called by |
| 668 | * consumers before RPM capabilities are present. (needed for |
| 669 | * acpuclock driver) |
| 670 | */ |
| 671 | return 0; |
| 672 | |
| 673 | if (vreg_id < 0 || vreg_id > RPM_VREG_ID_PM8921_MAX_REAL) { |
| 674 | pr_err("invalid regulator id=%d\n", vreg_id); |
| 675 | return -EINVAL; |
| 676 | } |
| 677 | vreg = &vregs[vreg_id]; |
| 678 | range = &vreg->set_points->range[0]; |
| 679 | |
| 680 | if (!vreg->pdata.sleep_selectable) { |
| 681 | vreg_err(vreg, "regulator is not marked sleep selectable\n"); |
| 682 | return -EINVAL; |
| 683 | } |
| 684 | |
| 685 | /* |
| 686 | * Check if request voltage is outside of allowed range. The regulator |
| 687 | * core has already checked that constraint range is inside of the |
| 688 | * physically allowed range. |
| 689 | */ |
| 690 | lim_min_uV = vreg->pdata.init_data.constraints.min_uV; |
| 691 | lim_max_uV = vreg->pdata.init_data.constraints.max_uV; |
| 692 | |
| 693 | if (uV < lim_min_uV && max_uV >= lim_min_uV) |
| 694 | uV = lim_min_uV; |
| 695 | |
| 696 | if (uV < lim_min_uV || uV > lim_max_uV) { |
| 697 | vreg_err(vreg, |
| 698 | "request v=[%d, %d] is outside allowed v=[%d, %d]\n", |
| 699 | min_uV, max_uV, lim_min_uV, lim_max_uV); |
| 700 | return -EINVAL; |
| 701 | } |
| 702 | |
| 703 | /* Find the range which uV is inside of. */ |
| 704 | for (i = vreg->set_points->count - 1; i > 0; i++) { |
| 705 | if (uV > vreg->set_points->range[i - 1].max_uV) { |
| 706 | range = &vreg->set_points->range[i]; |
| 707 | break; |
| 708 | } |
| 709 | } |
| 710 | |
| 711 | /* |
| 712 | * Force uV to be an allowed set point and apply a ceiling function |
| 713 | * to non-set point values. |
| 714 | */ |
| 715 | uV = (uV - range->min_uV + range->step_uV - 1) / range->step_uV; |
| 716 | uV = uV * range->step_uV + range->min_uV; |
| 717 | |
| 718 | if (vreg->part->uV.mask) { |
| 719 | val[vreg->part->uV.word] = uV << vreg->part->uV.shift; |
| 720 | mask[vreg->part->uV.word] = vreg->part->uV.mask; |
| 721 | } else { |
| 722 | val[vreg->part->mV.word] |
| 723 | = MICRO_TO_MILLI(uV) << vreg->part->mV.shift; |
| 724 | mask[vreg->part->mV.word] = vreg->part->mV.mask; |
| 725 | } |
| 726 | |
| 727 | rc = vreg_set_noirq(vreg, voter, sleep_also, mask[0], val[0], mask[1], |
| 728 | val[1], vreg->part->request_len, 1); |
| 729 | if (rc) |
| 730 | vreg_err(vreg, "vreg_set_noirq failed, rc=%d\n", rc); |
| 731 | |
| 732 | return rc; |
| 733 | } |
| 734 | EXPORT_SYMBOL_GPL(rpm_vreg_set_voltage); |
| 735 | |
| 736 | /** |
| 737 | * rpm_vreg_set_frequency - sets the frequency of a switching regulator |
| 738 | * @vreg: ID for regulator |
| 739 | * @freq: enum corresponding to desired frequency |
| 740 | * |
| 741 | * Returns 0 on success or errno. |
| 742 | */ |
| 743 | int rpm_vreg_set_frequency(enum rpm_vreg_id vreg_id, enum rpm_vreg_freq freq) |
| 744 | { |
| 745 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 746 | struct vreg *vreg; |
| 747 | int rc; |
| 748 | |
| 749 | /* |
| 750 | * TODO: make this function a no-op so that it can be called by |
| 751 | * consumers before RPM capabilities are present. (needed for |
| 752 | * acpuclock driver) |
| 753 | */ |
| 754 | return 0; |
| 755 | |
| 756 | if (vreg_id < 0 || vreg_id > RPM_VREG_ID_PM8921_MAX_REAL) { |
| 757 | pr_err("invalid regulator id=%d\n", vreg_id); |
| 758 | return -EINVAL; |
| 759 | } |
| 760 | vreg = &vregs[vreg_id]; |
| 761 | |
| 762 | if (freq < 0 || freq > RPM_VREG_FREQ_1p20) { |
| 763 | vreg_err(vreg, "invalid frequency=%d\n", freq); |
| 764 | return -EINVAL; |
| 765 | } |
| 766 | if (!vreg->pdata.sleep_selectable) { |
| 767 | vreg_err(vreg, "regulator is not marked sleep selectable\n"); |
| 768 | return -EINVAL; |
| 769 | } |
| 770 | if (!vreg->part->freq.mask) { |
| 771 | vreg_err(vreg, "frequency not supported\n"); |
| 772 | return -EINVAL; |
| 773 | } |
| 774 | |
| 775 | val[vreg->part->freq.word] = freq << vreg->part->freq.shift; |
| 776 | mask[vreg->part->freq.word] = vreg->part->freq.mask; |
| 777 | |
| 778 | rc = vreg_set_noirq(vreg, RPM_VREG_VOTER_REG_FRAMEWORK, 1, mask[0], |
| 779 | val[0], mask[1], val[1], vreg->part->request_len, 0); |
| 780 | if (rc) |
| 781 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 782 | |
| 783 | return rc; |
| 784 | } |
| 785 | EXPORT_SYMBOL_GPL(rpm_vreg_set_frequency); |
| 786 | |
| 787 | static inline int vreg_hpm_min_uA(struct vreg *vreg) |
| 788 | { |
| 789 | return vreg->hpm_min_load; |
| 790 | } |
| 791 | |
| 792 | static inline int vreg_lpm_max_uA(struct vreg *vreg) |
| 793 | { |
| 794 | return vreg->hpm_min_load - LOAD_THRESHOLD_STEP; |
| 795 | } |
| 796 | |
| 797 | static inline unsigned saturate_peak_load(struct vreg *vreg, unsigned load_uA) |
| 798 | { |
| 799 | unsigned load_max |
| 800 | = MILLI_TO_MICRO(vreg->part->ip.mask >> vreg->part->ip.shift); |
| 801 | |
| 802 | return (load_uA > load_max ? load_max : load_uA); |
| 803 | } |
| 804 | |
| 805 | static inline unsigned saturate_avg_load(struct vreg *vreg, unsigned load_uA) |
| 806 | { |
| 807 | unsigned load_max |
| 808 | = MILLI_TO_MICRO(vreg->part->ia.mask >> vreg->part->ia.shift); |
| 809 | return (load_uA > load_max ? load_max : load_uA); |
| 810 | } |
| 811 | |
| 812 | /* Change vreg->req, but do not send it to the RPM. */ |
| 813 | static int vreg_store(struct vreg *vreg, unsigned mask0, unsigned val0, |
| 814 | unsigned mask1, unsigned val1) |
| 815 | { |
| 816 | unsigned long flags = 0; |
| 817 | |
| 818 | if (vreg->pdata.sleep_selectable) |
| 819 | spin_lock_irqsave(&pm8921_noirq_lock, flags); |
| 820 | |
| 821 | vreg->req[0].value &= ~mask0; |
| 822 | vreg->req[0].value |= val0 & mask0; |
| 823 | |
| 824 | vreg->req[1].value &= ~mask1; |
| 825 | vreg->req[1].value |= val1 & mask1; |
| 826 | |
| 827 | if (vreg->pdata.sleep_selectable) |
| 828 | spin_unlock_irqrestore(&pm8921_noirq_lock, flags); |
| 829 | |
| 830 | return 0; |
| 831 | } |
| 832 | |
| 833 | static int vreg_set(struct vreg *vreg, unsigned mask0, unsigned val0, |
| 834 | unsigned mask1, unsigned val1, unsigned cnt) |
| 835 | { |
| 836 | unsigned prev0 = 0, prev1 = 0; |
| 837 | int rc; |
| 838 | |
| 839 | /* |
| 840 | * Bypass the normal route for regulators that can be called to change |
| 841 | * just the active set values. |
| 842 | */ |
| 843 | if (vreg->pdata.sleep_selectable) |
| 844 | return vreg_set_noirq(vreg, RPM_VREG_VOTER_REG_FRAMEWORK, 1, |
| 845 | mask0, val0, mask1, val1, cnt, 1); |
| 846 | |
| 847 | prev0 = vreg->req[0].value; |
| 848 | vreg->req[0].value &= ~mask0; |
| 849 | vreg->req[0].value |= val0 & mask0; |
| 850 | |
| 851 | prev1 = vreg->req[1].value; |
| 852 | vreg->req[1].value &= ~mask1; |
| 853 | vreg->req[1].value |= val1 & mask1; |
| 854 | |
| 855 | /* Ignore duplicate requests */ |
| 856 | if (vreg->req[0].value == vreg->prev_active_req[0].value && |
| 857 | vreg->req[1].value == vreg->prev_active_req[1].value) { |
| 858 | if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_DUPLICATE) |
| 859 | rpm_regulator_duplicate(vreg, MSM_RPM_CTX_SET_0, cnt); |
| 860 | return 0; |
| 861 | } |
| 862 | |
| 863 | rc = msm_rpm_set(MSM_RPM_CTX_SET_0, vreg->req, cnt); |
| 864 | if (rc) { |
| 865 | vreg->req[0].value = prev0; |
| 866 | vreg->req[1].value = prev1; |
| 867 | |
| 868 | vreg_err(vreg, "msm_rpm_set failed, set=active, id=%d, rc=%d\n", |
| 869 | vreg->req[0].id, rc); |
| 870 | } else { |
| 871 | if (msm_rpm_vreg_debug_mask & MSM_RPM_VREG_DEBUG_REQUEST) |
| 872 | rpm_regulator_req(vreg, MSM_RPM_CTX_SET_0); |
| 873 | vreg->prev_active_req[0].value = vreg->req[0].value; |
| 874 | vreg->prev_active_req[1].value = vreg->req[1].value; |
| 875 | } |
| 876 | |
| 877 | return rc; |
| 878 | } |
| 879 | |
| 880 | static int vreg_is_enabled(struct regulator_dev *rdev) |
| 881 | { |
| 882 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 883 | int enabled; |
| 884 | |
| 885 | mutex_lock(&vreg->pc_lock); |
| 886 | enabled = vreg->is_enabled; |
| 887 | mutex_unlock(&vreg->pc_lock); |
| 888 | |
| 889 | return enabled; |
| 890 | } |
| 891 | |
| 892 | static void set_enable(struct vreg *vreg, unsigned int *mask, unsigned int *val) |
| 893 | { |
| 894 | switch (vreg->type) { |
| 895 | case REGULATOR_TYPE_LDO: |
| 896 | case REGULATOR_TYPE_SMPS: |
| 897 | /* Enable by setting a voltage. */ |
| 898 | if (vreg->part->uV.mask) { |
| 899 | val[vreg->part->uV.word] |
| 900 | |= vreg->save_uV << vreg->part->uV.shift; |
| 901 | mask[vreg->part->uV.word] |= vreg->part->uV.mask; |
| 902 | } else { |
| 903 | val[vreg->part->mV.word] |
| 904 | |= MICRO_TO_MILLI(vreg->save_uV) |
| 905 | << vreg->part->mV.shift; |
| 906 | mask[vreg->part->mV.word] |= vreg->part->mV.mask; |
| 907 | } |
| 908 | break; |
| 909 | case REGULATOR_TYPE_VS: |
| 910 | case REGULATOR_TYPE_NCP: |
| 911 | /* Enable by setting enable_state. */ |
| 912 | val[vreg->part->enable_state.word] |
| 913 | |= RPM_VREG_STATE_ON << vreg->part->enable_state.shift; |
| 914 | mask[vreg->part->enable_state.word] |
| 915 | |= vreg->part->enable_state.mask; |
| 916 | } |
| 917 | } |
| 918 | |
| 919 | static int vreg_enable(struct regulator_dev *rdev) |
| 920 | { |
| 921 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 922 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 923 | int rc = 0; |
| 924 | |
| 925 | set_enable(vreg, mask, val); |
| 926 | |
| 927 | mutex_lock(&vreg->pc_lock); |
| 928 | |
| 929 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 930 | vreg->part->request_len); |
| 931 | if (!rc) |
| 932 | vreg->is_enabled = true; |
| 933 | |
| 934 | mutex_unlock(&vreg->pc_lock); |
| 935 | |
| 936 | if (rc) |
| 937 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 938 | |
| 939 | return rc; |
| 940 | } |
| 941 | |
| 942 | static void set_disable(struct vreg *vreg, unsigned int *mask, |
| 943 | unsigned int *val) |
| 944 | { |
| 945 | switch (vreg->type) { |
| 946 | case REGULATOR_TYPE_LDO: |
| 947 | case REGULATOR_TYPE_SMPS: |
| 948 | /* Disable by setting a voltage of 0 uV. */ |
| 949 | if (vreg->part->uV.mask) { |
| 950 | val[vreg->part->uV.word] |= 0 << vreg->part->uV.shift; |
| 951 | mask[vreg->part->uV.word] |= vreg->part->uV.mask; |
| 952 | } else { |
| 953 | val[vreg->part->mV.word] |= 0 << vreg->part->mV.shift; |
| 954 | mask[vreg->part->mV.word] |= vreg->part->mV.mask; |
| 955 | } |
| 956 | break; |
| 957 | case REGULATOR_TYPE_VS: |
| 958 | case REGULATOR_TYPE_NCP: |
| 959 | /* Disable by setting enable_state. */ |
| 960 | val[vreg->part->enable_state.word] |
| 961 | |= RPM_VREG_STATE_OFF << vreg->part->enable_state.shift; |
| 962 | mask[vreg->part->enable_state.word] |
| 963 | |= vreg->part->enable_state.mask; |
| 964 | } |
| 965 | } |
| 966 | |
| 967 | static int vreg_disable(struct regulator_dev *rdev) |
| 968 | { |
| 969 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 970 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 971 | int rc = 0; |
| 972 | |
| 973 | set_disable(vreg, mask, val); |
| 974 | |
| 975 | mutex_lock(&vreg->pc_lock); |
| 976 | |
| 977 | /* Only disable if pin control is not in use. */ |
| 978 | if (!vreg->is_enabled_pc) |
| 979 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 980 | vreg->part->request_len); |
| 981 | |
| 982 | if (!rc) |
| 983 | vreg->is_enabled = false; |
| 984 | |
| 985 | mutex_unlock(&vreg->pc_lock); |
| 986 | |
| 987 | if (rc) |
| 988 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 989 | |
| 990 | return rc; |
| 991 | } |
| 992 | |
| 993 | static int vreg_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, |
| 994 | unsigned *selector) |
| 995 | { |
| 996 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 997 | struct vreg_range *range = &vreg->set_points->range[0]; |
| 998 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 999 | int rc = 0, uV = min_uV; |
| 1000 | int lim_min_uV, lim_max_uV, i; |
| 1001 | |
| 1002 | /* Check if request voltage is outside of physically settable range. */ |
| 1003 | lim_min_uV = vreg->set_points->range[0].min_uV; |
| 1004 | lim_max_uV = |
| 1005 | vreg->set_points->range[vreg->set_points->count - 1].max_uV; |
| 1006 | |
| 1007 | if (uV < lim_min_uV && max_uV >= lim_min_uV) |
| 1008 | uV = lim_min_uV; |
| 1009 | |
| 1010 | if (uV < lim_min_uV || uV > lim_max_uV) { |
| 1011 | vreg_err(vreg, |
| 1012 | "request v=[%d, %d] is outside possible v=[%d, %d]\n", |
| 1013 | min_uV, max_uV, lim_min_uV, lim_max_uV); |
| 1014 | return -EINVAL; |
| 1015 | } |
| 1016 | |
| 1017 | /* Find the range which uV is inside of. */ |
| 1018 | for (i = vreg->set_points->count - 1; i > 0; i++) { |
| 1019 | if (uV > vreg->set_points->range[i - 1].max_uV) { |
| 1020 | range = &vreg->set_points->range[i]; |
| 1021 | break; |
| 1022 | } |
| 1023 | } |
| 1024 | |
| 1025 | /* |
| 1026 | * Force uV to be an allowed set point and apply a ceiling function |
| 1027 | * to non-set point values. |
| 1028 | */ |
| 1029 | uV = (uV - range->min_uV + range->step_uV - 1) / range->step_uV; |
| 1030 | uV = uV * range->step_uV + range->min_uV; |
| 1031 | |
| 1032 | if (vreg->part->uV.mask) { |
| 1033 | val[vreg->part->uV.word] = uV << vreg->part->uV.shift; |
| 1034 | mask[vreg->part->uV.word] = vreg->part->uV.mask; |
| 1035 | } else { |
| 1036 | val[vreg->part->mV.word] |
| 1037 | = MICRO_TO_MILLI(uV) << vreg->part->mV.shift; |
| 1038 | mask[vreg->part->mV.word] = vreg->part->mV.mask; |
| 1039 | } |
| 1040 | |
| 1041 | mutex_lock(&vreg->pc_lock); |
| 1042 | |
| 1043 | /* |
| 1044 | * Only send a request for a new voltage if the regulator is currently |
| 1045 | * enabled. This will ensure that LDO and SMPS regulators are not |
| 1046 | * inadvertently turned on because voltage > 0 is equivalent to |
| 1047 | * enabling. For NCP, this just removes unnecessary RPM requests. |
| 1048 | */ |
| 1049 | if (vreg->is_enabled) { |
| 1050 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 1051 | vreg->part->request_len); |
| 1052 | if (rc) |
| 1053 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 1054 | } else if (vreg->type == REGULATOR_TYPE_NCP) { |
| 1055 | /* Regulator is disabled; store but don't send new request. */ |
| 1056 | rc = vreg_store(vreg, mask[0], val[0], mask[1], val[1]); |
| 1057 | } |
| 1058 | |
| 1059 | if (!rc && (!vreg->pdata.sleep_selectable || !vreg->is_enabled)) |
| 1060 | vreg->save_uV = uV; |
| 1061 | |
| 1062 | mutex_unlock(&vreg->pc_lock); |
| 1063 | |
| 1064 | return rc; |
| 1065 | } |
| 1066 | |
| 1067 | static int vreg_get_voltage(struct regulator_dev *rdev) |
| 1068 | { |
| 1069 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1070 | |
| 1071 | return vreg->save_uV; |
| 1072 | } |
| 1073 | |
| 1074 | static int vreg_list_voltage(struct regulator_dev *rdev, unsigned selector) |
| 1075 | { |
| 1076 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1077 | int uV = 0; |
| 1078 | int i; |
| 1079 | |
| 1080 | if (!vreg->set_points) { |
| 1081 | vreg_err(vreg, "no voltages available\n"); |
| 1082 | return -EINVAL; |
| 1083 | } |
| 1084 | |
| 1085 | if (selector >= vreg->set_points->n_voltages) |
| 1086 | return 0; |
| 1087 | |
| 1088 | for (i = 0; i < vreg->set_points->count; i++) { |
| 1089 | if (selector < vreg->set_points->range[i].n_voltages) { |
| 1090 | uV = selector * vreg->set_points->range[i].step_uV |
| 1091 | + vreg->set_points->range[i].min_uV; |
| 1092 | break; |
| 1093 | } else { |
| 1094 | selector -= vreg->set_points->range[i].n_voltages; |
| 1095 | } |
| 1096 | } |
| 1097 | |
| 1098 | return uV; |
| 1099 | } |
| 1100 | |
| 1101 | static int vreg_set_mode(struct regulator_dev *rdev, unsigned int mode) |
| 1102 | { |
| 1103 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1104 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 1105 | int rc = 0; |
| 1106 | int peak_uA; |
| 1107 | |
| 1108 | mutex_lock(&vreg->pc_lock); |
| 1109 | |
| 1110 | peak_uA = MILLI_TO_MICRO((vreg->req[vreg->part->ip.word].value |
| 1111 | & vreg->part->ip.mask) >> vreg->part->ip.shift); |
| 1112 | |
| 1113 | switch (mode) { |
| 1114 | case REGULATOR_MODE_NORMAL: |
| 1115 | /* Make sure that request currents are in HPM range. */ |
| 1116 | if (peak_uA < vreg_hpm_min_uA(vreg)) { |
| 1117 | val[vreg->part->ip.word] |
| 1118 | = MICRO_TO_MILLI(vreg_hpm_min_uA(vreg)) |
| 1119 | << vreg->part->ip.shift; |
| 1120 | mask[vreg->part->ip.word] = vreg->part->ip.mask; |
| 1121 | } |
| 1122 | break; |
| 1123 | case REGULATOR_MODE_IDLE: |
| 1124 | /* Make sure that request currents are in LPM range. */ |
| 1125 | if (peak_uA > vreg_lpm_max_uA(vreg)) { |
| 1126 | val[vreg->part->ip.word] |
| 1127 | = MICRO_TO_MILLI(vreg_lpm_max_uA(vreg)) |
| 1128 | << vreg->part->ip.shift; |
| 1129 | mask[vreg->part->ip.word] = vreg->part->ip.mask; |
| 1130 | } |
| 1131 | break; |
| 1132 | default: |
| 1133 | vreg_err(vreg, "invalid mode: %u\n", mode); |
| 1134 | mutex_unlock(&vreg->pc_lock); |
| 1135 | return -EINVAL; |
| 1136 | } |
| 1137 | |
| 1138 | if (vreg->is_enabled) { |
| 1139 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 1140 | vreg->part->request_len); |
| 1141 | } else { |
| 1142 | /* Regulator is disabled; store but don't send new request. */ |
| 1143 | rc = vreg_store(vreg, mask[0], val[0], mask[1], val[1]); |
| 1144 | } |
| 1145 | |
| 1146 | if (rc) |
| 1147 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 1148 | else |
| 1149 | vreg->mode = mode; |
| 1150 | |
| 1151 | mutex_unlock(&vreg->pc_lock); |
| 1152 | |
| 1153 | return rc; |
| 1154 | } |
| 1155 | |
| 1156 | static unsigned int vreg_get_mode(struct regulator_dev *rdev) |
| 1157 | { |
| 1158 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1159 | |
| 1160 | return vreg->mode; |
| 1161 | } |
| 1162 | |
| 1163 | static unsigned int vreg_get_optimum_mode(struct regulator_dev *rdev, |
| 1164 | int input_uV, int output_uV, int load_uA) |
| 1165 | { |
| 1166 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1167 | unsigned int mode; |
| 1168 | |
| 1169 | load_uA += vreg->pdata.system_uA; |
| 1170 | |
| 1171 | mutex_lock(&vreg->pc_lock); |
| 1172 | SET_PART(vreg, ip, MICRO_TO_MILLI(saturate_peak_load(vreg, load_uA))); |
| 1173 | mutex_unlock(&vreg->pc_lock); |
| 1174 | |
| 1175 | if (load_uA >= vreg->hpm_min_load) |
| 1176 | mode = REGULATOR_MODE_NORMAL; |
| 1177 | else |
| 1178 | mode = REGULATOR_MODE_IDLE; |
| 1179 | |
| 1180 | return mode; |
| 1181 | } |
| 1182 | |
| 1183 | /* |
| 1184 | * Returns the logical pin control enable state because the pin control options |
| 1185 | * present in the hardware out of restart could be different from those desired |
| 1186 | * by the consumer. |
| 1187 | */ |
| 1188 | static int vreg_pin_control_is_enabled(struct regulator_dev *rdev) |
| 1189 | { |
| 1190 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1191 | |
| 1192 | return vreg->is_enabled_pc; |
| 1193 | } |
| 1194 | |
| 1195 | static int vreg_pin_control_enable(struct regulator_dev *rdev) |
| 1196 | { |
| 1197 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1198 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 1199 | int rc; |
| 1200 | |
| 1201 | mutex_lock(&vreg->pc_lock); |
| 1202 | |
| 1203 | val[vreg->part->pc.word] |
| 1204 | |= vreg->pdata.pin_ctrl << vreg->part->pc.shift; |
| 1205 | mask[vreg->part->pc.word] |= vreg->part->pc.mask; |
| 1206 | |
| 1207 | val[vreg->part->pf.word] |= vreg->pdata.pin_fn << vreg->part->pf.shift; |
| 1208 | mask[vreg->part->pf.word] |= vreg->part->pf.mask; |
| 1209 | |
| 1210 | if (!vreg->is_enabled) |
| 1211 | set_enable(vreg, mask, val); |
| 1212 | |
| 1213 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 1214 | vreg->part->request_len); |
| 1215 | |
| 1216 | if (!rc) |
| 1217 | vreg->is_enabled_pc = true; |
| 1218 | |
| 1219 | mutex_unlock(&vreg->pc_lock); |
| 1220 | |
| 1221 | if (rc) |
| 1222 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 1223 | |
| 1224 | return rc; |
| 1225 | } |
| 1226 | |
| 1227 | static int vreg_pin_control_disable(struct regulator_dev *rdev) |
| 1228 | { |
| 1229 | struct vreg *vreg = rdev_get_drvdata(rdev); |
| 1230 | unsigned int mask[2] = {0}, val[2] = {0}; |
| 1231 | enum rpm_vreg_pin_fn pin_fn; |
| 1232 | int rc; |
| 1233 | |
| 1234 | mutex_lock(&vreg->pc_lock); |
| 1235 | |
| 1236 | val[vreg->part->pc.word] |
| 1237 | |= RPM_VREG_PIN_CTRL_NONE << vreg->part->pc.shift; |
| 1238 | mask[vreg->part->pc.word] |= vreg->part->pc.mask; |
| 1239 | |
| 1240 | pin_fn = RPM_VREG_PIN_FN_NONE; |
| 1241 | if (vreg->pdata.pin_fn == RPM_VREG_PIN_FN_SLEEP_B) |
| 1242 | pin_fn = RPM_VREG_PIN_FN_SLEEP_B; |
| 1243 | val[vreg->part->pf.word] |= pin_fn << vreg->part->pf.shift; |
| 1244 | mask[vreg->part->pf.word] |= vreg->part->pf.mask; |
| 1245 | |
| 1246 | if (!vreg->is_enabled) |
| 1247 | set_disable(vreg, mask, val); |
| 1248 | |
| 1249 | rc = vreg_set(vreg, mask[0], val[0], mask[1], val[1], |
| 1250 | vreg->part->request_len); |
| 1251 | |
| 1252 | if (!rc) |
| 1253 | vreg->is_enabled_pc = false; |
| 1254 | |
| 1255 | mutex_unlock(&vreg->pc_lock); |
| 1256 | |
| 1257 | if (rc) |
| 1258 | vreg_err(vreg, "vreg_set failed, rc=%d\n", rc); |
| 1259 | |
| 1260 | return rc; |
| 1261 | } |
| 1262 | |
| 1263 | /* Real regulator operations. */ |
| 1264 | static struct regulator_ops ldo_ops = { |
| 1265 | .enable = vreg_enable, |
| 1266 | .disable = vreg_disable, |
| 1267 | .is_enabled = vreg_is_enabled, |
| 1268 | .set_voltage = vreg_set_voltage, |
| 1269 | .get_voltage = vreg_get_voltage, |
| 1270 | .list_voltage = vreg_list_voltage, |
| 1271 | .set_mode = vreg_set_mode, |
| 1272 | .get_mode = vreg_get_mode, |
| 1273 | .get_optimum_mode = vreg_get_optimum_mode, |
| 1274 | }; |
| 1275 | |
| 1276 | static struct regulator_ops smps_ops = { |
| 1277 | .enable = vreg_enable, |
| 1278 | .disable = vreg_disable, |
| 1279 | .is_enabled = vreg_is_enabled, |
| 1280 | .set_voltage = vreg_set_voltage, |
| 1281 | .get_voltage = vreg_get_voltage, |
| 1282 | .list_voltage = vreg_list_voltage, |
| 1283 | .set_mode = vreg_set_mode, |
| 1284 | .get_mode = vreg_get_mode, |
| 1285 | .get_optimum_mode = vreg_get_optimum_mode, |
| 1286 | }; |
| 1287 | |
| 1288 | static struct regulator_ops switch_ops = { |
| 1289 | .enable = vreg_enable, |
| 1290 | .disable = vreg_disable, |
| 1291 | .is_enabled = vreg_is_enabled, |
| 1292 | }; |
| 1293 | |
| 1294 | static struct regulator_ops ncp_ops = { |
| 1295 | .enable = vreg_enable, |
| 1296 | .disable = vreg_disable, |
| 1297 | .is_enabled = vreg_is_enabled, |
| 1298 | .set_voltage = vreg_set_voltage, |
| 1299 | .get_voltage = vreg_get_voltage, |
| 1300 | .list_voltage = vreg_list_voltage, |
| 1301 | }; |
| 1302 | |
| 1303 | /* Pin control regulator operations. */ |
| 1304 | static struct regulator_ops pin_control_ops = { |
| 1305 | .enable = vreg_pin_control_enable, |
| 1306 | .disable = vreg_pin_control_disable, |
| 1307 | .is_enabled = vreg_pin_control_is_enabled, |
| 1308 | }; |
| 1309 | |
| 1310 | #define VREG_DESC(_id, _name, _ops) \ |
| 1311 | [RPM_VREG_ID_PM8921_##_id] = { \ |
| 1312 | .id = RPM_VREG_ID_PM8921_##_id, \ |
| 1313 | .name = _name, \ |
| 1314 | .ops = _ops, \ |
| 1315 | .type = REGULATOR_VOLTAGE, \ |
| 1316 | .owner = THIS_MODULE, \ |
| 1317 | } |
| 1318 | |
| 1319 | static struct regulator_desc vreg_description[] = { |
| 1320 | VREG_DESC(L1, "8921_l1", &ldo_ops), |
| 1321 | VREG_DESC(L2, "8921_l2", &ldo_ops), |
| 1322 | VREG_DESC(L3, "8921_l3", &ldo_ops), |
| 1323 | VREG_DESC(L4, "8921_l4", &ldo_ops), |
| 1324 | VREG_DESC(L5, "8921_l5", &ldo_ops), |
| 1325 | VREG_DESC(L6, "8921_l6", &ldo_ops), |
| 1326 | VREG_DESC(L7, "8921_l7", &ldo_ops), |
| 1327 | VREG_DESC(L8, "8921_l8", &ldo_ops), |
| 1328 | VREG_DESC(L9, "8921_l9", &ldo_ops), |
| 1329 | VREG_DESC(L10, "8921_l10", &ldo_ops), |
| 1330 | VREG_DESC(L11, "8921_l11", &ldo_ops), |
| 1331 | VREG_DESC(L12, "8921_l12", &ldo_ops), |
| 1332 | VREG_DESC(L14, "8921_l14", &ldo_ops), |
| 1333 | VREG_DESC(L15, "8921_l15", &ldo_ops), |
| 1334 | VREG_DESC(L16, "8921_l16", &ldo_ops), |
| 1335 | VREG_DESC(L17, "8921_l17", &ldo_ops), |
| 1336 | VREG_DESC(L18, "8921_l18", &ldo_ops), |
| 1337 | VREG_DESC(L21, "8921_l21", &ldo_ops), |
| 1338 | VREG_DESC(L22, "8921_l22", &ldo_ops), |
| 1339 | VREG_DESC(L23, "8921_l23", &ldo_ops), |
| 1340 | VREG_DESC(L24, "8921_l24", &ldo_ops), |
| 1341 | VREG_DESC(L25, "8921_l25", &ldo_ops), |
| 1342 | VREG_DESC(L26, "8921_l26", &ldo_ops), |
| 1343 | VREG_DESC(L27, "8921_l27", &ldo_ops), |
| 1344 | VREG_DESC(L28, "8921_l28", &ldo_ops), |
| 1345 | VREG_DESC(L29, "8921_l29", &ldo_ops), |
| 1346 | |
| 1347 | VREG_DESC(S1, "8921_s1", &smps_ops), |
| 1348 | VREG_DESC(S2, "8921_s2", &smps_ops), |
| 1349 | VREG_DESC(S3, "8921_s3", &smps_ops), |
| 1350 | VREG_DESC(S4, "8921_s4", &smps_ops), |
| 1351 | VREG_DESC(S5, "8921_s5", &smps_ops), |
| 1352 | VREG_DESC(S6, "8921_s6", &smps_ops), |
| 1353 | VREG_DESC(S7, "8921_s7", &smps_ops), |
| 1354 | VREG_DESC(S8, "8921_s8", &smps_ops), |
| 1355 | |
| 1356 | VREG_DESC(LVS1, "8921_lvs1", &switch_ops), |
| 1357 | VREG_DESC(LVS2, "8921_lvs2", &switch_ops), |
| 1358 | VREG_DESC(LVS3, "8921_lvs3", &switch_ops), |
| 1359 | VREG_DESC(LVS4, "8921_lvs4", &switch_ops), |
| 1360 | VREG_DESC(LVS5, "8921_lvs5", &switch_ops), |
| 1361 | VREG_DESC(LVS6, "8921_lvs6", &switch_ops), |
| 1362 | VREG_DESC(LVS7, "8921_lvs7", &switch_ops), |
| 1363 | |
| 1364 | VREG_DESC(USB_OTG, "8921_usb_otg", &switch_ops), |
| 1365 | VREG_DESC(HDMI_MVS, "8921_hdmi_mvs", &switch_ops), |
| 1366 | VREG_DESC(NCP, "8921_ncp", &ncp_ops), |
| 1367 | |
| 1368 | VREG_DESC(L1_PC, "8921_l1_pc", &pin_control_ops), |
| 1369 | VREG_DESC(L2_PC, "8921_l2_pc", &pin_control_ops), |
| 1370 | VREG_DESC(L3_PC, "8921_l3_pc", &pin_control_ops), |
| 1371 | VREG_DESC(L4_PC, "8921_l4_pc", &pin_control_ops), |
| 1372 | VREG_DESC(L5_PC, "8921_l5_pc", &pin_control_ops), |
| 1373 | VREG_DESC(L6_PC, "8921_l6_pc", &pin_control_ops), |
| 1374 | VREG_DESC(L7_PC, "8921_l7_pc", &pin_control_ops), |
| 1375 | VREG_DESC(L8_PC, "8921_l8_pc", &pin_control_ops), |
| 1376 | VREG_DESC(L9_PC, "8921_l9_pc", &pin_control_ops), |
| 1377 | VREG_DESC(L10_PC, "8921_l10_pc", &pin_control_ops), |
| 1378 | VREG_DESC(L11_PC, "8921_l11_pc", &pin_control_ops), |
| 1379 | VREG_DESC(L12_PC, "8921_l12_pc", &pin_control_ops), |
| 1380 | VREG_DESC(L14_PC, "8921_l14_pc", &pin_control_ops), |
| 1381 | VREG_DESC(L15_PC, "8921_l15_pc", &pin_control_ops), |
| 1382 | VREG_DESC(L16_PC, "8921_l16_pc", &pin_control_ops), |
| 1383 | VREG_DESC(L17_PC, "8921_l17_pc", &pin_control_ops), |
| 1384 | VREG_DESC(L18_PC, "8921_l18_pc", &pin_control_ops), |
| 1385 | VREG_DESC(L21_PC, "8921_l21_pc", &pin_control_ops), |
| 1386 | VREG_DESC(L22_PC, "8921_l22_pc", &pin_control_ops), |
| 1387 | VREG_DESC(L23_PC, "8921_l23_pc", &pin_control_ops), |
| 1388 | VREG_DESC(L29_PC, "8921_l29_pc", &pin_control_ops), |
| 1389 | |
| 1390 | VREG_DESC(S1_PC, "8921_s1_pc", &pin_control_ops), |
| 1391 | VREG_DESC(S2_PC, "8921_s2_pc", &pin_control_ops), |
| 1392 | VREG_DESC(S3_PC, "8921_s3_pc", &pin_control_ops), |
| 1393 | VREG_DESC(S4_PC, "8921_s4_pc", &pin_control_ops), |
| 1394 | VREG_DESC(S7_PC, "8921_s7_pc", &pin_control_ops), |
| 1395 | VREG_DESC(S8_PC, "8921_s8_pc", &pin_control_ops), |
| 1396 | |
| 1397 | VREG_DESC(LVS1_PC, "8921_lvs1_pc", &pin_control_ops), |
| 1398 | VREG_DESC(LVS3_PC, "8921_lvs3_pc", &pin_control_ops), |
| 1399 | VREG_DESC(LVS4_PC, "8921_lvs4_pc", &pin_control_ops), |
| 1400 | VREG_DESC(LVS5_PC, "8921_lvs5_pc", &pin_control_ops), |
| 1401 | VREG_DESC(LVS6_PC, "8921_lvs6_pc", &pin_control_ops), |
| 1402 | VREG_DESC(LVS7_PC, "8921_lvs7_pc", &pin_control_ops), |
| 1403 | }; |
| 1404 | |
| 1405 | static inline int is_real_regulator(int id) |
| 1406 | { |
| 1407 | return (id >= 0) && (id <= RPM_VREG_ID_PM8921_MAX_REAL); |
| 1408 | } |
| 1409 | |
| 1410 | static int pc_id_to_real_id(int id) |
| 1411 | { |
| 1412 | int real_id; |
| 1413 | |
| 1414 | if (id >= RPM_VREG_ID_PM8921_L1_PC && id <= RPM_VREG_ID_PM8921_L23_PC) |
| 1415 | real_id = id - RPM_VREG_ID_PM8921_L1_PC; |
| 1416 | else if (id >= RPM_VREG_ID_PM8921_L29_PC |
| 1417 | && id <= RPM_VREG_ID_PM8921_S4_PC) |
| 1418 | real_id = id - RPM_VREG_ID_PM8921_L29_PC |
| 1419 | + RPM_VREG_ID_PM8921_L29; |
| 1420 | else if (id >= RPM_VREG_ID_PM8921_S7_PC |
| 1421 | && id <= RPM_VREG_ID_PM8921_LVS1_PC) |
| 1422 | real_id = id - RPM_VREG_ID_PM8921_S7_PC + RPM_VREG_ID_PM8921_S7; |
| 1423 | else |
| 1424 | real_id = id - RPM_VREG_ID_PM8921_LVS3_PC |
| 1425 | + RPM_VREG_ID_PM8921_LVS3; |
| 1426 | |
| 1427 | return real_id; |
| 1428 | } |
| 1429 | |
| 1430 | static int __devinit |
| 1431 | rpm_vreg_init_regulator(const struct rpm_regulator_init_data *pdata, |
| 1432 | struct device *dev) |
| 1433 | { |
| 1434 | enum rpm_vreg_pin_fn pin_fn; |
| 1435 | struct regulator_desc *rdesc; |
| 1436 | struct regulator_dev *rdev; |
| 1437 | struct vreg *vreg; |
| 1438 | const char *reg_name = ""; |
| 1439 | unsigned pin_ctrl; |
| 1440 | int rc = 0, id = pdata->id; |
| 1441 | |
| 1442 | if (id < 0 || id > RPM_VREG_ID_PM8921_MAX) { |
| 1443 | pr_err("invalid regulator id: %d\n", id); |
| 1444 | return -ENODEV; |
| 1445 | } |
| 1446 | |
| 1447 | rdesc = &vreg_description[pdata->id]; |
| 1448 | if (!is_real_regulator(pdata->id)) |
| 1449 | id = pc_id_to_real_id(pdata->id); |
| 1450 | vreg = &vregs[id]; |
| 1451 | reg_name = vreg_description[pdata->id].name; |
| 1452 | if (!pdata) { |
| 1453 | pr_err("%s: requires platform data\n", reg_name); |
| 1454 | return -EINVAL; |
| 1455 | } |
| 1456 | if (vreg->set_points) |
| 1457 | rdesc->n_voltages = vreg->set_points->n_voltages; |
| 1458 | else |
| 1459 | rdesc->n_voltages = 0; |
| 1460 | |
| 1461 | mutex_lock(&vreg->pc_lock); |
| 1462 | |
| 1463 | if (is_real_regulator(pdata->id)) { |
| 1464 | /* Do not modify pin control and pin function values. */ |
| 1465 | pin_ctrl = vreg->pdata.pin_ctrl; |
| 1466 | pin_fn = vreg->pdata.pin_fn; |
| 1467 | memcpy(&(vreg->pdata), pdata, |
| 1468 | sizeof(struct rpm_regulator_init_data)); |
| 1469 | vreg->pdata.pin_ctrl = pin_ctrl; |
| 1470 | vreg->pdata.pin_fn = pin_fn; |
| 1471 | vreg->name = reg_name; |
| 1472 | |
| 1473 | vreg->save_uV = vreg->pdata.default_uV; |
| 1474 | if (vreg->pdata.peak_uA >= vreg->hpm_min_load) |
| 1475 | vreg->mode = REGULATOR_MODE_NORMAL; |
| 1476 | else |
| 1477 | vreg->mode = REGULATOR_MODE_IDLE; |
| 1478 | |
| 1479 | /* Initialize the RPM request. */ |
| 1480 | SET_PART(vreg, ip, |
| 1481 | MICRO_TO_MILLI(saturate_peak_load(vreg, vreg->pdata.peak_uA))); |
| 1482 | SET_PART(vreg, fm, vreg->pdata.force_mode); |
| 1483 | SET_PART(vreg, pm, vreg->pdata.power_mode); |
| 1484 | SET_PART(vreg, pd, vreg->pdata.pull_down_enable); |
| 1485 | SET_PART(vreg, ia, |
| 1486 | MICRO_TO_MILLI(saturate_avg_load(vreg, vreg->pdata.avg_uA))); |
| 1487 | SET_PART(vreg, freq, vreg->pdata.freq); |
| 1488 | SET_PART(vreg, freq_clk_src, 0); |
| 1489 | SET_PART(vreg, comp_mode, 0); |
| 1490 | SET_PART(vreg, hpm, 0); |
| 1491 | if (!vreg->is_enabled_pc) { |
| 1492 | SET_PART(vreg, pf, RPM_VREG_PIN_FN_NONE); |
| 1493 | SET_PART(vreg, pc, RPM_VREG_PIN_CTRL_NONE); |
| 1494 | } |
| 1495 | } else { |
| 1496 | /* Pin control regulator */ |
| 1497 | if ((pdata->pin_ctrl & RPM_VREG_PIN_CTRL_ALL) |
| 1498 | == RPM_VREG_PIN_CTRL_NONE |
| 1499 | && pdata->pin_fn != RPM_VREG_PIN_FN_SLEEP_B) { |
| 1500 | pr_err("%s: no pin control input specified\n", |
| 1501 | reg_name); |
| 1502 | mutex_unlock(&vreg->pc_lock); |
| 1503 | return -EINVAL; |
| 1504 | } |
| 1505 | vreg->pdata.pin_ctrl = pdata->pin_ctrl; |
| 1506 | vreg->pdata.pin_fn = pdata->pin_fn; |
| 1507 | if (!vreg->name) |
| 1508 | vreg->name = reg_name; |
| 1509 | |
| 1510 | /* Initialize the RPM request. */ |
| 1511 | pin_fn = RPM_VREG_PIN_FN_NONE; |
| 1512 | /* Allow pf=sleep_b to be specified by platform data. */ |
| 1513 | if (vreg->pdata.pin_fn == RPM_VREG_PIN_FN_SLEEP_B) |
| 1514 | pin_fn = RPM_VREG_PIN_FN_SLEEP_B; |
| 1515 | SET_PART(vreg, pf, pin_fn); |
| 1516 | SET_PART(vreg, pc, RPM_VREG_PIN_CTRL_NONE); |
| 1517 | } |
| 1518 | |
| 1519 | mutex_unlock(&vreg->pc_lock); |
| 1520 | |
| 1521 | if (rc) |
| 1522 | goto bail; |
| 1523 | |
| 1524 | rdev = regulator_register(rdesc, dev, &(pdata->init_data), vreg); |
| 1525 | if (IS_ERR(rdev)) { |
| 1526 | rc = PTR_ERR(rdev); |
| 1527 | pr_err("regulator_register failed: %s, rc=%d\n", reg_name, rc); |
| 1528 | return rc; |
| 1529 | } else { |
| 1530 | if (is_real_regulator(pdata->id)) |
| 1531 | vreg->rdev = rdev; |
| 1532 | else |
| 1533 | vreg->rdev_pc = rdev; |
| 1534 | } |
| 1535 | |
| 1536 | bail: |
| 1537 | if (rc) |
| 1538 | pr_err("error for %s, rc=%d\n", reg_name, rc); |
| 1539 | |
| 1540 | return rc; |
| 1541 | } |
| 1542 | |
| 1543 | static int __devinit rpm_vreg_probe(struct platform_device *pdev) |
| 1544 | { |
| 1545 | struct rpm_regulator_platform_data *platform_data; |
| 1546 | int rc = 0; |
| 1547 | int i; |
| 1548 | |
| 1549 | platform_data = pdev->dev.platform_data; |
| 1550 | if (!platform_data) { |
| 1551 | pr_err("rpm-regulator requires platform data\n"); |
| 1552 | return -EINVAL; |
| 1553 | } |
| 1554 | |
| 1555 | /* Initialize all of the regulators listed in the platform data. */ |
| 1556 | for (i = 0; i < platform_data->num_regulators; i++) { |
| 1557 | rc = rpm_vreg_init_regulator(&platform_data->init_data[i], |
| 1558 | &pdev->dev); |
| 1559 | if (rc) { |
| 1560 | pr_err("rpm_vreg_init_regulator failed, rc=%d\n", rc); |
| 1561 | goto remove_regulators; |
| 1562 | } |
| 1563 | } |
| 1564 | |
| 1565 | platform_set_drvdata(pdev, platform_data); |
| 1566 | |
| 1567 | return rc; |
| 1568 | |
| 1569 | remove_regulators: |
| 1570 | /* Unregister all regulators added before the erroring one. */ |
| 1571 | for (; i >= 0; i--) { |
| 1572 | if (is_real_regulator(platform_data->init_data[i].id)) |
| 1573 | regulator_unregister(vregs[i].rdev); |
| 1574 | else |
| 1575 | regulator_unregister( |
| 1576 | vregs[pc_id_to_real_id(i)].rdev_pc); |
| 1577 | } |
| 1578 | |
| 1579 | return rc; |
| 1580 | } |
| 1581 | |
| 1582 | static int __devexit rpm_vreg_remove(struct platform_device *pdev) |
| 1583 | { |
| 1584 | struct rpm_regulator_platform_data *platform_data; |
| 1585 | int i, id; |
| 1586 | |
| 1587 | platform_data = platform_get_drvdata(pdev); |
| 1588 | platform_set_drvdata(pdev, NULL); |
| 1589 | |
| 1590 | if (platform_data) { |
| 1591 | for (i = 0; i < platform_data->num_regulators; i++) { |
| 1592 | id = platform_data->init_data[i].id; |
| 1593 | if (is_real_regulator(id)) { |
| 1594 | regulator_unregister(vregs[id].rdev); |
| 1595 | vregs[id].rdev = NULL; |
| 1596 | } else { |
| 1597 | regulator_unregister( |
| 1598 | vregs[pc_id_to_real_id(id)].rdev_pc); |
| 1599 | vregs[id].rdev_pc = NULL; |
| 1600 | } |
| 1601 | } |
| 1602 | } |
| 1603 | |
| 1604 | return 0; |
| 1605 | } |
| 1606 | |
| 1607 | static struct platform_driver rpm_vreg_driver = { |
| 1608 | .probe = rpm_vreg_probe, |
| 1609 | .remove = __devexit_p(rpm_vreg_remove), |
| 1610 | .driver = { |
| 1611 | .name = RPM_REGULATOR_DEV_NAME, |
| 1612 | .owner = THIS_MODULE, |
| 1613 | }, |
| 1614 | }; |
| 1615 | |
| 1616 | static int __init rpm_vreg_init(void) |
| 1617 | { |
| 1618 | struct vreg_set_points *set_points[] = { |
| 1619 | &pldo_set_points, |
| 1620 | &nldo_set_points, |
| 1621 | &nldo1200_set_points, |
| 1622 | &smps_set_points, |
| 1623 | &ftsmps_set_points, |
| 1624 | &ncp_set_points, |
| 1625 | }; |
| 1626 | int i, j; |
| 1627 | |
| 1628 | /* Calculate the number of set points available for each regualtor. */ |
| 1629 | for (i = 0; i < ARRAY_SIZE(set_points); i++) { |
| 1630 | for (j = 0; j < set_points[i]->count; j++) { |
| 1631 | set_points[i]->range[j].n_voltages |
| 1632 | = (set_points[i]->range[j].max_uV |
| 1633 | - set_points[i]->range[j].min_uV) |
| 1634 | / set_points[i]->range[j].step_uV + 1; |
| 1635 | set_points[i]->n_voltages |
| 1636 | += set_points[i]->range[j].n_voltages; |
| 1637 | } |
| 1638 | } |
| 1639 | |
| 1640 | /* Initialize pin control mutexes */ |
| 1641 | for (i = 0; i < ARRAY_SIZE(vregs); i++) |
| 1642 | mutex_init(&vregs[i].pc_lock); |
| 1643 | |
| 1644 | return platform_driver_register(&rpm_vreg_driver); |
| 1645 | } |
| 1646 | |
| 1647 | static void __exit rpm_vreg_exit(void) |
| 1648 | { |
| 1649 | int i; |
| 1650 | |
| 1651 | platform_driver_unregister(&rpm_vreg_driver); |
| 1652 | |
| 1653 | for (i = 0; i < ARRAY_SIZE(vregs); i++) |
| 1654 | mutex_destroy(&vregs[i].pc_lock); |
| 1655 | } |
| 1656 | |
| 1657 | postcore_initcall(rpm_vreg_init); |
| 1658 | module_exit(rpm_vreg_exit); |
| 1659 | |
| 1660 | MODULE_LICENSE("GPL v2"); |
| 1661 | MODULE_DESCRIPTION("MSM8960 rpm regulator driver"); |
| 1662 | MODULE_VERSION("1.0"); |
| 1663 | MODULE_ALIAS("platform:" RPM_REGULATOR_DEV_NAME); |