| Ravi Kumar V | 605f1cd | 2012-09-10 20:43:17 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2012, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | &spmi_bus { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; |
| 16 | interrupt-controller; |
| 17 | #interrupt-cells = <3>; |
| 18 | |
| 19 | qcom,pm8644@0 { |
| 20 | spmi-slave-container; |
| 21 | reg = <0x0>; |
| 22 | #address-cells = <1>; |
| 23 | #size-cells = <1>; |
| 24 | |
| 25 | pm8644_gpios: gpios { |
| 26 | spmi-dev-container; |
| 27 | compatible = "qcom,qpnp-pin"; |
| 28 | gpio-controller; |
| 29 | #gpio-cells = <2>; |
| 30 | #address-cells = <1>; |
| 31 | #size-cells = <1>; |
| 32 | label = "pm8644-gpio"; |
| 33 | |
| 34 | gpio@c000 { |
| 35 | reg = <0xc000 0x100>; |
| 36 | qcom,pin-num = <1>; |
| 37 | }; |
| 38 | |
| 39 | gpio@c100 { |
| 40 | reg = <0xc100 0x100>; |
| 41 | qcom,pin-num = <2>; |
| 42 | }; |
| 43 | |
| 44 | gpio@c200 { |
| 45 | reg = <0xc200 0x100>; |
| 46 | qcom,pin-num = <3>; |
| 47 | }; |
| 48 | |
| 49 | gpio@c300 { |
| 50 | reg = <0xc300 0x100>; |
| 51 | qcom,pin-num = <4>; |
| 52 | }; |
| 53 | |
| 54 | gpio@c400 { |
| 55 | reg = <0xc400 0x100>; |
| 56 | qcom,pin-num = <5>; |
| 57 | }; |
| 58 | |
| 59 | gpio@c500 { |
| 60 | reg = <0xc500 0x100>; |
| 61 | qcom,pin-num = <6>; |
| 62 | }; |
| 63 | |
| 64 | gpio@c600 { |
| 65 | reg = <0xc600 0x100>; |
| 66 | qcom,pin-num = <7>; |
| 67 | }; |
| 68 | |
| 69 | gpio@c700 { |
| 70 | reg = <0xc700 0x100>; |
| 71 | qcom,pin-num = <8>; |
| 72 | }; |
| 73 | |
| 74 | gpio@c800 { |
| 75 | reg = <0xc800 0x100>; |
| 76 | qcom,pin-num = <9>; |
| 77 | }; |
| 78 | |
| 79 | gpio@c900 { |
| 80 | reg = <0xc900 0x100>; |
| 81 | qcom,pin-num = <10>; |
| 82 | }; |
| 83 | |
| 84 | gpio@ca00 { |
| 85 | reg = <0xca00 0x100>; |
| 86 | qcom,pin-num = <11>; |
| 87 | }; |
| 88 | |
| 89 | gpio@cb00 { |
| 90 | reg = <0xcb00 0x100>; |
| 91 | qcom,pin-num = <12>; |
| 92 | }; |
| 93 | |
| 94 | gpio@cc00 { |
| 95 | reg = <0xcc00 0x100>; |
| 96 | qcom,pin-num = <13>; |
| 97 | }; |
| 98 | |
| 99 | gpio@cd00 { |
| 100 | reg = <0xcd00 0x100>; |
| 101 | qcom,pin-num = <14>; |
| 102 | }; |
| 103 | |
| 104 | gpio@ce00 { |
| 105 | reg = <0xce00 0x100>; |
| 106 | qcom,pin-num = <15>; |
| 107 | }; |
| 108 | |
| 109 | gpio@cf00 { |
| 110 | reg = <0xcf00 0x100>; |
| 111 | qcom,pin-num = <16>; |
| 112 | }; |
| 113 | |
| 114 | gpio@d000 { |
| 115 | reg = <0xd000 0x100>; |
| 116 | qcom,pin-num = <17>; |
| 117 | }; |
| 118 | |
| 119 | gpio@d100 { |
| 120 | reg = <0xd100 0x100>; |
| 121 | qcom,pin-num = <18>; |
| 122 | }; |
| 123 | |
| 124 | gpio@d200 { |
| 125 | reg = <0xd200 0x100>; |
| 126 | qcom,pin-num = <19>; |
| 127 | }; |
| 128 | |
| 129 | gpio@d300 { |
| 130 | reg = <0xd300 0x100>; |
| 131 | qcom,pin-num = <20>; |
| 132 | }; |
| 133 | |
| 134 | gpio@d400 { |
| 135 | reg = <0xd400 0x100>; |
| 136 | qcom,pin-num = <21>; |
| 137 | }; |
| 138 | |
| 139 | gpio@d500 { |
| 140 | reg = <0xd500 0x100>; |
| 141 | qcom,pin-num = <22>; |
| 142 | }; |
| 143 | |
| 144 | gpio@d600 { |
| 145 | reg = <0xd600 0x100>; |
| 146 | qcom,pin-num = <23>; |
| 147 | }; |
| 148 | |
| 149 | gpio@d700 { |
| 150 | reg = <0xd700 0x100>; |
| 151 | qcom,pin-num = <24>; |
| 152 | }; |
| 153 | |
| 154 | gpio@d800 { |
| 155 | reg = <0xd800 0x100>; |
| 156 | qcom,pin-num = <25>; |
| 157 | }; |
| 158 | |
| 159 | gpio@d900 { |
| 160 | reg = <0xd900 0x100>; |
| 161 | qcom,pin-num = <26>; |
| 162 | }; |
| 163 | |
| 164 | gpio@da00 { |
| 165 | reg = <0xda00 0x100>; |
| 166 | qcom,pin-num = <27>; |
| 167 | }; |
| 168 | |
| 169 | gpio@db00 { |
| 170 | reg = <0xdb00 0x100>; |
| 171 | qcom,pin-num = <28>; |
| 172 | }; |
| 173 | |
| 174 | gpio@dc00 { |
| 175 | reg = <0xdc00 0x100>; |
| 176 | qcom,pin-num = <29>; |
| 177 | }; |
| 178 | |
| 179 | gpio@dd00 { |
| 180 | reg = <0xdd00 0x100>; |
| 181 | qcom,pin-num = <30>; |
| 182 | }; |
| 183 | |
| 184 | gpio@de00 { |
| 185 | reg = <0xde00 0x100>; |
| 186 | qcom,pin-num = <31>; |
| 187 | }; |
| 188 | |
| 189 | gpio@df00 { |
| 190 | reg = <0xdf00 0x100>; |
| 191 | qcom,pin-num = <32>; |
| 192 | }; |
| 193 | |
| 194 | gpio@e000 { |
| 195 | reg = <0xe000 0x100>; |
| 196 | qcom,pin-num = <33>; |
| 197 | }; |
| 198 | |
| 199 | gpio@e100 { |
| 200 | reg = <0xe100 0x100>; |
| 201 | qcom,pin-num = <34>; |
| 202 | }; |
| 203 | |
| 204 | gpio@e200 { |
| 205 | reg = <0xe200 0x100>; |
| 206 | qcom,pin-num = <35>; |
| 207 | }; |
| 208 | |
| 209 | gpio@e300 { |
| 210 | reg = <0xe300 0x100>; |
| 211 | qcom,pin-num = <36>; |
| 212 | }; |
| 213 | |
| 214 | gpio@e400 { |
| 215 | reg = <0xe400 0x100>; |
| 216 | qcom,pin-num = <37>; |
| 217 | }; |
| 218 | |
| 219 | gpio@e500 { |
| 220 | reg = <0xe500 0x100>; |
| 221 | qcom,pin-num = <38>; |
| 222 | }; |
| 223 | |
| 224 | gpio@e600 { |
| 225 | reg = <0xe600 0x100>; |
| 226 | qcom,pin-num = <39>; |
| 227 | }; |
| 228 | |
| 229 | gpio@e700 { |
| 230 | reg = <0xe700 0x100>; |
| 231 | qcom,pin-num = <40>; |
| 232 | }; |
| 233 | |
| 234 | gpio@e800 { |
| 235 | reg = <0xe800 0x100>; |
| 236 | qcom,pin-num = <41>; |
| 237 | }; |
| 238 | |
| 239 | gpio@e900 { |
| 240 | reg = <0xe900 0x100>; |
| 241 | qcom,pin-num = <42>; |
| 242 | }; |
| 243 | |
| 244 | gpio@ea00 { |
| 245 | reg = <0xea00 0x100>; |
| 246 | qcom,pin-num = <43>; |
| 247 | }; |
| 248 | }; |
| 249 | |
| 250 | pm8644_mpps: mpps { |
| 251 | spmi-dev-container; |
| 252 | compatible = "qcom,qpnp-pin"; |
| 253 | gpio-controller; |
| 254 | #gpio-cells = <2>; |
| 255 | #address-cells = <1>; |
| 256 | #size-cells = <1>; |
| 257 | label = "pm8644-mpp"; |
| 258 | |
| 259 | mpp@a000 { |
| 260 | reg = <0xa000 0x100>; |
| 261 | qcom,pin-num = <1>; |
| 262 | }; |
| 263 | |
| 264 | mpp@a100 { |
| 265 | reg = <0xa100 0x100>; |
| 266 | qcom,pin-num = <2>; |
| 267 | }; |
| 268 | |
| 269 | mpp@a200 { |
| 270 | reg = <0xa200 0x100>; |
| 271 | qcom,pin-num = <3>; |
| 272 | }; |
| 273 | |
| 274 | mpp@a300 { |
| 275 | reg = <0xa300 0x100>; |
| 276 | qcom,pin-num = <4>; |
| 277 | }; |
| 278 | |
| 279 | mpp@a400 { |
| 280 | reg = <0xa400 0x100>; |
| 281 | qcom,pin-num = <5>; |
| 282 | }; |
| 283 | |
| 284 | mpp@a500 { |
| 285 | reg = <0xa500 0x100>; |
| 286 | qcom,pin-num = <6>; |
| 287 | }; |
| 288 | }; |
| 289 | }; |
| Ravi Kumar V | d9e522c | 2012-10-03 12:52:14 +0530 | [diff] [blame] | 290 | |
| 291 | qcom,pm8644@1 { |
| 292 | spmi-slave-container; |
| 293 | reg = <0x1>; |
| 294 | #address-cells = <1>; |
| 295 | #size-cells = <1>; |
| 296 | |
| 297 | regulator@1400 { |
| 298 | regulator-name = "8644_s1"; |
| 299 | spmi-dev-container; |
| 300 | #address-cells = <1>; |
| 301 | #size-cells = <1>; |
| 302 | compatible = "qcom,qpnp-regulator"; |
| 303 | reg = <0x1400 0x300>; |
| 304 | status = "disabled"; |
| 305 | |
| 306 | qcom,ctl@1400 { |
| 307 | reg = <0x1400 0x100>; |
| 308 | }; |
| 309 | qcom,ps@1500 { |
| 310 | reg = <0x1500 0x100>; |
| 311 | }; |
| 312 | qcom,freq@1600 { |
| 313 | reg = <0x1600 0x100>; |
| 314 | }; |
| 315 | }; |
| 316 | |
| 317 | regulator@1700 { |
| 318 | regulator-name = "8644_s2"; |
| 319 | spmi-dev-container; |
| 320 | #address-cells = <1>; |
| 321 | #size-cells = <1>; |
| 322 | compatible = "qcom,qpnp-regulator"; |
| 323 | reg = <0x1700 0x300>; |
| 324 | status = "disabled"; |
| 325 | |
| 326 | qcom,ctl@1700 { |
| 327 | reg = <0x1700 0x100>; |
| 328 | }; |
| 329 | qcom,ps@1800 { |
| 330 | reg = <0x1800 0x100>; |
| 331 | }; |
| 332 | qcom,freq@1900 { |
| 333 | reg = <0x1900 0x100>; |
| 334 | }; |
| 335 | }; |
| 336 | |
| 337 | regulator@1a00 { |
| 338 | regulator-name = "8644_s3"; |
| 339 | spmi-dev-container; |
| 340 | #address-cells = <1>; |
| 341 | #size-cells = <1>; |
| 342 | compatible = "qcom,qpnp-regulator"; |
| 343 | reg = <0x1a00 0x300>; |
| 344 | status = "disabled"; |
| 345 | |
| 346 | qcom,ctl@1a00 { |
| 347 | reg = <0x1a00 0x100>; |
| 348 | }; |
| 349 | qcom,ps@1b00 { |
| 350 | reg = <0x1b00 0x100>; |
| 351 | }; |
| 352 | qcom,freq@1c00 { |
| 353 | reg = <0x1c00 0x100>; |
| 354 | }; |
| 355 | }; |
| 356 | |
| 357 | regulator@1d00 { |
| 358 | regulator-name = "8644_s4"; |
| 359 | spmi-dev-container; |
| 360 | #address-cells = <1>; |
| 361 | #size-cells = <1>; |
| 362 | compatible = "qcom,qpnp-regulator"; |
| 363 | reg = <0x1d00 0x300>; |
| 364 | status = "disabled"; |
| 365 | |
| 366 | qcom,ctl@1d00 { |
| 367 | reg = <0x1d00 0x100>; |
| 368 | }; |
| 369 | qcom,ps@1e00 { |
| 370 | reg = <0x1e00 0x100>; |
| 371 | }; |
| 372 | qcom,freq@1f00 { |
| 373 | reg = <0x1f00 0x100>; |
| 374 | }; |
| 375 | }; |
| 376 | |
| 377 | regulator@2000 { |
| 378 | regulator-name = "8644_s5"; |
| 379 | spmi-dev-container; |
| 380 | #address-cells = <1>; |
| 381 | #size-cells = <1>; |
| 382 | compatible = "qcom,qpnp-regulator"; |
| 383 | reg = <0x2000 0x300>; |
| 384 | status = "disabled"; |
| 385 | |
| 386 | qcom,ctl@2000 { |
| 387 | reg = <0x2000 0x100>; |
| 388 | }; |
| 389 | qcom,ps@2100 { |
| 390 | reg = <0x2100 0x100>; |
| 391 | }; |
| 392 | qcom,freq@2200 { |
| 393 | reg = <0x2200 0x100>; |
| 394 | }; |
| 395 | }; |
| 396 | |
| 397 | regulator@2300 { |
| 398 | regulator-name = "8644_s6"; |
| 399 | spmi-dev-container; |
| 400 | #address-cells = <1>; |
| 401 | #size-cells = <1>; |
| 402 | compatible = "qcom,qpnp-regulator"; |
| 403 | reg = <0x2300 0x300>; |
| 404 | status = "disabled"; |
| 405 | |
| 406 | qcom,ctl@2300 { |
| 407 | reg = <0x2300 0x100>; |
| 408 | }; |
| 409 | qcom,ps@2400 { |
| 410 | reg = <0x2400 0x100>; |
| 411 | }; |
| 412 | qcom,freq@2500 { |
| 413 | reg = <0x2500 0x100>; |
| 414 | }; |
| 415 | }; |
| 416 | |
| 417 | regulator@2600 { |
| 418 | regulator-name = "8644_s7"; |
| 419 | spmi-dev-container; |
| 420 | #address-cells = <1>; |
| 421 | #size-cells = <1>; |
| 422 | compatible = "qcom,qpnp-regulator"; |
| 423 | reg = <0x2600 0x300>; |
| 424 | status = "disabled"; |
| 425 | |
| 426 | qcom,ctl@2600 { |
| 427 | reg = <0x2600 0x100>; |
| 428 | }; |
| 429 | qcom,ps@2700 { |
| 430 | reg = <0x2700 0x100>; |
| 431 | }; |
| 432 | qcom,freq@2800 { |
| 433 | reg = <0x2800 0x100>; |
| 434 | }; |
| 435 | }; |
| 436 | |
| 437 | regulator@2900 { |
| 438 | regulator-name = "8644_s8"; |
| 439 | spmi-dev-container; |
| 440 | #address-cells = <1>; |
| 441 | #size-cells = <1>; |
| 442 | compatible = "qcom,qpnp-regulator"; |
| 443 | reg = <0x2900 0x300>; |
| 444 | status = "disabled"; |
| 445 | |
| 446 | qcom,ctl@2900 { |
| 447 | reg = <0x2900 0x100>; |
| 448 | }; |
| 449 | qcom,ps@2a00 { |
| 450 | reg = <0x2a00 0x100>; |
| 451 | }; |
| 452 | qcom,freq@2b00 { |
| 453 | reg = <0x2b00 0x100>; |
| 454 | }; |
| 455 | }; |
| 456 | |
| 457 | regulator@2c00 { |
| 458 | regulator-name = "8644_s9"; |
| 459 | spmi-dev-container; |
| 460 | #address-cells = <1>; |
| 461 | #size-cells = <1>; |
| 462 | compatible = "qcom,qpnp-regulator"; |
| 463 | reg = <0x2c00 0x300>; |
| 464 | status = "disabled"; |
| 465 | |
| 466 | qcom,ctl@2c00 { |
| 467 | reg = <0x2c00 0x100>; |
| 468 | }; |
| 469 | qcom,ps@2d00 { |
| 470 | reg = <0x2d00 0x100>; |
| 471 | }; |
| 472 | qcom,freq@2e00 { |
| 473 | reg = <0x2e00 0x100>; |
| 474 | }; |
| 475 | }; |
| 476 | |
| 477 | regulator@2f00 { |
| 478 | regulator-name = "8644_s10"; |
| 479 | spmi-dev-container; |
| 480 | #address-cells = <1>; |
| 481 | #size-cells = <1>; |
| 482 | compatible = "qcom,qpnp-regulator"; |
| 483 | reg = <0x2f00 0x300>; |
| 484 | status = "disabled"; |
| 485 | |
| 486 | qcom,ctl@2f00 { |
| 487 | reg = <0x2f00 0x100>; |
| 488 | }; |
| 489 | qcom,ps@3000 { |
| 490 | reg = <0x3000 0x100>; |
| 491 | }; |
| 492 | qcom,freq@3100 { |
| 493 | reg = <0x3100 0x100>; |
| 494 | }; |
| 495 | }; |
| 496 | |
| 497 | regulator@3200 { |
| 498 | regulator-name = "8644_s11"; |
| 499 | spmi-dev-container; |
| 500 | #address-cells = <1>; |
| 501 | #size-cells = <1>; |
| 502 | compatible = "qcom,qpnp-regulator"; |
| 503 | reg = <0x3200 0x300>; |
| 504 | status = "disabled"; |
| 505 | |
| 506 | qcom,ctl@3200 { |
| 507 | reg = <0x3200 0x100>; |
| 508 | }; |
| 509 | qcom,ps@3300 { |
| 510 | reg = <0x3300 0x100>; |
| 511 | }; |
| 512 | qcom,freq@3400 { |
| 513 | reg = <0x3400 0x100>; |
| 514 | }; |
| 515 | }; |
| 516 | |
| 517 | regulator@4000 { |
| 518 | regulator-name = "8644_l1"; |
| 519 | reg = <0x4000 0x100>; |
| 520 | compatible = "qcom,qpnp-regulator"; |
| 521 | status = "disabled"; |
| 522 | }; |
| 523 | |
| 524 | regulator@4100 { |
| 525 | regulator-name = "8644_l2"; |
| 526 | reg = <0x4100 0x100>; |
| 527 | compatible = "qcom,qpnp-regulator"; |
| 528 | status = "disabled"; |
| 529 | }; |
| 530 | |
| 531 | regulator@4200 { |
| 532 | regulator-name = "8644_l3"; |
| 533 | reg = <0x4200 0x100>; |
| 534 | compatible = "qcom,qpnp-regulator"; |
| 535 | status = "disabled"; |
| 536 | }; |
| 537 | |
| 538 | regulator@4300 { |
| 539 | regulator-name = "8644_l4"; |
| 540 | reg = <0x4300 0x100>; |
| 541 | compatible = "qcom,qpnp-regulator"; |
| 542 | status = "disabled"; |
| 543 | }; |
| 544 | |
| 545 | regulator@4400 { |
| 546 | regulator-name = "8644_l5"; |
| 547 | reg = <0x4400 0x100>; |
| 548 | compatible = "qcom,qpnp-regulator"; |
| 549 | qcom,force-type = <0x04 0x10>; |
| 550 | status = "disabled"; |
| 551 | }; |
| 552 | |
| 553 | regulator@4500 { |
| 554 | regulator-name = "8644_l6"; |
| 555 | reg = <0x4500 0x100>; |
| 556 | compatible = "qcom,qpnp-regulator"; |
| 557 | status = "disabled"; |
| 558 | }; |
| 559 | |
| 560 | regulator@4600 { |
| 561 | regulator-name = "8644_l7"; |
| 562 | reg = <0x4600 0x100>; |
| 563 | compatible = "qcom,qpnp-regulator"; |
| 564 | qcom,force-type = <0x04 0x10>; |
| 565 | status = "disabled"; |
| 566 | }; |
| 567 | |
| 568 | regulator@4700 { |
| 569 | regulator-name = "8644_l8"; |
| 570 | reg = <0x4700 0x100>; |
| 571 | compatible = "qcom,qpnp-regulator"; |
| 572 | status = "disabled"; |
| 573 | }; |
| 574 | |
| 575 | regulator@4800 { |
| 576 | regulator-name = "8644_l9"; |
| 577 | reg = <0x4800 0x100>; |
| 578 | compatible = "qcom,qpnp-regulator"; |
| 579 | status = "disabled"; |
| 580 | }; |
| 581 | |
| 582 | regulator@4900 { |
| 583 | regulator-name = "8644_l10"; |
| 584 | reg = <0x4900 0x100>; |
| 585 | compatible = "qcom,qpnp-regulator"; |
| 586 | status = "disabled"; |
| 587 | }; |
| 588 | |
| 589 | regulator@4a00 { |
| 590 | regulator-name = "8644_l11"; |
| 591 | reg = <0x4a00 0x100>; |
| 592 | compatible = "qcom,qpnp-regulator"; |
| 593 | status = "disabled"; |
| 594 | }; |
| 595 | |
| 596 | regulator@4b00 { |
| 597 | regulator-name = "8644_l12"; |
| 598 | reg = <0x4b00 0x100>; |
| 599 | compatible = "qcom,qpnp-regulator"; |
| 600 | status = "disabled"; |
| 601 | }; |
| 602 | |
| 603 | regulator@4c00 { |
| 604 | regulator-name = "8644_l13"; |
| 605 | reg = <0x4c00 0x100>; |
| 606 | compatible = "qcom,qpnp-regulator"; |
| 607 | status = "disabled"; |
| 608 | }; |
| 609 | |
| 610 | regulator@4d00 { |
| 611 | regulator-name = "8644_l14"; |
| 612 | reg = <0x4d00 0x100>; |
| 613 | compatible = "qcom,qpnp-regulator"; |
| 614 | status = "disabled"; |
| 615 | }; |
| 616 | |
| 617 | regulator@4e00 { |
| 618 | regulator-name = "8644_l15"; |
| 619 | reg = <0x4e00 0x100>; |
| 620 | compatible = "qcom,qpnp-regulator"; |
| 621 | status = "disabled"; |
| 622 | }; |
| 623 | |
| 624 | regulator@4f00 { |
| 625 | regulator-name = "8644_l16"; |
| 626 | reg = <0x4f00 0x100>; |
| 627 | compatible = "qcom,qpnp-regulator"; |
| 628 | status = "disabled"; |
| 629 | }; |
| 630 | |
| 631 | regulator@5000 { |
| 632 | regulator-name = "8644_l17"; |
| 633 | reg = <0x5000 0x100>; |
| 634 | compatible = "qcom,qpnp-regulator"; |
| 635 | status = "disabled"; |
| 636 | }; |
| 637 | |
| 638 | regulator@5100 { |
| 639 | regulator-name = "8644_l18"; |
| 640 | reg = <0x5100 0x100>; |
| 641 | compatible = "qcom,qpnp-regulator"; |
| 642 | status = "disabled"; |
| 643 | }; |
| 644 | |
| 645 | regulator@5200 { |
| 646 | regulator-name = "8644_l19"; |
| 647 | reg = <0x5200 0x100>; |
| 648 | compatible = "qcom,qpnp-regulator"; |
| 649 | status = "disabled"; |
| 650 | }; |
| 651 | |
| 652 | regulator@5300 { |
| 653 | regulator-name = "8644_l20"; |
| 654 | reg = <0x5300 0x100>; |
| 655 | compatible = "qcom,qpnp-regulator"; |
| 656 | status = "disabled"; |
| 657 | }; |
| 658 | |
| 659 | regulator@5400 { |
| 660 | regulator-name = "8644_l21"; |
| 661 | reg = <0x5400 0x100>; |
| 662 | compatible = "qcom,qpnp-regulator"; |
| 663 | status = "disabled"; |
| 664 | }; |
| 665 | |
| 666 | regulator@5500 { |
| 667 | regulator-name = "8644_l22"; |
| 668 | reg = <0x5500 0x100>; |
| 669 | compatible = "qcom,qpnp-regulator"; |
| 670 | status = "disabled"; |
| 671 | }; |
| 672 | |
| 673 | regulator@5600 { |
| 674 | regulator-name = "8644_l23"; |
| 675 | reg = <0x5600 0x100>; |
| 676 | compatible = "qcom,qpnp-regulator"; |
| 677 | status = "disabled"; |
| 678 | }; |
| 679 | |
| 680 | regulator@5700 { |
| 681 | regulator-name = "8644_l24"; |
| 682 | reg = <0x5700 0x100>; |
| 683 | compatible = "qcom,qpnp-regulator"; |
| 684 | status = "disabled"; |
| 685 | }; |
| 686 | |
| 687 | regulator@5800 { |
| 688 | regulator-name = "8644_l25"; |
| 689 | reg = <0x5800 0x100>; |
| 690 | compatible = "qcom,qpnp-regulator"; |
| 691 | status = "disabled"; |
| 692 | }; |
| 693 | |
| 694 | regulator@8000 { |
| 695 | regulator-name = "8644_lvs1"; |
| 696 | reg = <0x8000 0x100>; |
| 697 | compatible = "qcom,qpnp-regulator"; |
| 698 | status = "disabled"; |
| 699 | }; |
| 700 | |
| 701 | regulator@8100 { |
| 702 | regulator-name = "8644_lvs2"; |
| 703 | reg = <0x8100 0x100>; |
| 704 | compatible = "qcom,qpnp-regulator"; |
| 705 | status = "disabled"; |
| 706 | }; |
| 707 | |
| 708 | regulator@8200 { |
| 709 | regulator-name = "8644_mvs1"; |
| 710 | reg = <0x8200 0x100>; |
| 711 | compatible = "qcom,qpnp-regulator"; |
| 712 | status = "disabled"; |
| 713 | }; |
| 714 | |
| 715 | regulator@8300 { |
| 716 | regulator-name = "8644_mvs2"; |
| 717 | reg = <0x8300 0x100>; |
| 718 | compatible = "qcom,qpnp-regulator"; |
| 719 | status = "disabled"; |
| 720 | }; |
| 721 | }; |
| Ravi Kumar V | 605f1cd | 2012-09-10 20:43:17 +0530 | [diff] [blame] | 722 | }; |