Documentation/devicetree/bindings/usb/msm-hsusb.txt

MSM SoC HSUSB controllers

OTG:

Required properties :
- compatible : should be "qcom,hsusb-otg"
- regs : offset and length of the register set in the memory map
- interrupts: IRQ line
- qcom,hsusb-otg-phy-type: PHY type can be one of
            1 - Chipidea 45nm PHY
	    2 - Synopsis 28nm PHY
- qcom,hsusb-otg-mode: Operational mode. Can be one of
            1 - Peripheral only mode
	    2 - Host only mode
	    3 - OTG mode
	    Based on the mode, OTG driver registers platform devices for
	    gadget and host.
- qcom,hsusb-otg-control: OTG control (VBUS and ID notifications)
  can be one of
            1 - PHY control
	    2 - PMIC control
	    3 - User control (via debugfs)
- qcom,hsusb-otg-disable-reset: It present then core is RESET only during
	    init, otherwise core is RESET for every cable disconnect as well

Optional properties :
- qcom,hsusb-otg-default-mode: The default USB mode after boot-up.
  Applicable only when OTG is controlled by user. Can be one of
            0 - None. Low power mode
            1 - Peripheral
	    2 - Host
- qcom,hsusb-otg-phy-init-seq: PHY configuration sequence. val, reg pairs
  terminate with -1
- qcom,hsusb-otg-power-budget: VBUS power budget in mA
  0 will be treated as 500mA
- qcom,hsusb-otg-pclk-src-name: The source of pclk
- qcom,hsusb-otg-pmic-id-irq: ID, routed to PMIC IRQ number

Example HSUSB OTG controller device node :
	usb@f9690000 {
		compatible = "qcom,hsusb-otg";
		reg = <0xf9690000 0x400>;
		interrupts = <134>;

		qcom,hsusb-otg-phy-type = <2>;
		qcom,hsusb-otg-mode = <1>;
		qcom,hsusb-otg-otg-control = <1>;
		qcom,hsusb-otg-disable-reset;
		qcom,hsusb-otg-default-mode = <2>;
		qcom,hsusb-otg-phy-init-seq = <0x01 0x90 0xffffffff>;
		qcom,hsusb-otg-power-budget = <500>;
		qcom,hsusb-otg-pclk-src-name = "dfab_usb_clk";
		qcom,hsusb-otg-pmic-id-irq = <47>
	};

BAM:

Required properties:
- compatible: should be "qcom,usb-bam-msm"
- reg  : pairs of physical base addresses and region sizes
            of all the memory mapped BAM devices present
- reg-names : Register region name(s) referenced in reg above
            SSUSB BAM expects "ssusb" and "hsusb" for HSSUB BAM.
            Specify "qscratch_ram1_reg" to provide QSCRATCH's RAM1
            register to control USB3 private memory for uses as BAM FIFOs.
- interrupts: IRQ lines for BAM devices
- interrupt-names: BAM interrupt name(s) referenced in interrupts above
            SSUSB BAM expects "ssusb" and "hsusb" for HSSUB BAM
- qcom,usb-active-bam: active BAM type. Can be one of
            0 - SSUSB_BAM
            1 - HSUSB_BAM
            2 - HSIC_BAM
- qcom,usb-total-bam-num: total number of BAMs that are supported
- qcom,usb-bam-num-pipes: max number of pipes that can be used
- qcom,usb-base-address: physical base address of the BAM

A number of USB BAM pipe parameters are represented as sub-nodes:

Subnode Required:
- label: a string describing the pipe's direction and BAM instance under use
- qcom,usb-bam-type: BAM type. Can be one of
            0 - SSUSB_BAM
            1 - HSUSB_BAM
            2 - HSIC_BAM
- qcom,usb-bam-mem-type: Type of memory used by this PIPE. Can be one of
            0 - Uses SPS's dedicated pipe memory
            1 - USB's private memory residing @ 'qcom,usb-base-address'
            2 - System RAM allocated by driver
- qcom,src-bam-physical-address: source BAM physical address
- qcom,src-bam-pipe-index: source BAM pipe index
- qcom,dst-bam-physical-address: destination BAM physical address
- qcom,dst-bam-pipe-index: destination BAM pipe index
- qcom,data-fifo-offset: data fifo offset address
- qcom,data-fifo-size: data fifo size
- qcom,descriptor-fifo-offset: descriptor fifo offset address
- qcom,descriptor-fifo-size: descriptor fifo size

Optional properties :
- qcom,ignore-core-reset-ack: If present then BAM ignores ACK from USB core
	    while performing PIPE RESET

Example USB BAM controller device node:

	qcom,usbbam@f9304000 {
		compatible = "qcom,usb-bam-msm";
		reg = <0xf9304000 0x5000>,
		      <0xf9a44000 0x11000>,
		      <0xf92f880c 0x4>;
		reg-names = "ssusb", "hsusb", "qscratch_ram1_reg";
		interrupts = <0 132 0 0 135 0>;
		interrupt-names = "ssusb", "hsusb";
		qcom,usb-active-bam = <0>;
		qcom,usb-total-bam-num = <2>;
		qcom,usb-bam-num-pipes = <16>;
		qcom,usb-base-address = <0xf9200000>;
		qcom,ignore-core-reset-ack;

		qcom,pipe1 {
			label = "usb-to-peri-qdss-dwc3";
			qcom,usb-bam-type = <0>;
			qcom,usb-bam-mem-type = <1>;
			qcom,src-bam-physical-address = <0>;
			qcom,src-bam-pipe-index = <0>;
			qcom,dst-bam-physical-address = <0>;
			qcom,dst-bam-pipe-index = <0>;
			qcom,data-fifo-offset = <0>;
			qcom,data-fifo-size = <0>;
			qcom,descriptor-fifo-offset = <0>;
			qcom,descriptor-fifo-size = <0>;
		};

		qcom,pipe2 {
			label = "peri-to-usb-qdss-dwc3";
			qcom,usb-bam-type = <0>;
			qcom,usb-bam-mem-type = <1>;
			qcom,src-bam-physical-address = <0xfc37C000>;
			qcom,src-bam-pipe-index = <0>;
			qcom,dst-bam-physical-address = <0xf9304000>;
			qcom,dst-bam-pipe-index = <2>;
			qcom,data-fifo-offset = <0xf0000>;
			qcom,data-fifo-size = <0x4000>;
			qcom,descriptor-fifo-offset = <0xf4000>;
			qcom,descriptor-fifo-size = <0x1400>;
		};

		qcom,pipe3 {
			label = "usb-to-peri-qdss-hsusb";
			qcom,usb-bam-type = <1>;
			qcom,usb-bam-mem-type = <1>;
			qcom,src-bam-physical-address = <0>;
			qcom,src-bam-pipe-index = <0>;
			qcom,dst-bam-physical-address = <0>;
			qcom,dst-bam-pipe-index = <0>;
			qcom,data-fifo-offset = <0>;
			qcom,data-fifo-size = <0>;
			qcom,descriptor-fifo-offset = <0>;
			qcom,descriptor-fifo-size = <0>;
		};

		qcom,pipe4 {
			label = "peri-to-usb-qdss-hsusb";
			qcom,usb-bam-type = <1>;
			qcom,usb-bam-mem-type = <1>;
			qcom,src-bam-physical-address = <0xfc37c000>;
			qcom,src-bam-pipe-index = <0>;
			qcom,dst-bam-physical-address = <0xf9a44000>;
			qcom,dst-bam-pipe-index = <2>;
			qcom,data-fifo-offset = <0xf4000>;
			qcom,data-fifo-size = <0x1000>;
			qcom,descriptor-fifo-offset = <0xf5000>;
			qcom,descriptor-fifo-size = <0x400>;
		};
	};