Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* drivers/video/s1d13xxxfb.c |
| 2 | * |
| 3 | * (c) 2004 Simtec Electronics |
| 4 | * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org> |
| 5 | * |
| 6 | * Driver for Epson S1D13xxx series framebuffer chips |
| 7 | * |
| 8 | * Adapted from |
| 9 | * linux/drivers/video/skeletonfb.c |
| 10 | * linux/drivers/video/epson1355fb.c |
| 11 | * linux/drivers/video/epson/s1d13xxxfb.c (2.4 driver by Epson) |
| 12 | * |
| 13 | * Note, currently only tested on S1D13806 with 16bit CRT. |
| 14 | * As such, this driver might still contain some hardcoded bits relating to |
| 15 | * S1D13806. |
| 16 | * Making it work on other S1D13XXX chips should merely be a matter of adding |
| 17 | * a few switch()s, some missing glue here and there maybe, and split header |
| 18 | * files. |
| 19 | * |
| 20 | * TODO: - handle dual screen display (CRT and LCD at the same time). |
| 21 | * - check_var(), mode change, etc. |
| 22 | * - PM untested. |
| 23 | * - Accelerated interfaces. |
| 24 | * - Probably not SMP safe :) |
| 25 | * |
| 26 | * This file is subject to the terms and conditions of the GNU General Public |
| 27 | * License. See the file COPYING in the main directory of this archive for |
| 28 | * more details. |
| 29 | */ |
| 30 | |
| 31 | #include <linux/config.h> |
| 32 | #include <linux/module.h> |
| 33 | #include <linux/device.h> |
| 34 | #include <linux/delay.h> |
| 35 | |
| 36 | #include <linux/types.h> |
| 37 | #include <linux/errno.h> |
| 38 | #include <linux/mm.h> |
| 39 | #include <linux/mman.h> |
| 40 | #include <linux/fb.h> |
| 41 | |
| 42 | #include <asm/io.h> |
| 43 | |
| 44 | #include <video/s1d13xxxfb.h> |
| 45 | |
| 46 | #define PFX "s1d13xxxfb: " |
| 47 | |
| 48 | #if 0 |
| 49 | #define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0) |
| 50 | #else |
| 51 | #define dbg(fmt, args...) do { } while (0) |
| 52 | #endif |
| 53 | |
| 54 | /* |
| 55 | * Here we define the default struct fb_fix_screeninfo |
| 56 | */ |
| 57 | static struct fb_fix_screeninfo __devinitdata s1d13xxxfb_fix = { |
| 58 | .id = S1D_FBID, |
| 59 | .type = FB_TYPE_PACKED_PIXELS, |
| 60 | .visual = FB_VISUAL_PSEUDOCOLOR, |
| 61 | .xpanstep = 0, |
| 62 | .ypanstep = 1, |
| 63 | .ywrapstep = 0, |
| 64 | .accel = FB_ACCEL_NONE, |
| 65 | }; |
| 66 | |
| 67 | static inline u8 |
| 68 | s1d13xxxfb_readreg(struct s1d13xxxfb_par *par, u16 regno) |
| 69 | { |
| 70 | return readb(par->regs + regno); |
| 71 | } |
| 72 | |
| 73 | static inline void |
| 74 | s1d13xxxfb_writereg(struct s1d13xxxfb_par *par, u16 regno, u8 value) |
| 75 | { |
| 76 | writeb(value, par->regs + regno); |
| 77 | } |
| 78 | |
| 79 | static inline void |
| 80 | s1d13xxxfb_runinit(struct s1d13xxxfb_par *par, |
| 81 | const struct s1d13xxxfb_regval *initregs, |
| 82 | const unsigned int size) |
| 83 | { |
| 84 | int i; |
| 85 | |
| 86 | for (i = 0; i < size; i++) { |
| 87 | if ((initregs[i].addr == S1DREG_DELAYOFF) || |
| 88 | (initregs[i].addr == S1DREG_DELAYON)) |
| 89 | mdelay((int)initregs[i].value); |
| 90 | else { |
| 91 | s1d13xxxfb_writereg(par, initregs[i].addr, initregs[i].value); |
| 92 | } |
| 93 | } |
| 94 | |
| 95 | /* make sure the hardware can cope with us */ |
| 96 | mdelay(1); |
| 97 | } |
| 98 | |
| 99 | static inline void |
| 100 | lcd_enable(struct s1d13xxxfb_par *par, int enable) |
| 101 | { |
| 102 | u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE); |
| 103 | |
| 104 | if (enable) |
| 105 | mode |= 0x01; |
| 106 | else |
| 107 | mode &= ~0x01; |
| 108 | |
| 109 | s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode); |
| 110 | } |
| 111 | |
| 112 | static inline void |
| 113 | crt_enable(struct s1d13xxxfb_par *par, int enable) |
| 114 | { |
| 115 | u8 mode = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE); |
| 116 | |
| 117 | if (enable) |
| 118 | mode |= 0x02; |
| 119 | else |
| 120 | mode &= ~0x02; |
| 121 | |
| 122 | s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, mode); |
| 123 | } |
| 124 | |
| 125 | /* framebuffer control routines */ |
| 126 | |
| 127 | static inline void |
| 128 | s1d13xxxfb_setup_pseudocolour(struct fb_info *info) |
| 129 | { |
| 130 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; |
| 131 | |
| 132 | info->var.red.length = 4; |
| 133 | info->var.green.length = 4; |
| 134 | info->var.blue.length = 4; |
| 135 | } |
| 136 | |
| 137 | static inline void |
| 138 | s1d13xxxfb_setup_truecolour(struct fb_info *info) |
| 139 | { |
| 140 | info->fix.visual = FB_VISUAL_TRUECOLOR; |
| 141 | info->var.bits_per_pixel = 16; |
| 142 | |
| 143 | info->var.red.length = 5; |
| 144 | info->var.red.offset = 11; |
| 145 | |
| 146 | info->var.green.length = 6; |
| 147 | info->var.green.offset = 5; |
| 148 | |
| 149 | info->var.blue.length = 5; |
| 150 | info->var.blue.offset = 0; |
| 151 | } |
| 152 | |
| 153 | /** |
| 154 | * s1d13xxxfb_set_par - Alters the hardware state. |
| 155 | * @info: frame buffer structure |
| 156 | * |
| 157 | * Using the fb_var_screeninfo in fb_info we set the depth of the |
| 158 | * framebuffer. This function alters the par AND the |
| 159 | * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in |
| 160 | * fb_info since we are using that data. This means we depend on the |
| 161 | * data in var inside fb_info to be supported by the hardware. |
| 162 | * xxxfb_check_var is always called before xxxfb_set_par to ensure this. |
| 163 | * |
| 164 | * XXX TODO: write proper s1d13xxxfb_check_var(), without which that |
| 165 | * function is quite useless. |
| 166 | */ |
| 167 | static int |
| 168 | s1d13xxxfb_set_par(struct fb_info *info) |
| 169 | { |
| 170 | struct s1d13xxxfb_par *s1dfb = info->par; |
| 171 | unsigned int val; |
| 172 | |
| 173 | dbg("s1d13xxxfb_set_par: bpp=%d\n", info->var.bits_per_pixel); |
| 174 | |
| 175 | if ((s1dfb->display & 0x01)) /* LCD */ |
| 176 | val = s1d13xxxfb_readreg(s1dfb, S1DREG_LCD_DISP_MODE); /* read colour control */ |
| 177 | else /* CRT */ |
| 178 | val = s1d13xxxfb_readreg(s1dfb, S1DREG_CRT_DISP_MODE); /* read colour control */ |
| 179 | |
| 180 | val &= ~0x07; |
| 181 | |
| 182 | switch (info->var.bits_per_pixel) { |
| 183 | case 4: |
| 184 | dbg("pseudo colour 4\n"); |
| 185 | s1d13xxxfb_setup_pseudocolour(info); |
| 186 | val |= 2; |
| 187 | break; |
| 188 | case 8: |
| 189 | dbg("pseudo colour 8\n"); |
| 190 | s1d13xxxfb_setup_pseudocolour(info); |
| 191 | val |= 3; |
| 192 | break; |
| 193 | case 16: |
| 194 | dbg("true colour\n"); |
| 195 | s1d13xxxfb_setup_truecolour(info); |
| 196 | val |= 5; |
| 197 | break; |
| 198 | |
| 199 | default: |
| 200 | dbg("bpp not supported!\n"); |
| 201 | return -EINVAL; |
| 202 | } |
| 203 | |
| 204 | dbg("writing %02x to display mode register\n", val); |
| 205 | |
| 206 | if ((s1dfb->display & 0x01)) /* LCD */ |
| 207 | s1d13xxxfb_writereg(s1dfb, S1DREG_LCD_DISP_MODE, val); |
| 208 | else /* CRT */ |
| 209 | s1d13xxxfb_writereg(s1dfb, S1DREG_CRT_DISP_MODE, val); |
| 210 | |
| 211 | info->fix.line_length = info->var.xres * info->var.bits_per_pixel; |
| 212 | info->fix.line_length /= 8; |
| 213 | |
| 214 | dbg("setting line_length to %d\n", info->fix.line_length); |
| 215 | |
| 216 | dbg("done setup\n"); |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | |
| 221 | /** |
| 222 | * s1d13xxxfb_setcolreg - sets a color register. |
| 223 | * @regno: Which register in the CLUT we are programming |
| 224 | * @red: The red value which can be up to 16 bits wide |
| 225 | * @green: The green value which can be up to 16 bits wide |
| 226 | * @blue: The blue value which can be up to 16 bits wide. |
| 227 | * @transp: If supported the alpha value which can be up to 16 bits wide. |
| 228 | * @info: frame buffer info structure |
| 229 | * |
| 230 | * Returns negative errno on error, or zero on success. |
| 231 | */ |
| 232 | static int |
| 233 | s1d13xxxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, |
| 234 | u_int transp, struct fb_info *info) |
| 235 | { |
| 236 | struct s1d13xxxfb_par *s1dfb = info->par; |
| 237 | unsigned int pseudo_val; |
| 238 | |
| 239 | if (regno >= S1D_PALETTE_SIZE) |
| 240 | return -EINVAL; |
| 241 | |
| 242 | dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n", |
| 243 | regno, red, green, blue, transp); |
| 244 | |
| 245 | if (info->var.grayscale) |
| 246 | red = green = blue = (19595*red + 38470*green + 7471*blue) >> 16; |
| 247 | |
| 248 | switch (info->fix.visual) { |
| 249 | case FB_VISUAL_TRUECOLOR: |
| 250 | if (regno >= 16) |
| 251 | return -EINVAL; |
| 252 | |
| 253 | /* deal with creating pseudo-palette entries */ |
| 254 | |
| 255 | pseudo_val = (red >> 11) << info->var.red.offset; |
| 256 | pseudo_val |= (green >> 10) << info->var.green.offset; |
| 257 | pseudo_val |= (blue >> 11) << info->var.blue.offset; |
| 258 | |
| 259 | dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n", |
| 260 | regno, pseudo_val); |
| 261 | |
| 262 | ((u32 *)info->pseudo_palette)[regno] = pseudo_val; |
| 263 | |
| 264 | break; |
| 265 | case FB_VISUAL_PSEUDOCOLOR: |
| 266 | s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_ADDR, regno); |
| 267 | s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, red); |
| 268 | s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, green); |
| 269 | s1d13xxxfb_writereg(s1dfb, S1DREG_LKUP_DATA, blue); |
| 270 | |
| 271 | break; |
| 272 | default: |
| 273 | return -ENOSYS; |
| 274 | } |
| 275 | |
| 276 | dbg("s1d13xxxfb_setcolreg: done\n"); |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | /** |
| 282 | * s1d13xxxfb_blank - blanks the display. |
| 283 | * @blank_mode: the blank mode we want. |
| 284 | * @info: frame buffer structure that represents a single frame buffer |
| 285 | * |
| 286 | * Blank the screen if blank_mode != 0, else unblank. Return 0 if |
| 287 | * blanking succeeded, != 0 if un-/blanking failed due to e.g. a |
| 288 | * video mode which doesn't support it. Implements VESA suspend |
| 289 | * and powerdown modes on hardware that supports disabling hsync/vsync: |
| 290 | * blank_mode == 2: suspend vsync |
| 291 | * blank_mode == 3: suspend hsync |
| 292 | * blank_mode == 4: powerdown |
| 293 | * |
| 294 | * Returns negative errno on error, or zero on success. |
| 295 | */ |
| 296 | static int |
| 297 | s1d13xxxfb_blank(int blank_mode, struct fb_info *info) |
| 298 | { |
| 299 | struct s1d13xxxfb_par *par = info->par; |
| 300 | |
| 301 | dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode, info); |
| 302 | |
| 303 | switch (blank_mode) { |
| 304 | case FB_BLANK_UNBLANK: |
| 305 | case FB_BLANK_NORMAL: |
| 306 | if ((par->display & 0x01) != 0) |
| 307 | lcd_enable(par, 1); |
| 308 | if ((par->display & 0x02) != 0) |
| 309 | crt_enable(par, 1); |
| 310 | break; |
| 311 | case FB_BLANK_VSYNC_SUSPEND: |
| 312 | case FB_BLANK_HSYNC_SUSPEND: |
| 313 | break; |
| 314 | case FB_BLANK_POWERDOWN: |
| 315 | lcd_enable(par, 0); |
| 316 | crt_enable(par, 0); |
| 317 | break; |
| 318 | default: |
| 319 | return -EINVAL; |
| 320 | } |
| 321 | |
| 322 | /* let fbcon do a soft blank for us */ |
| 323 | return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0); |
| 324 | } |
| 325 | |
| 326 | /** |
| 327 | * s1d13xxxfb_pan_display - Pans the display. |
| 328 | * @var: frame buffer variable screen structure |
| 329 | * @info: frame buffer structure that represents a single frame buffer |
| 330 | * |
| 331 | * Pan (or wrap, depending on the `vmode' field) the display using the |
| 332 | * `yoffset' field of the `var' structure (`xoffset' not yet supported). |
| 333 | * If the values don't fit, return -EINVAL. |
| 334 | * |
| 335 | * Returns negative errno on error, or zero on success. |
| 336 | */ |
| 337 | static int |
| 338 | s1d13xxxfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) |
| 339 | { |
| 340 | struct s1d13xxxfb_par *par = info->par; |
| 341 | u32 start; |
| 342 | |
| 343 | if (var->xoffset != 0) /* not yet ... */ |
| 344 | return -EINVAL; |
| 345 | |
| 346 | if (var->yoffset + info->var.yres > info->var.yres_virtual) |
| 347 | return -EINVAL; |
| 348 | |
| 349 | start = (info->fix.line_length >> 1) * var->yoffset; |
| 350 | |
| 351 | if ((par->display & 0x01)) { |
| 352 | /* LCD */ |
| 353 | s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START0, (start & 0xff)); |
| 354 | s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START1, ((start >> 8) & 0xff)); |
| 355 | s1d13xxxfb_writereg(par, S1DREG_LCD_DISP_START2, ((start >> 16) & 0x0f)); |
| 356 | } else { |
| 357 | /* CRT */ |
| 358 | s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START0, (start & 0xff)); |
| 359 | s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START1, ((start >> 8) & 0xff)); |
| 360 | s1d13xxxfb_writereg(par, S1DREG_CRT_DISP_START2, ((start >> 16) & 0x0f)); |
| 361 | } |
| 362 | |
| 363 | return 0; |
| 364 | } |
| 365 | |
| 366 | |
| 367 | /* framebuffer information structures */ |
| 368 | |
| 369 | static struct fb_ops s1d13xxxfb_fbops = { |
| 370 | .owner = THIS_MODULE, |
| 371 | .fb_set_par = s1d13xxxfb_set_par, |
| 372 | .fb_setcolreg = s1d13xxxfb_setcolreg, |
| 373 | .fb_blank = s1d13xxxfb_blank, |
| 374 | |
| 375 | .fb_pan_display = s1d13xxxfb_pan_display, |
| 376 | |
| 377 | /* to be replaced by any acceleration we can */ |
| 378 | .fb_fillrect = cfb_fillrect, |
| 379 | .fb_copyarea = cfb_copyarea, |
| 380 | .fb_imageblit = cfb_imageblit, |
| 381 | .fb_cursor = soft_cursor |
| 382 | }; |
| 383 | |
| 384 | static int s1d13xxxfb_width_tab[2][4] __devinitdata = { |
| 385 | {4, 8, 16, -1}, |
| 386 | {9, 12, 18, -1}, |
| 387 | }; |
| 388 | |
| 389 | /** |
| 390 | * s1d13xxxfb_fetch_hw_state - Configure the framebuffer according to |
| 391 | * hardware setup. |
| 392 | * @info: frame buffer structure |
| 393 | * |
| 394 | * We setup the framebuffer structures according to the current |
| 395 | * hardware setup. On some machines, the BIOS will have filled |
| 396 | * the chip registers with such info, on others, these values will |
| 397 | * have been written in some init procedure. In any case, the |
| 398 | * software values needs to match the hardware ones. This is what |
| 399 | * this function ensures. |
| 400 | * |
| 401 | * Note: some of the hardcoded values here might need some love to |
| 402 | * work on various chips, and might need to no longer be hardcoded. |
| 403 | */ |
| 404 | static void __devinit |
| 405 | s1d13xxxfb_fetch_hw_state(struct fb_info *info) |
| 406 | { |
| 407 | struct fb_var_screeninfo *var = &info->var; |
| 408 | struct fb_fix_screeninfo *fix = &info->fix; |
| 409 | struct s1d13xxxfb_par *par = info->par; |
| 410 | u8 panel, display; |
| 411 | u16 offset; |
| 412 | u32 xres, yres; |
| 413 | u32 xres_virtual, yres_virtual; |
| 414 | int bpp, lcd_bpp; |
| 415 | int is_color, is_dual, is_tft; |
| 416 | int lcd_enabled, crt_enabled; |
| 417 | |
| 418 | fix->type = FB_TYPE_PACKED_PIXELS; |
| 419 | |
| 420 | /* general info */ |
| 421 | par->display = s1d13xxxfb_readreg(par, S1DREG_COM_DISP_MODE); |
| 422 | crt_enabled = (par->display & 0x02) != 0; |
| 423 | lcd_enabled = (par->display & 0x01) != 0; |
| 424 | |
| 425 | if (lcd_enabled && crt_enabled) |
| 426 | printk(KERN_WARNING PFX "Warning: LCD and CRT detected, using LCD\n"); |
| 427 | |
| 428 | if (lcd_enabled) |
| 429 | display = s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_MODE); |
| 430 | else /* CRT */ |
| 431 | display = s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_MODE); |
| 432 | |
| 433 | bpp = display & 0x07; |
| 434 | |
| 435 | switch (bpp) { |
| 436 | case 2: /* 4 bpp */ |
| 437 | case 3: /* 8 bpp */ |
| 438 | var->bits_per_pixel = 8; |
| 439 | var->red.offset = var->green.offset = var->blue.offset = 0; |
| 440 | var->red.length = var->green.length = var->blue.length = 8; |
| 441 | break; |
| 442 | case 5: /* 16 bpp */ |
| 443 | s1d13xxxfb_setup_truecolour(info); |
| 444 | break; |
| 445 | default: |
| 446 | dbg("bpp: %i\n", bpp); |
| 447 | } |
| 448 | fb_alloc_cmap(&info->cmap, 256, 0); |
| 449 | |
| 450 | /* LCD info */ |
| 451 | panel = s1d13xxxfb_readreg(par, S1DREG_PANEL_TYPE); |
| 452 | is_color = (panel & 0x04) != 0; |
| 453 | is_dual = (panel & 0x02) != 0; |
| 454 | is_tft = (panel & 0x01) != 0; |
| 455 | lcd_bpp = s1d13xxxfb_width_tab[is_tft][(panel >> 4) & 3]; |
| 456 | |
| 457 | if (lcd_enabled) { |
| 458 | xres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_HWIDTH) + 1) * 8; |
| 459 | yres = (s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT0) + |
| 460 | ((s1d13xxxfb_readreg(par, S1DREG_LCD_DISP_VHEIGHT1) & 0x03) << 8) + 1); |
| 461 | |
| 462 | offset = (s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF0) + |
| 463 | ((s1d13xxxfb_readreg(par, S1DREG_LCD_MEM_OFF1) & 0x7) << 8)); |
| 464 | } else { /* crt */ |
| 465 | xres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_HWIDTH) + 1) * 8; |
| 466 | yres = (s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT0) + |
| 467 | ((s1d13xxxfb_readreg(par, S1DREG_CRT_DISP_VHEIGHT1) & 0x03) << 8) + 1); |
| 468 | |
| 469 | offset = (s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF0) + |
| 470 | ((s1d13xxxfb_readreg(par, S1DREG_CRT_MEM_OFF1) & 0x7) << 8)); |
| 471 | } |
| 472 | xres_virtual = offset * 16 / var->bits_per_pixel; |
| 473 | yres_virtual = fix->smem_len / (offset * 2); |
| 474 | |
| 475 | var->xres = xres; |
| 476 | var->yres = yres; |
| 477 | var->xres_virtual = xres_virtual; |
| 478 | var->yres_virtual = yres_virtual; |
| 479 | var->xoffset = var->yoffset = 0; |
| 480 | |
| 481 | fix->line_length = offset * 2; |
| 482 | |
| 483 | var->grayscale = !is_color; |
| 484 | |
| 485 | var->activate = FB_ACTIVATE_NOW; |
| 486 | |
| 487 | dbg(PFX "bpp=%d, lcd_bpp=%d, " |
| 488 | "crt_enabled=%d, lcd_enabled=%d\n", |
| 489 | var->bits_per_pixel, lcd_bpp, crt_enabled, lcd_enabled); |
| 490 | dbg(PFX "xres=%d, yres=%d, vxres=%d, vyres=%d " |
| 491 | "is_color=%d, is_dual=%d, is_tft=%d\n", |
| 492 | xres, yres, xres_virtual, yres_virtual, is_color, is_dual, is_tft); |
| 493 | } |
| 494 | |
| 495 | |
Andrew Morton | 27f931d | 2005-06-21 17:16:55 -0700 | [diff] [blame] | 496 | static int |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | s1d13xxxfb_remove(struct device *dev) |
| 498 | { |
| 499 | struct fb_info *info = dev_get_drvdata(dev); |
| 500 | struct platform_device *pdev = to_platform_device(dev); |
| 501 | struct s1d13xxxfb_par *par = NULL; |
| 502 | |
| 503 | if (info) { |
| 504 | par = info->par; |
| 505 | if (par && par->regs) { |
| 506 | /* disable output & enable powersave */ |
| 507 | s1d13xxxfb_writereg(par, S1DREG_COM_DISP_MODE, 0x00); |
| 508 | s1d13xxxfb_writereg(par, S1DREG_PS_CNF, 0x11); |
| 509 | iounmap(par->regs); |
| 510 | } |
| 511 | |
| 512 | fb_dealloc_cmap(&info->cmap); |
| 513 | |
| 514 | if (info->screen_base) |
| 515 | iounmap(info->screen_base); |
| 516 | |
| 517 | framebuffer_release(info); |
| 518 | } |
| 519 | |
| 520 | release_mem_region(pdev->resource[0].start, |
| 521 | pdev->resource[0].end - pdev->resource[0].start +1); |
| 522 | release_mem_region(pdev->resource[1].start, |
| 523 | pdev->resource[1].end - pdev->resource[1].start +1); |
| 524 | return 0; |
| 525 | } |
| 526 | |
| 527 | static int __devinit |
| 528 | s1d13xxxfb_probe(struct device *dev) |
| 529 | { |
| 530 | struct platform_device *pdev = to_platform_device(dev); |
| 531 | struct s1d13xxxfb_par *default_par; |
| 532 | struct fb_info *info; |
| 533 | struct s1d13xxxfb_pdata *pdata = NULL; |
| 534 | int ret = 0; |
| 535 | u8 revision; |
| 536 | |
| 537 | dbg("probe called: device is %p\n", dev); |
| 538 | |
| 539 | printk(KERN_INFO "Epson S1D13XXX FB Driver\n"); |
| 540 | |
| 541 | /* enable platform-dependent hardware glue, if any */ |
| 542 | if (dev->platform_data) |
| 543 | pdata = dev->platform_data; |
| 544 | |
| 545 | if (pdata && pdata->platform_init_video) |
| 546 | pdata->platform_init_video(); |
| 547 | |
| 548 | |
| 549 | if (pdev->num_resources != 2) { |
| 550 | dev_err(&pdev->dev, "invalid num_resources: %i\n", |
| 551 | pdev->num_resources); |
| 552 | ret = -ENODEV; |
| 553 | goto bail; |
| 554 | } |
| 555 | |
| 556 | /* resource[0] is VRAM, resource[1] is registers */ |
| 557 | if (pdev->resource[0].flags != IORESOURCE_MEM |
| 558 | || pdev->resource[1].flags != IORESOURCE_MEM) { |
| 559 | dev_err(&pdev->dev, "invalid resource type\n"); |
| 560 | ret = -ENODEV; |
| 561 | goto bail; |
| 562 | } |
| 563 | |
| 564 | if (!request_mem_region(pdev->resource[0].start, |
| 565 | pdev->resource[0].end - pdev->resource[0].start +1, "s1d13xxxfb mem")) { |
| 566 | dev_dbg(dev, "request_mem_region failed\n"); |
| 567 | ret = -EBUSY; |
| 568 | goto bail; |
| 569 | } |
| 570 | |
| 571 | if (!request_mem_region(pdev->resource[1].start, |
| 572 | pdev->resource[1].end - pdev->resource[1].start +1, "s1d13xxxfb regs")) { |
| 573 | dev_dbg(dev, "request_mem_region failed\n"); |
| 574 | ret = -EBUSY; |
| 575 | goto bail; |
| 576 | } |
| 577 | |
| 578 | info = framebuffer_alloc(sizeof(struct s1d13xxxfb_par) + sizeof(u32) * 256, &pdev->dev); |
| 579 | if (!info) { |
| 580 | ret = -ENOMEM; |
| 581 | goto bail; |
| 582 | } |
| 583 | |
| 584 | default_par = info->par; |
| 585 | default_par->regs = ioremap_nocache(pdev->resource[1].start, |
| 586 | pdev->resource[1].end - pdev->resource[1].start +1); |
| 587 | if (!default_par->regs) { |
| 588 | printk(KERN_ERR PFX "unable to map registers\n"); |
| 589 | ret = -ENOMEM; |
| 590 | goto bail; |
| 591 | } |
| 592 | info->pseudo_palette = default_par->pseudo_palette; |
| 593 | |
| 594 | info->screen_base = ioremap_nocache(pdev->resource[0].start, |
| 595 | pdev->resource[0].end - pdev->resource[0].start +1); |
| 596 | |
| 597 | if (!info->screen_base) { |
| 598 | printk(KERN_ERR PFX "unable to map framebuffer\n"); |
| 599 | ret = -ENOMEM; |
| 600 | goto bail; |
| 601 | } |
| 602 | |
| 603 | revision = s1d13xxxfb_readreg(default_par, S1DREG_REV_CODE); |
| 604 | if ((revision >> 2) != S1D_CHIP_REV) { |
| 605 | printk(KERN_INFO PFX "chip not found: %i\n", (revision >> 2)); |
| 606 | ret = -ENODEV; |
| 607 | goto bail; |
| 608 | } |
| 609 | |
| 610 | info->fix = s1d13xxxfb_fix; |
| 611 | info->fix.mmio_start = pdev->resource[1].start; |
| 612 | info->fix.mmio_len = pdev->resource[1].end - pdev->resource[1].start +1; |
| 613 | info->fix.smem_start = pdev->resource[0].start; |
| 614 | info->fix.smem_len = pdev->resource[0].end - pdev->resource[0].start +1; |
| 615 | |
| 616 | printk(KERN_INFO PFX "regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n", |
| 617 | default_par->regs, info->fix.smem_len / 1024, info->screen_base); |
| 618 | |
| 619 | info->par = default_par; |
| 620 | info->fbops = &s1d13xxxfb_fbops; |
| 621 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 622 | |
| 623 | /* perform "manual" chip initialization, if needed */ |
| 624 | if (pdata && pdata->initregs) |
| 625 | s1d13xxxfb_runinit(info->par, pdata->initregs, pdata->initregssize); |
| 626 | |
| 627 | s1d13xxxfb_fetch_hw_state(info); |
| 628 | |
| 629 | if (register_framebuffer(info) < 0) { |
| 630 | ret = -EINVAL; |
| 631 | goto bail; |
| 632 | } |
| 633 | |
| 634 | dev_set_drvdata(&pdev->dev, info); |
| 635 | |
| 636 | printk(KERN_INFO "fb%d: %s frame buffer device\n", |
| 637 | info->node, info->fix.id); |
| 638 | |
| 639 | return 0; |
| 640 | |
| 641 | bail: |
| 642 | s1d13xxxfb_remove(dev); |
| 643 | return ret; |
| 644 | |
| 645 | } |
| 646 | |
| 647 | #ifdef CONFIG_PM |
| 648 | static int s1d13xxxfb_suspend(struct device *dev, u32 state, u32 level) |
| 649 | { |
| 650 | struct fb_info *info = dev_get_drvdata(dev); |
| 651 | struct s1d13xxxfb_par *s1dfb = info->par; |
| 652 | struct s1d13xxxfb_pdata *pdata = NULL; |
| 653 | |
| 654 | /* disable display */ |
| 655 | lcd_enable(s1dfb, 0); |
| 656 | crt_enable(s1dfb, 0); |
| 657 | |
| 658 | if (dev->platform_data) |
| 659 | pdata = dev->platform_data; |
| 660 | |
| 661 | #if 0 |
| 662 | if (!s1dfb->disp_save) |
| 663 | s1dfb->disp_save = kmalloc(info->fix.smem_len, GFP_KERNEL); |
| 664 | |
| 665 | if (!s1dfb->disp_save) { |
| 666 | printk(KERN_ERR PFX "no memory to save screen"); |
| 667 | return -ENOMEM; |
| 668 | } |
| 669 | |
| 670 | memcpy_fromio(s1dfb->disp_save, info->screen_base, info->fix.smem_len); |
| 671 | #else |
| 672 | s1dfb->disp_save = NULL; |
| 673 | #endif |
| 674 | |
| 675 | if (!s1dfb->regs_save) |
| 676 | s1dfb->regs_save = kmalloc(info->fix.mmio_len, GFP_KERNEL); |
| 677 | |
| 678 | if (!s1dfb->regs_save) { |
| 679 | printk(KERN_ERR PFX "no memory to save registers"); |
| 680 | return -ENOMEM; |
| 681 | } |
| 682 | |
| 683 | /* backup all registers */ |
| 684 | memcpy_fromio(s1dfb->regs_save, s1dfb->regs, info->fix.mmio_len); |
| 685 | |
| 686 | /* now activate power save mode */ |
| 687 | s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x11); |
| 688 | |
| 689 | if (pdata && pdata->platform_suspend_video) |
| 690 | return pdata->platform_suspend_video(); |
| 691 | else |
| 692 | return 0; |
| 693 | } |
| 694 | |
| 695 | static int s1d13xxxfb_resume(struct device *dev, u32 level) |
| 696 | { |
| 697 | struct fb_info *info = dev_get_drvdata(dev); |
| 698 | struct s1d13xxxfb_par *s1dfb = info->par; |
| 699 | struct s1d13xxxfb_pdata *pdata = NULL; |
| 700 | |
| 701 | if (level != RESUME_ENABLE) |
| 702 | return 0; |
| 703 | |
| 704 | /* awaken the chip */ |
| 705 | s1d13xxxfb_writereg(s1dfb, S1DREG_PS_CNF, 0x10); |
| 706 | |
| 707 | /* do not let go until SDRAM "wakes up" */ |
| 708 | while ((s1d13xxxfb_readreg(s1dfb, S1DREG_PS_STATUS) & 0x01)) |
| 709 | udelay(10); |
| 710 | |
| 711 | if (dev->platform_data) |
| 712 | pdata = dev->platform_data; |
| 713 | |
| 714 | if (s1dfb->regs_save) { |
| 715 | /* will write RO regs, *should* get away with it :) */ |
| 716 | memcpy_toio(s1dfb->regs, s1dfb->regs_save, info->fix.mmio_len); |
| 717 | kfree(s1dfb->regs_save); |
| 718 | } |
| 719 | |
| 720 | if (s1dfb->disp_save) { |
| 721 | memcpy_toio(info->screen_base, s1dfb->disp_save, |
| 722 | info->fix.smem_len); |
| 723 | kfree(s1dfb->disp_save); /* XXX kmalloc()'d when? */ |
| 724 | } |
| 725 | |
| 726 | if ((s1dfb->display & 0x01) != 0) |
| 727 | lcd_enable(s1dfb, 1); |
| 728 | if ((s1dfb->display & 0x02) != 0) |
| 729 | crt_enable(s1dfb, 1); |
| 730 | |
| 731 | if (pdata && pdata->platform_resume_video) |
| 732 | return pdata->platform_resume_video(); |
| 733 | else |
| 734 | return 0; |
| 735 | } |
| 736 | #endif /* CONFIG_PM */ |
| 737 | |
| 738 | static struct device_driver s1d13xxxfb_driver = { |
| 739 | .name = S1D_DEVICENAME, |
| 740 | .bus = &platform_bus_type, |
| 741 | .probe = s1d13xxxfb_probe, |
| 742 | .remove = s1d13xxxfb_remove, |
| 743 | #ifdef CONFIG_PM |
| 744 | .suspend = s1d13xxxfb_suspend, |
| 745 | .resume = s1d13xxxfb_resume |
| 746 | #endif |
| 747 | }; |
| 748 | |
| 749 | |
| 750 | static int __init |
| 751 | s1d13xxxfb_init(void) |
| 752 | { |
| 753 | if (fb_get_options("s1d13xxxfb", NULL)) |
| 754 | return -ENODEV; |
| 755 | |
| 756 | return driver_register(&s1d13xxxfb_driver); |
| 757 | } |
| 758 | |
| 759 | |
| 760 | static void __exit |
| 761 | s1d13xxxfb_exit(void) |
| 762 | { |
| 763 | driver_unregister(&s1d13xxxfb_driver); |
| 764 | } |
| 765 | |
| 766 | module_init(s1d13xxxfb_init); |
| 767 | module_exit(s1d13xxxfb_exit); |
| 768 | |
| 769 | |
| 770 | MODULE_LICENSE("GPL"); |
| 771 | MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices"); |
| 772 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>"); |