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gerrit-public.fairphone.software / kernel / msm / d4b2b8ce21e9b8fedafb746278e52cd600bbc782 / . / drivers / coresight / coresight-etm-cp14.c
blob: 9a6c13af1ce6f991048fa3bdeb842920cb3ca815 [file] [log] [blame]
Pratik Patele6e41da2012-09-12 12:50:29 -0700[diff] [blame]1/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <asm/hardware/cp14.h>
16
17static unsigned int etm_read_reg(uint32_t reg)
18{
19 switch (reg) {
20 case 0x0:
21 return etm_read(ETMCR);
22 case 0x1:
23 return etm_read(ETMCCR);
24 case 0x2:
25 return etm_read(ETMTRIGGER);
26 case 0x4:
27 return etm_read(ETMSR);
28 case 0x5:
29 return etm_read(ETMSCR);
30 case 0x6:
31 return etm_read(ETMTSSCR);
32 case 0x8:
33 return etm_read(ETMTEEVR);
34 case 0x9:
35 return etm_read(ETMTECR1);
36 case 0xB:
37 return etm_read(ETMFFLR);
38 case 0x10:
39 return etm_read(ETMACVR0);
40 case 0x11:
41 return etm_read(ETMACVR1);
42 case 0x12:
43 return etm_read(ETMACVR2);
44 case 0x13:
45 return etm_read(ETMACVR3);
46 case 0x14:
47 return etm_read(ETMACVR4);
48 case 0x15:
49 return etm_read(ETMACVR5);
50 case 0x16:
51 return etm_read(ETMACVR6);
52 case 0x17:
53 return etm_read(ETMACVR7);
54 case 0x18:
55 return etm_read(ETMACVR8);
56 case 0x19:
57 return etm_read(ETMACVR9);
58 case 0x1A:
59 return etm_read(ETMACVR10);
60 case 0x1B:
61 return etm_read(ETMACVR11);
62 case 0x1C:
63 return etm_read(ETMACVR12);
64 case 0x1D:
65 return etm_read(ETMACVR13);
66 case 0x1E:
67 return etm_read(ETMACVR14);
68 case 0x1F:
69 return etm_read(ETMACVR15);
70 case 0x20:
71 return etm_read(ETMACTR0);
72 case 0x21:
73 return etm_read(ETMACTR1);
74 case 0x22:
75 return etm_read(ETMACTR2);
76 case 0x23:
77 return etm_read(ETMACTR3);
78 case 0x24:
79 return etm_read(ETMACTR4);
80 case 0x25:
81 return etm_read(ETMACTR5);
82 case 0x26:
83 return etm_read(ETMACTR6);
84 case 0x27:
85 return etm_read(ETMACTR7);
86 case 0x28:
87 return etm_read(ETMACTR8);
88 case 0x29:
89 return etm_read(ETMACTR9);
90 case 0x2A:
91 return etm_read(ETMACTR10);
92 case 0x2B:
93 return etm_read(ETMACTR11);
94 case 0x2C:
95 return etm_read(ETMACTR12);
96 case 0x2D:
97 return etm_read(ETMACTR13);
98 case 0x2E:
99 return etm_read(ETMACTR14);
100 case 0x2F:
101 return etm_read(ETMACTR15);
102 case 0x50:
103 return etm_read(ETMCNTRLDVR0);
104 case 0x51:
105 return etm_read(ETMCNTRLDVR1);
106 case 0x52:
107 return etm_read(ETMCNTRLDVR2);
108 case 0x53:
109 return etm_read(ETMCNTRLDVR3);
110 case 0x54:
111 return etm_read(ETMCNTENR0);
112 case 0x55:
113 return etm_read(ETMCNTENR1);
114 case 0x56:
115 return etm_read(ETMCNTENR2);
116 case 0x57:
117 return etm_read(ETMCNTENR3);
118 case 0x58:
119 return etm_read(ETMCNTRLDEVR0);
120 case 0x59:
121 return etm_read(ETMCNTRLDEVR1);
122 case 0x5A:
123 return etm_read(ETMCNTRLDEVR2);
124 case 0x5B:
125 return etm_read(ETMCNTRLDEVR3);
126 case 0x5C:
127 return etm_read(ETMCNTVR0);
128 case 0x5D:
129 return etm_read(ETMCNTVR1);
130 case 0x5E:
131 return etm_read(ETMCNTVR2);
132 case 0x5F:
133 return etm_read(ETMCNTVR3);
134 case 0x60:
135 return etm_read(ETMSQ12EVR);
136 case 0x61:
137 return etm_read(ETMSQ21EVR);
138 case 0x62:
139 return etm_read(ETMSQ23EVR);
140 case 0x63:
141 return etm_read(ETMSQ31EVR);
142 case 0x64:
143 return etm_read(ETMSQ32EVR);
144 case 0x65:
145 return etm_read(ETMSQ13EVR);
146 case 0x67:
147 return etm_read(ETMSQR);
148 case 0x68:
149 return etm_read(ETMEXTOUTEVR0);
150 case 0x69:
151 return etm_read(ETMEXTOUTEVR1);
152 case 0x6A:
153 return etm_read(ETMEXTOUTEVR2);
154 case 0x6B:
155 return etm_read(ETMEXTOUTEVR3);
156 case 0x6C:
157 return etm_read(ETMCIDCVR0);
158 case 0x6D:
159 return etm_read(ETMCIDCVR1);
160 case 0x6E:
161 return etm_read(ETMCIDCVR2);
162 case 0x6F:
163 return etm_read(ETMCIDCMR);
164 case 0x70:
165 return etm_read(ETMIMPSPEC0);
166 case 0x71:
167 return etm_read(ETMIMPSPEC1);
168 case 0x72:
169 return etm_read(ETMIMPSPEC2);
170 case 0x73:
171 return etm_read(ETMIMPSPEC3);
172 case 0x74:
173 return etm_read(ETMIMPSPEC4);
174 case 0x75:
175 return etm_read(ETMIMPSPEC5);
176 case 0x76:
177 return etm_read(ETMIMPSPEC6);
178 case 0x77:
179 return etm_read(ETMIMPSPEC7);
180 case 0x78:
181 return etm_read(ETMSYNCFR);
182 case 0x79:
183 return etm_read(ETMIDR);
184 case 0x7A:
185 return etm_read(ETMCCER);
186 case 0x7B:
187 return etm_read(ETMEXTINSELR);
188 case 0x7C:
189 return etm_read(ETMTESSEICR);
190 case 0x7D:
191 return etm_read(ETMEIBCR);
192 case 0x7E:
193 return etm_read(ETMTSEVR);
194 case 0x7F:
195 return etm_read(ETMAUXCR);
196 case 0x80:
197 return etm_read(ETMTRACEIDR);
198 case 0x90:
199 return etm_read(ETMVMIDCVR);
200 case 0xC1:
201 return etm_read(ETMOSLSR);
202 case 0xC2:
203 return etm_read(ETMOSSRR);
204 case 0xC4:
205 return etm_read(ETMPDCR);
206 case 0xC5:
207 return etm_read(ETMPDSR);
208 default:
209 WARN(1, "invalid CP14 access to ETM reg: %lx",
210 (unsigned long)reg);
211 return 0;
212 }
213}
214
215static void etm_write_reg(uint32_t val, uint32_t reg)
216{
217 switch (reg) {
218 case 0x0:
219 etm_write(val, ETMCR);
220 return;
221 case 0x2:
222 etm_write(val, ETMTRIGGER);
223 return;
224 case 0x4:
225 etm_write(val, ETMSR);
226 return;
227 case 0x6:
228 etm_write(val, ETMTSSCR);
229 return;
230 case 0x8:
231 etm_write(val, ETMTEEVR);
232 return;
233 case 0x9:
234 etm_write(val, ETMTECR1);
235 return;
236 case 0xB:
237 etm_write(val, ETMFFLR);
238 return;
239 case 0x10:
240 etm_write(val, ETMACVR0);
241 return;
242 case 0x11:
243 etm_write(val, ETMACVR1);
244 return;
245 case 0x12:
246 etm_write(val, ETMACVR2);
247 return;
248 case 0x13:
249 etm_write(val, ETMACVR3);
250 return;
251 case 0x14:
252 etm_write(val, ETMACVR4);
253 return;
254 case 0x15:
255 etm_write(val, ETMACVR5);
256 return;
257 case 0x16:
258 etm_write(val, ETMACVR6);
259 return;
260 case 0x17:
261 etm_write(val, ETMACVR7);
262 return;
263 case 0x18:
264 etm_write(val, ETMACVR8);
265 return;
266 case 0x19:
267 etm_write(val, ETMACVR9);
268 return;
269 case 0x1A:
270 etm_write(val, ETMACVR10);
271 return;
272 case 0x1B:
273 etm_write(val, ETMACVR11);
274 return;
275 case 0x1C:
276 etm_write(val, ETMACVR12);
277 return;
278 case 0x1D:
279 etm_write(val, ETMACVR13);
280 return;
281 case 0x1E:
282 etm_write(val, ETMACVR14);
283 return;
284 case 0x1F:
285 etm_write(val, ETMACVR15);
286 return;
287 case 0x20:
288 etm_write(val, ETMACTR0);
289 return;
290 case 0x21:
291 etm_write(val, ETMACTR1);
292 return;
293 case 0x22:
294 etm_write(val, ETMACTR2);
295 return;
296 case 0x23:
297 etm_write(val, ETMACTR3);
298 return;
299 case 0x24:
300 etm_write(val, ETMACTR4);
301 return;
302 case 0x25:
303 etm_write(val, ETMACTR5);
304 return;
305 case 0x26:
306 etm_write(val, ETMACTR6);
307 return;
308 case 0x27:
309 etm_write(val, ETMACTR7);
310 return;
311 case 0x28:
312 etm_write(val, ETMACTR8);
313 return;
314 case 0x29:
315 etm_write(val, ETMACTR9);
316 return;
317 case 0x2A:
318 etm_write(val, ETMACTR10);
319 return;
320 case 0x2B:
321 etm_write(val, ETMACTR11);
322 return;
323 case 0x2C:
324 etm_write(val, ETMACTR12);
325 return;
326 case 0x2D:
327 etm_write(val, ETMACTR13);
328 return;
329 case 0x2E:
330 etm_write(val, ETMACTR14);
331 return;
332 case 0x2F:
333 etm_write(val, ETMACTR15);
334 return;
335 case 0x50:
336 etm_write(val, ETMCNTRLDVR0);
337 return;
338 case 0x51:
339 etm_write(val, ETMCNTRLDVR1);
340 return;
341 case 0x52:
342 etm_write(val, ETMCNTRLDVR2);
343 return;
344 case 0x53:
345 etm_write(val, ETMCNTRLDVR3);
346 return;
347 case 0x54:
348 etm_write(val, ETMCNTENR0);
349 return;
350 case 0x55:
351 etm_write(val, ETMCNTENR1);
352 return;
353 case 0x56:
354 etm_write(val, ETMCNTENR2);
355 return;
356 case 0x57:
357 etm_write(val, ETMCNTENR3);
358 return;
359 case 0x58:
360 etm_write(val, ETMCNTRLDEVR0);
361 return;
362 case 0x59:
363 etm_write(val, ETMCNTRLDEVR1);
364 return;
365 case 0x5A:
366 etm_write(val, ETMCNTRLDEVR2);
367 return;
368 case 0x5B:
369 etm_write(val, ETMCNTRLDEVR3);
370 return;
371 case 0x5C:
372 etm_write(val, ETMCNTVR0);
373 return;
374 case 0x5D:
375 etm_write(val, ETMCNTVR1);
376 return;
377 case 0x5E:
378 etm_write(val, ETMCNTVR2);
379 return;
380 case 0x5F:
381 etm_write(val, ETMCNTVR3);
382 return;
383 case 0x60:
384 etm_write(val, ETMSQ12EVR);
385 return;
386 case 0x61:
387 etm_write(val, ETMSQ21EVR);
388 return;
389 case 0x62:
390 etm_write(val, ETMSQ23EVR);
391 return;
392 case 0x63:
393 etm_write(val, ETMSQ31EVR);
394 return;
395 case 0x64:
396 etm_write(val, ETMSQ32EVR);
397 return;
398 case 0x65:
399 etm_write(val, ETMSQ13EVR);
400 return;
401 case 0x67:
402 etm_write(val, ETMSQR);
403 return;
404 case 0x68:
405 etm_write(val, ETMEXTOUTEVR0);
406 return;
407 case 0x69:
408 etm_write(val, ETMEXTOUTEVR1);
409 return;
410 case 0x6A:
411 etm_write(val, ETMEXTOUTEVR2);
412 return;
413 case 0x6B:
414 etm_write(val, ETMEXTOUTEVR3);
415 return;
416 case 0x6C:
417 etm_write(val, ETMCIDCVR0);
418 return;
419 case 0x6D:
420 etm_write(val, ETMCIDCVR1);
421 return;
422 case 0x6E:
423 etm_write(val, ETMCIDCVR2);
424 return;
425 case 0x6F:
426 etm_write(val, ETMCIDCMR);
427 return;
428 case 0x70:
429 etm_write(val, ETMIMPSPEC0);
430 return;
431 case 0x71:
432 etm_write(val, ETMIMPSPEC1);
433 return;
434 case 0x72:
435 etm_write(val, ETMIMPSPEC2);
436 return;
437 case 0x73:
438 etm_write(val, ETMIMPSPEC3);
439 return;
440 case 0x74:
441 etm_write(val, ETMIMPSPEC4);
442 return;
443 case 0x75:
444 etm_write(val, ETMIMPSPEC5);
445 return;
446 case 0x76:
447 etm_write(val, ETMIMPSPEC6);
448 return;
449 case 0x77:
450 etm_write(val, ETMIMPSPEC7);
451 return;
452 case 0x78:
453 etm_write(val, ETMSYNCFR);
454 return;
455 case 0x7B:
456 etm_write(val, ETMEXTINSELR);
457 return;
458 case 0x7C:
459 etm_write(val, ETMTESSEICR);
460 return;
461 case 0x7D:
462 etm_write(val, ETMEIBCR);
463 return;
464 case 0x7E:
465 etm_write(val, ETMTSEVR);
466 return;
467 case 0x7F:
468 etm_write(val, ETMAUXCR);
469 return;
470 case 0x80:
471 etm_write(val, ETMTRACEIDR);
472 return;
473 case 0x90:
474 etm_write(val, ETMVMIDCVR);
475 return;
476 case 0xC0:
477 etm_write(val, ETMOSLAR);
478 return;
479 case 0xC2:
480 etm_write(val, ETMOSSRR);
481 return;
482 case 0xC4:
483 etm_write(val, ETMPDCR);
484 return;
485 case 0xC5:
486 etm_write(val, ETMPDSR);
487 return;
488 default:
489 WARN(1, "invalid CP14 access to ETM reg: %lx",
490 (unsigned long)reg);
491 return;
492 }
493}
494
495static inline uint32_t offset_to_reg_num(uint32_t off)
496{
497 return off >> 2;
498}
499
500unsigned int etm_readl_cp14(uint32_t off)
501{
502 uint32_t reg = offset_to_reg_num(off);
503 return etm_read_reg(reg);
504}
505
506void etm_writel_cp14(uint32_t val, uint32_t off)
507{
508 uint32_t reg = offset_to_reg_num(off);
509 etm_write_reg(val, reg);
510}