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Jeff Garzik5a25ba12006-09-01 03:12:19 -04001/*
2 * SuperTrak EX Series Storage Controller driver for Linux
3 *
4 * Copyright (C) 2005, 2006 Promise Technology Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Written By:
12 * Ed Lin <promise_linux@promise.com>
13 *
Jeff Garzik5a25ba12006-09-01 03:12:19 -040014 */
15
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/kernel.h>
19#include <linux/delay.h>
Jeff Garzik5a25ba12006-09-01 03:12:19 -040020#include <linux/time.h>
21#include <linux/pci.h>
22#include <linux/blkdev.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/module.h>
26#include <linux/spinlock.h>
27#include <asm/io.h>
28#include <asm/irq.h>
29#include <asm/byteorder.h>
30#include <scsi/scsi.h>
31#include <scsi/scsi_device.h>
32#include <scsi/scsi_cmnd.h>
33#include <scsi/scsi_host.h>
Ed Lincf355882006-09-01 14:31:51 +080034#include <scsi/scsi_tcq.h>
Jeff Garzik5a25ba12006-09-01 03:12:19 -040035
36#define DRV_NAME "stex"
Ed Linfebb6312006-12-04 17:49:46 -080037#define ST_DRIVER_VERSION "3.1.0.1"
Ed Linfb4f66b2006-09-27 19:23:41 +080038#define ST_VER_MAJOR 3
Ed Linfebb6312006-12-04 17:49:46 -080039#define ST_VER_MINOR 1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040040#define ST_OEM 0
Ed Linfb4f66b2006-09-27 19:23:41 +080041#define ST_BUILD_VER 1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040042
43enum {
44 /* MU register offset */
45 IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
46 IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
47 OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
48 OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
49 IDBL = 0x20, /* MU_INBOUND_DOORBELL */
50 IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
51 IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
52 ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */
53 OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
54 OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
55
56 /* MU register value */
57 MU_INBOUND_DOORBELL_HANDSHAKE = 1,
58 MU_INBOUND_DOORBELL_REQHEADCHANGED = 2,
59 MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4,
60 MU_INBOUND_DOORBELL_HMUSTOPPED = 8,
61 MU_INBOUND_DOORBELL_RESET = 16,
62
63 MU_OUTBOUND_DOORBELL_HANDSHAKE = 1,
64 MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
65 MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4,
66 MU_OUTBOUND_DOORBELL_BUSCHANGE = 8,
67 MU_OUTBOUND_DOORBELL_HASEVENT = 16,
68
69 /* MU status code */
70 MU_STATE_STARTING = 1,
71 MU_STATE_FMU_READY_FOR_HANDSHAKE = 2,
72 MU_STATE_SEND_HANDSHAKE_FRAME = 3,
73 MU_STATE_STARTED = 4,
74 MU_STATE_RESETTING = 5,
75
Ed Lin76fbf962006-12-04 17:49:42 -080076 MU_MAX_DELAY = 120,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040077 MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
Ed Lin529e7a62006-12-04 17:49:34 -080078 MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
Ed Lin76fbf962006-12-04 17:49:42 -080079 MU_HARD_RESET_WAIT = 30000,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040080 HMU_PARTNER_TYPE = 2,
81
82 /* firmware returned values */
83 SRB_STATUS_SUCCESS = 0x01,
84 SRB_STATUS_ERROR = 0x04,
85 SRB_STATUS_BUSY = 0x05,
86 SRB_STATUS_INVALID_REQUEST = 0x06,
87 SRB_STATUS_SELECTION_TIMEOUT = 0x0A,
88 SRB_SEE_SENSE = 0x80,
89
90 /* task attribute */
91 TASK_ATTRIBUTE_SIMPLE = 0x0,
92 TASK_ATTRIBUTE_HEADOFQUEUE = 0x1,
93 TASK_ATTRIBUTE_ORDERED = 0x2,
94 TASK_ATTRIBUTE_ACA = 0x4,
95
96 /* request count, etc. */
97 MU_MAX_REQUEST = 32,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040098
99 /* one message wasted, use MU_MAX_REQUEST+1
100 to handle MU_MAX_REQUEST messages */
101 MU_REQ_COUNT = (MU_MAX_REQUEST + 1),
102 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1),
103
104 STEX_CDB_LENGTH = MAX_COMMAND_SIZE,
105 REQ_VARIABLE_LEN = 1024,
106 STATUS_VAR_LEN = 128,
107 ST_CAN_QUEUE = MU_MAX_REQUEST,
108 ST_CMD_PER_LUN = MU_MAX_REQUEST,
109 ST_MAX_SG = 32,
110
111 /* sg flags */
112 SG_CF_EOT = 0x80, /* end of table */
113 SG_CF_64B = 0x40, /* 64 bit item */
114 SG_CF_HOST = 0x20, /* sg in host memory */
115
116 ST_MAX_ARRAY_SUPPORTED = 16,
117 ST_MAX_TARGET_NUM = (ST_MAX_ARRAY_SUPPORTED+1),
118 ST_MAX_LUN_PER_TARGET = 16,
119
120 st_shasta = 0,
121 st_vsc = 1,
Ed Lin94e91082006-12-04 17:49:39 -0800122 st_vsc1 = 2,
123 st_yosemite = 3,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400124
125 PASSTHRU_REQ_TYPE = 0x00000001,
126 PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
127 ST_INTERNAL_TIMEOUT = 30,
128
Ed Linfb4f66b2006-09-27 19:23:41 +0800129 ST_TO_CMD = 0,
130 ST_FROM_CMD = 1,
131
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400132 /* vendor specific commands of Promise */
Ed Linfb4f66b2006-09-27 19:23:41 +0800133 MGT_CMD = 0xd8,
134 SINBAND_MGT_CMD = 0xd9,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400135 ARRAY_CMD = 0xe0,
136 CONTROLLER_CMD = 0xe1,
137 DEBUGGING_CMD = 0xe2,
138 PASSTHRU_CMD = 0xe3,
139
140 PASSTHRU_GET_ADAPTER = 0x05,
141 PASSTHRU_GET_DRVVER = 0x10,
Ed Linfb4f66b2006-09-27 19:23:41 +0800142
143 CTLR_CONFIG_CMD = 0x03,
144 CTLR_SHUTDOWN = 0x0d,
145
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400146 CTLR_POWER_STATE_CHANGE = 0x0e,
147 CTLR_POWER_SAVING = 0x01,
148
149 PASSTHRU_SIGNATURE = 0x4e415041,
Ed Linfb4f66b2006-09-27 19:23:41 +0800150 MGT_CMD_SIGNATURE = 0xba,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400151
152 INQUIRY_EVPD = 0x01,
Ed Lin94e91082006-12-04 17:49:39 -0800153
154 ST_ADDITIONAL_MEM = 0x200000,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400155};
156
Ed Linfb4f66b2006-09-27 19:23:41 +0800157/* SCSI inquiry data */
158typedef struct st_inq {
159 u8 DeviceType :5;
160 u8 DeviceTypeQualifier :3;
161 u8 DeviceTypeModifier :7;
162 u8 RemovableMedia :1;
163 u8 Versions;
164 u8 ResponseDataFormat :4;
165 u8 HiSupport :1;
166 u8 NormACA :1;
167 u8 ReservedBit :1;
168 u8 AERC :1;
169 u8 AdditionalLength;
170 u8 Reserved[2];
171 u8 SoftReset :1;
172 u8 CommandQueue :1;
173 u8 Reserved2 :1;
174 u8 LinkedCommands :1;
175 u8 Synchronous :1;
176 u8 Wide16Bit :1;
177 u8 Wide32Bit :1;
178 u8 RelativeAddressing :1;
179 u8 VendorId[8];
180 u8 ProductId[16];
181 u8 ProductRevisionLevel[4];
182 u8 VendorSpecific[20];
183 u8 Reserved3[40];
184} ST_INQ;
185
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400186struct st_sgitem {
187 u8 ctrl; /* SG_CF_xxx */
188 u8 reserved[3];
189 __le32 count;
190 __le32 addr;
191 __le32 addr_hi;
192};
193
194struct st_sgtable {
195 __le16 sg_count;
196 __le16 max_sg_count;
197 __le32 sz_in_byte;
198 struct st_sgitem table[ST_MAX_SG];
199};
200
201struct handshake_frame {
202 __le32 rb_phy; /* request payload queue physical address */
203 __le32 rb_phy_hi;
204 __le16 req_sz; /* size of each request payload */
205 __le16 req_cnt; /* count of reqs the buffer can hold */
206 __le16 status_sz; /* size of each status payload */
207 __le16 status_cnt; /* count of status the buffer can hold */
208 __le32 hosttime; /* seconds from Jan 1, 1970 (GMT) */
209 __le32 hosttime_hi;
210 u8 partner_type; /* who sends this frame */
211 u8 reserved0[7];
212 __le32 partner_ver_major;
213 __le32 partner_ver_minor;
214 __le32 partner_ver_oem;
215 __le32 partner_ver_build;
Ed Lin94e91082006-12-04 17:49:39 -0800216 __le32 extra_offset; /* NEW */
217 __le32 extra_size; /* NEW */
218 u32 reserved1[2];
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400219};
220
221struct req_msg {
222 __le16 tag;
223 u8 lun;
224 u8 target;
225 u8 task_attr;
226 u8 task_manage;
227 u8 prd_entry;
Ed Linf903d7b72006-09-27 19:23:33 +0800228 u8 payload_sz; /* payload size in 4-byte, not used */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400229 u8 cdb[STEX_CDB_LENGTH];
230 u8 variable[REQ_VARIABLE_LEN];
231};
232
233struct status_msg {
234 __le16 tag;
235 u8 lun;
236 u8 target;
237 u8 srb_status;
238 u8 scsi_status;
239 u8 reserved;
240 u8 payload_sz; /* payload size in 4-byte */
241 u8 variable[STATUS_VAR_LEN];
242};
243
244struct ver_info {
245 u32 major;
246 u32 minor;
247 u32 oem;
248 u32 build;
249 u32 reserved[2];
250};
251
252struct st_frame {
253 u32 base[6];
254 u32 rom_addr;
255
256 struct ver_info drv_ver;
257 struct ver_info bios_ver;
258
259 u32 bus;
260 u32 slot;
261 u32 irq_level;
262 u32 irq_vec;
263 u32 id;
264 u32 subid;
265
266 u32 dimm_size;
267 u8 dimm_type;
268 u8 reserved[3];
269
270 u32 channel;
271 u32 reserved1;
272};
273
274struct st_drvver {
275 u32 major;
276 u32 minor;
277 u32 oem;
278 u32 build;
279 u32 signature[2];
280 u8 console_id;
281 u8 host_no;
282 u8 reserved0[2];
283 u32 reserved[3];
284};
285
286#define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
287#define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
288#define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
Ed Linfb4f66b2006-09-27 19:23:41 +0800289#define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ))
290#define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400291
292struct st_ccb {
293 struct req_msg *req;
294 struct scsi_cmnd *cmd;
295
296 void *sense_buffer;
297 unsigned int sense_bufflen;
298 int sg_count;
299
300 u32 req_type;
301 u8 srb_status;
302 u8 scsi_status;
303};
304
305struct st_hba {
306 void __iomem *mmio_base; /* iomapped PCI memory space */
307 void *dma_mem;
308 dma_addr_t dma_handle;
Ed Lin94e91082006-12-04 17:49:39 -0800309 size_t dma_size;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400310
311 struct Scsi_Host *host;
312 struct pci_dev *pdev;
313
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400314 u32 req_head;
315 u32 req_tail;
316 u32 status_head;
317 u32 status_tail;
318
319 struct status_msg *status_buffer;
320 void *copy_buffer; /* temp buffer for driver-handled commands */
321 struct st_ccb ccb[MU_MAX_REQUEST];
322 struct st_ccb *wait_ccb;
323 wait_queue_head_t waitq;
324
325 unsigned int mu_status;
326 int out_req_cnt;
327
328 unsigned int cardtype;
329};
330
331static const char console_inq_page[] =
332{
333 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
334 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */
335 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */
336 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */
337 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */
338 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */
339 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */
340 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
341};
342
343MODULE_AUTHOR("Ed Lin");
344MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
345MODULE_LICENSE("GPL");
346MODULE_VERSION(ST_DRIVER_VERSION);
347
348static void stex_gettime(__le32 *time)
349{
350 struct timeval tv;
351 do_gettimeofday(&tv);
352
353 *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
354 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
355}
356
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400357static struct status_msg *stex_get_status(struct st_hba *hba)
358{
359 struct status_msg *status =
360 hba->status_buffer + hba->status_tail;
361
362 ++hba->status_tail;
363 hba->status_tail %= MU_STATUS_COUNT;
364
365 return status;
366}
367
368static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
369{
370 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
371
372 cmd->sense_buffer[0] = 0x70; /* fixed format, current */
373 cmd->sense_buffer[2] = sk;
374 cmd->sense_buffer[7] = 18 - 8; /* additional sense length */
375 cmd->sense_buffer[12] = asc;
376 cmd->sense_buffer[13] = ascq;
377}
378
379static void stex_invalid_field(struct scsi_cmnd *cmd,
380 void (*done)(struct scsi_cmnd *))
381{
382 /* "Invalid field in cbd" */
383 stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
384 done(cmd);
385}
386
387static struct req_msg *stex_alloc_req(struct st_hba *hba)
388{
389 struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
390 hba->req_head;
391
392 ++hba->req_head;
393 hba->req_head %= MU_REQ_COUNT;
394
395 return req;
396}
397
398static int stex_map_sg(struct st_hba *hba,
399 struct req_msg *req, struct st_ccb *ccb)
400{
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400401 struct scsi_cmnd *cmd;
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900402 struct scatterlist *sg;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400403 struct st_sgtable *dst;
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900404 int i, nseg;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400405
406 cmd = ccb->cmd;
407 dst = (struct st_sgtable *)req->variable;
408 dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900409 dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd));
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400410
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900411 nseg = scsi_dma_map(cmd);
412 if (nseg < 0)
413 return -EIO;
414 if (nseg) {
415 ccb->sg_count = nseg;
416 dst->sg_count = cpu_to_le16((u16)nseg);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400417
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900418 scsi_for_each_sg(cmd, sg, nseg, i) {
419 dst->table[i].count = cpu_to_le32((u32)sg_dma_len(sg));
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400420 dst->table[i].addr =
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900421 cpu_to_le32(sg_dma_address(sg) & 0xffffffff);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400422 dst->table[i].addr_hi =
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900423 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400424 dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
425 }
426 dst->table[--i].ctrl |= SG_CF_EOT;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400427 }
428
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400429 return 0;
430}
431
432static void stex_internal_copy(struct scsi_cmnd *cmd,
Ed Linfb4f66b2006-09-27 19:23:41 +0800433 const void *src, size_t *count, int sg_count, int direction)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400434{
435 size_t lcount;
436 size_t len;
437 void *s, *d, *base = NULL;
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900438 size_t offset;
439
440 if (*count > scsi_bufflen(cmd))
441 *count = scsi_bufflen(cmd);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400442 lcount = *count;
443 while (lcount) {
444 len = lcount;
445 s = (void *)src;
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900446
447 offset = *count - lcount;
448 s += offset;
449 base = scsi_kmap_atomic_sg(scsi_sglist(cmd),
450 sg_count, &offset, &len);
451 if (!base) {
452 *count -= lcount;
453 return;
454 }
455 d = base + offset;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400456
Ed Linfb4f66b2006-09-27 19:23:41 +0800457 if (direction == ST_TO_CMD)
458 memcpy(d, s, len);
459 else
460 memcpy(s, d, len);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400461
462 lcount -= len;
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900463 scsi_kunmap_atomic_sg(base);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400464 }
465}
466
467static int stex_direct_copy(struct scsi_cmnd *cmd,
468 const void *src, size_t count)
469{
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400470 size_t cp_len = count;
471 int n_elem = 0;
472
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900473 n_elem = scsi_dma_map(cmd);
474 if (n_elem < 0)
475 return 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400476
Ed Linfb4f66b2006-09-27 19:23:41 +0800477 stex_internal_copy(cmd, src, &cp_len, n_elem, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400478
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900479 scsi_dma_unmap(cmd);
480
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400481 return cp_len == count;
482}
483
484static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
485{
486 struct st_frame *p;
487 size_t count = sizeof(struct st_frame);
488
489 p = hba->copy_buffer;
Ed Lin4eea9dc2006-12-04 17:49:28 -0800490 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_FROM_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400491 memset(p->base, 0, sizeof(u32)*6);
492 *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
493 p->rom_addr = 0;
494
495 p->drv_ver.major = ST_VER_MAJOR;
496 p->drv_ver.minor = ST_VER_MINOR;
497 p->drv_ver.oem = ST_OEM;
498 p->drv_ver.build = ST_BUILD_VER;
499
500 p->bus = hba->pdev->bus->number;
501 p->slot = hba->pdev->devfn;
502 p->irq_level = 0;
503 p->irq_vec = hba->pdev->irq;
504 p->id = hba->pdev->vendor << 16 | hba->pdev->device;
505 p->subid =
506 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
507
Ed Linfb4f66b2006-09-27 19:23:41 +0800508 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400509}
510
511static void
512stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
513{
514 req->tag = cpu_to_le16(tag);
515 req->task_attr = TASK_ATTRIBUTE_SIMPLE;
516 req->task_manage = 0; /* not supported yet */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400517
518 hba->ccb[tag].req = req;
519 hba->out_req_cnt++;
520
521 writel(hba->req_head, hba->mmio_base + IMR0);
522 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
523 readl(hba->mmio_base + IDBL); /* flush */
524}
525
526static int
Ed Lincf355882006-09-01 14:31:51 +0800527stex_slave_alloc(struct scsi_device *sdev)
528{
529 /* Cheat: usually extracted from Inquiry data */
530 sdev->tagged_supported = 1;
531
532 scsi_activate_tcq(sdev, sdev->host->can_queue);
533
534 return 0;
535}
536
537static int
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400538stex_slave_config(struct scsi_device *sdev)
539{
540 sdev->use_10_for_rw = 1;
541 sdev->use_10_for_ms = 1;
542 sdev->timeout = 60 * HZ;
Ed Lincf355882006-09-01 14:31:51 +0800543 sdev->tagged_supported = 1;
544
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400545 return 0;
546}
547
548static void
549stex_slave_destroy(struct scsi_device *sdev)
550{
Ed Lincf355882006-09-01 14:31:51 +0800551 scsi_deactivate_tcq(sdev, 1);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400552}
553
554static int
555stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
556{
557 struct st_hba *hba;
558 struct Scsi_Host *host;
559 unsigned int id,lun;
560 struct req_msg *req;
561 u16 tag;
562 host = cmd->device->host;
563 id = cmd->device->id;
564 lun = cmd->device->channel; /* firmware lun issue work around */
565 hba = (struct st_hba *) &host->hostdata[0];
566
567 switch (cmd->cmnd[0]) {
568 case MODE_SENSE_10:
569 {
570 static char ms10_caching_page[12] =
571 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
572 unsigned char page;
573 page = cmd->cmnd[2] & 0x3f;
574 if (page == 0x8 || page == 0x3f) {
575 stex_direct_copy(cmd, ms10_caching_page,
576 sizeof(ms10_caching_page));
577 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
578 done(cmd);
579 } else
580 stex_invalid_field(cmd, done);
581 return 0;
582 }
583 case INQUIRY:
584 if (id != ST_MAX_ARRAY_SUPPORTED)
585 break;
586 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
587 stex_direct_copy(cmd, console_inq_page,
588 sizeof(console_inq_page));
589 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
590 done(cmd);
591 } else
592 stex_invalid_field(cmd, done);
593 return 0;
594 case PASSTHRU_CMD:
595 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
596 struct st_drvver ver;
597 ver.major = ST_VER_MAJOR;
598 ver.minor = ST_VER_MINOR;
599 ver.oem = ST_OEM;
600 ver.build = ST_BUILD_VER;
601 ver.signature[0] = PASSTHRU_SIGNATURE;
602 ver.console_id = ST_MAX_ARRAY_SUPPORTED;
603 ver.host_no = hba->host->host_no;
604 cmd->result = stex_direct_copy(cmd, &ver, sizeof(ver)) ?
605 DID_OK << 16 | COMMAND_COMPLETE << 8 :
606 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
607 done(cmd);
608 return 0;
609 }
610 default:
611 break;
612 }
613
614 cmd->scsi_done = done;
615
Ed Lincf355882006-09-01 14:31:51 +0800616 tag = cmd->request->tag;
617
618 if (unlikely(tag >= host->can_queue))
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400619 return SCSI_MLQUEUE_HOST_BUSY;
620
621 req = stex_alloc_req(hba);
Ed Linfb4f66b2006-09-27 19:23:41 +0800622
623 if (hba->cardtype == st_yosemite) {
624 req->lun = lun * (ST_MAX_TARGET_NUM - 1) + id;
625 req->target = 0;
626 } else {
627 req->lun = lun;
628 req->target = id;
629 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400630
631 /* cdb */
632 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
633
634 hba->ccb[tag].cmd = cmd;
635 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
636 hba->ccb[tag].sense_buffer = cmd->sense_buffer;
637 hba->ccb[tag].req_type = 0;
638
639 if (cmd->sc_data_direction != DMA_NONE)
640 stex_map_sg(hba, req, &hba->ccb[tag]);
641
642 stex_send_cmd(hba, req, tag);
643 return 0;
644}
645
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400646static void stex_scsi_done(struct st_ccb *ccb)
647{
648 struct scsi_cmnd *cmd = ccb->cmd;
649 int result;
650
651 if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) {
652 result = ccb->scsi_status;
653 switch (ccb->scsi_status) {
654 case SAM_STAT_GOOD:
655 result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
656 break;
657 case SAM_STAT_CHECK_CONDITION:
658 result |= DRIVER_SENSE << 24;
659 break;
660 case SAM_STAT_BUSY:
661 result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
662 break;
663 default:
664 result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
665 break;
666 }
667 }
668 else if (ccb->srb_status & SRB_SEE_SENSE)
669 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
670 else switch (ccb->srb_status) {
671 case SRB_STATUS_SELECTION_TIMEOUT:
672 result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
673 break;
674 case SRB_STATUS_BUSY:
675 result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
676 break;
677 case SRB_STATUS_INVALID_REQUEST:
678 case SRB_STATUS_ERROR:
679 default:
680 result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
681 break;
682 }
683
684 cmd->result = result;
685 cmd->scsi_done(cmd);
686}
687
688static void stex_copy_data(struct st_ccb *ccb,
689 struct status_msg *resp, unsigned int variable)
690{
691 size_t count = variable;
692 if (resp->scsi_status != SAM_STAT_GOOD) {
693 if (ccb->sense_buffer != NULL)
694 memcpy(ccb->sense_buffer, resp->variable,
695 min(variable, ccb->sense_bufflen));
696 return;
697 }
698
699 if (ccb->cmd == NULL)
700 return;
Ed Linfb4f66b2006-09-27 19:23:41 +0800701 stex_internal_copy(ccb->cmd,
702 resp->variable, &count, ccb->sg_count, ST_TO_CMD);
703}
704
705static void stex_ys_commands(struct st_hba *hba,
706 struct st_ccb *ccb, struct status_msg *resp)
707{
708 size_t count;
709
710 if (ccb->cmd->cmnd[0] == MGT_CMD &&
711 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900712 scsi_bufflen(ccb->cmd) =
Ed Linfb4f66b2006-09-27 19:23:41 +0800713 le32_to_cpu(*(__le32 *)&resp->variable[0]);
714 return;
715 }
716
717 if (resp->srb_status != 0)
718 return;
719
720 /* determine inquiry command status by DeviceTypeQualifier */
721 if (ccb->cmd->cmnd[0] == INQUIRY &&
722 resp->scsi_status == SAM_STAT_GOOD) {
723 ST_INQ *inq_data;
724
725 count = STEX_EXTRA_SIZE;
726 stex_internal_copy(ccb->cmd, hba->copy_buffer,
727 &count, ccb->sg_count, ST_FROM_CMD);
728 inq_data = (ST_INQ *)hba->copy_buffer;
729 if (inq_data->DeviceTypeQualifier != 0)
730 ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
731 else
732 ccb->srb_status = SRB_STATUS_SUCCESS;
733 } else if (ccb->cmd->cmnd[0] == REPORT_LUNS) {
734 u8 *report_lun_data = (u8 *)hba->copy_buffer;
735
736 count = STEX_EXTRA_SIZE;
737 stex_internal_copy(ccb->cmd, report_lun_data,
738 &count, ccb->sg_count, ST_FROM_CMD);
739 if (report_lun_data[2] || report_lun_data[3]) {
740 report_lun_data[2] = 0x00;
741 report_lun_data[3] = 0x08;
742 stex_internal_copy(ccb->cmd, report_lun_data,
743 &count, ccb->sg_count, ST_TO_CMD);
744 }
745 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400746}
747
748static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
749{
750 void __iomem *base = hba->mmio_base;
751 struct status_msg *resp;
752 struct st_ccb *ccb;
753 unsigned int size;
754 u16 tag;
755
756 if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
757 return;
758
759 /* status payloads */
760 hba->status_head = readl(base + OMR1);
761 if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
762 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
763 pci_name(hba->pdev));
764 return;
765 }
766
Ed Linfb4f66b2006-09-27 19:23:41 +0800767 /*
768 * it's not a valid status payload if:
769 * 1. there are no pending requests(e.g. during init stage)
770 * 2. there are some pending requests, but the controller is in
771 * reset status, and its type is not st_yosemite
772 * firmware of st_yosemite in reset status will return pending requests
773 * to driver, so we allow it to pass
774 */
775 if (unlikely(hba->out_req_cnt <= 0 ||
776 (hba->mu_status == MU_STATE_RESETTING &&
777 hba->cardtype != st_yosemite))) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400778 hba->status_tail = hba->status_head;
779 goto update_status;
780 }
781
782 while (hba->status_tail != hba->status_head) {
783 resp = stex_get_status(hba);
784 tag = le16_to_cpu(resp->tag);
Ed Lincf355882006-09-01 14:31:51 +0800785 if (unlikely(tag >= hba->host->can_queue)) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400786 printk(KERN_WARNING DRV_NAME
787 "(%s): invalid tag\n", pci_name(hba->pdev));
788 continue;
789 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400790
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400791 ccb = &hba->ccb[tag];
792 if (hba->wait_ccb == ccb)
793 hba->wait_ccb = NULL;
794 if (unlikely(ccb->req == NULL)) {
795 printk(KERN_WARNING DRV_NAME
796 "(%s): lagging req\n", pci_name(hba->pdev));
Ed Linfb4f66b2006-09-27 19:23:41 +0800797 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400798 continue;
799 }
800
801 size = resp->payload_sz * sizeof(u32); /* payload size */
802 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
803 size > sizeof(*resp))) {
804 printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
805 pci_name(hba->pdev));
806 } else {
807 size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
808 if (size)
809 stex_copy_data(ccb, resp, size);
810 }
811
812 ccb->srb_status = resp->srb_status;
813 ccb->scsi_status = resp->scsi_status;
814
Ed Lincf355882006-09-01 14:31:51 +0800815 if (likely(ccb->cmd != NULL)) {
Ed Linfb4f66b2006-09-27 19:23:41 +0800816 if (hba->cardtype == st_yosemite)
817 stex_ys_commands(hba, ccb, resp);
818
Ed Lincf355882006-09-01 14:31:51 +0800819 if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
820 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
821 stex_controller_info(hba, ccb);
Ed Linfb4f66b2006-09-27 19:23:41 +0800822
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900823 scsi_dma_unmap(ccb->cmd);
Ed Lincf355882006-09-01 14:31:51 +0800824 stex_scsi_done(ccb);
825 hba->out_req_cnt--;
826 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
827 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400828 if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
829 ccb->req_type = 0;
830 continue;
831 }
832 ccb->req_type = 0;
833 if (waitqueue_active(&hba->waitq))
834 wake_up(&hba->waitq);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400835 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400836 }
837
838update_status:
839 writel(hba->status_head, base + IMR1);
840 readl(base + IMR1); /* flush */
841}
842
David Howells7d12e782006-10-05 14:55:46 +0100843static irqreturn_t stex_intr(int irq, void *__hba)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400844{
845 struct st_hba *hba = __hba;
846 void __iomem *base = hba->mmio_base;
847 u32 data;
848 unsigned long flags;
849 int handled = 0;
850
851 spin_lock_irqsave(hba->host->host_lock, flags);
852
853 data = readl(base + ODBL);
854
855 if (data && data != 0xffffffff) {
856 /* clear the interrupt */
857 writel(data, base + ODBL);
858 readl(base + ODBL); /* flush */
859 stex_mu_intr(hba, data);
860 handled = 1;
861 }
862
863 spin_unlock_irqrestore(hba->host->host_lock, flags);
864
865 return IRQ_RETVAL(handled);
866}
867
868static int stex_handshake(struct st_hba *hba)
869{
870 void __iomem *base = hba->mmio_base;
871 struct handshake_frame *h;
872 dma_addr_t status_phys;
Ed Lin529e7a62006-12-04 17:49:34 -0800873 u32 data;
Ed Lin76fbf962006-12-04 17:49:42 -0800874 unsigned long before;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400875
876 if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
877 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
878 readl(base + IDBL);
Ed Lin76fbf962006-12-04 17:49:42 -0800879 before = jiffies;
880 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
881 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
882 printk(KERN_ERR DRV_NAME
883 "(%s): no handshake signature\n",
884 pci_name(hba->pdev));
885 return -1;
886 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400887 rmb();
888 msleep(1);
889 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400890 }
891
892 udelay(10);
893
Ed Lin529e7a62006-12-04 17:49:34 -0800894 data = readl(base + OMR1);
895 if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
896 data &= 0x0000ffff;
897 if (hba->host->can_queue > data)
898 hba->host->can_queue = data;
899 }
900
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400901 h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
902 h->rb_phy = cpu_to_le32(hba->dma_handle);
903 h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
904 h->req_sz = cpu_to_le16(sizeof(struct req_msg));
905 h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
906 h->status_sz = cpu_to_le16(sizeof(struct status_msg));
907 h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
908 stex_gettime(&h->hosttime);
909 h->partner_type = HMU_PARTNER_TYPE;
Ed Lin94e91082006-12-04 17:49:39 -0800910 if (hba->dma_size > STEX_BUFFER_SIZE) {
911 h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE);
912 h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM);
913 } else
914 h->extra_offset = h->extra_size = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400915
916 status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
917 writel(status_phys, base + IMR0);
918 readl(base + IMR0);
919 writel((status_phys >> 16) >> 16, base + IMR1);
920 readl(base + IMR1);
921
922 writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
923 readl(base + OMR0);
924 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
925 readl(base + IDBL); /* flush */
926
927 udelay(10);
Ed Lin76fbf962006-12-04 17:49:42 -0800928 before = jiffies;
929 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
930 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
931 printk(KERN_ERR DRV_NAME
932 "(%s): no signature after handshake frame\n",
933 pci_name(hba->pdev));
934 return -1;
935 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400936 rmb();
937 msleep(1);
938 }
939
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400940 writel(0, base + IMR0);
941 readl(base + IMR0);
942 writel(0, base + OMR0);
943 readl(base + OMR0);
944 writel(0, base + IMR1);
945 readl(base + IMR1);
946 writel(0, base + OMR1);
947 readl(base + OMR1); /* flush */
948 hba->mu_status = MU_STATE_STARTED;
949 return 0;
950}
951
952static int stex_abort(struct scsi_cmnd *cmd)
953{
954 struct Scsi_Host *host = cmd->device->host;
955 struct st_hba *hba = (struct st_hba *)host->hostdata;
Ed Lincf355882006-09-01 14:31:51 +0800956 u16 tag = cmd->request->tag;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400957 void __iomem *base;
958 u32 data;
959 int result = SUCCESS;
960 unsigned long flags;
961 base = hba->mmio_base;
962 spin_lock_irqsave(host->host_lock, flags);
Ed Lincf355882006-09-01 14:31:51 +0800963 if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
964 hba->wait_ccb = &hba->ccb[tag];
965 else {
966 for (tag = 0; tag < host->can_queue; tag++)
967 if (hba->ccb[tag].cmd == cmd) {
968 hba->wait_ccb = &hba->ccb[tag];
969 break;
970 }
971 if (tag >= host->can_queue)
972 goto out;
973 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400974
975 data = readl(base + ODBL);
976 if (data == 0 || data == 0xffffffff)
977 goto fail_out;
978
979 writel(data, base + ODBL);
980 readl(base + ODBL); /* flush */
981
982 stex_mu_intr(hba, data);
983
984 if (hba->wait_ccb == NULL) {
985 printk(KERN_WARNING DRV_NAME
986 "(%s): lost interrupt\n", pci_name(hba->pdev));
987 goto out;
988 }
989
990fail_out:
FUJITA Tomonorid5587d52007-05-26 10:01:24 +0900991 scsi_dma_unmap(cmd);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400992 hba->wait_ccb->req = NULL; /* nullify the req's future return */
993 hba->wait_ccb = NULL;
994 result = FAILED;
995out:
996 spin_unlock_irqrestore(host->host_lock, flags);
997 return result;
998}
999
1000static void stex_hard_reset(struct st_hba *hba)
1001{
1002 struct pci_bus *bus;
1003 int i;
1004 u16 pci_cmd;
1005 u8 pci_bctl;
1006
1007 for (i = 0; i < 16; i++)
1008 pci_read_config_dword(hba->pdev, i * 4,
1009 &hba->pdev->saved_config_space[i]);
1010
1011 /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1012 secondary bus. Consult Intel 80331/3 developer's manual for detail */
1013 bus = hba->pdev->bus;
1014 pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
1015 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
1016 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1017 msleep(1);
1018 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
1019 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1020
Ed Lin76fbf962006-12-04 17:49:42 -08001021 for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001022 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
Ed Lin47c4f992006-12-04 17:49:31 -08001023 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001024 break;
1025 msleep(1);
1026 }
1027
1028 ssleep(5);
1029 for (i = 0; i < 16; i++)
1030 pci_write_config_dword(hba->pdev, i * 4,
1031 hba->pdev->saved_config_space[i]);
1032}
1033
1034static int stex_reset(struct scsi_cmnd *cmd)
1035{
1036 struct st_hba *hba;
1037 unsigned long flags;
Ed Linfb4f66b2006-09-27 19:23:41 +08001038 unsigned long before;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001039 hba = (struct st_hba *) &cmd->device->host->hostdata[0];
1040
1041 hba->mu_status = MU_STATE_RESETTING;
1042
1043 if (hba->cardtype == st_shasta)
1044 stex_hard_reset(hba);
1045
Ed Linfb4f66b2006-09-27 19:23:41 +08001046 if (hba->cardtype != st_yosemite) {
1047 if (stex_handshake(hba)) {
1048 printk(KERN_WARNING DRV_NAME
1049 "(%s): resetting: handshake failed\n",
1050 pci_name(hba->pdev));
1051 return FAILED;
1052 }
1053 spin_lock_irqsave(hba->host->host_lock, flags);
1054 hba->req_head = 0;
1055 hba->req_tail = 0;
1056 hba->status_head = 0;
1057 hba->status_tail = 0;
1058 hba->out_req_cnt = 0;
1059 spin_unlock_irqrestore(hba->host->host_lock, flags);
1060 return SUCCESS;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001061 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001062
Ed Linfb4f66b2006-09-27 19:23:41 +08001063 /* st_yosemite */
1064 writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1065 readl(hba->mmio_base + IDBL); /* flush */
1066 before = jiffies;
1067 while (hba->out_req_cnt > 0) {
1068 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1069 printk(KERN_WARNING DRV_NAME
1070 "(%s): reset timeout\n", pci_name(hba->pdev));
1071 return FAILED;
1072 }
1073 msleep(1);
1074 }
1075
1076 hba->mu_status = MU_STATE_STARTED;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001077 return SUCCESS;
1078}
1079
1080static int stex_biosparam(struct scsi_device *sdev,
1081 struct block_device *bdev, sector_t capacity, int geom[])
1082{
Ed Linb4b8bed2006-12-04 17:49:24 -08001083 int heads = 255, sectors = 63;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001084
1085 if (capacity < 0x200000) {
1086 heads = 64;
1087 sectors = 32;
1088 }
1089
Ed Linb4b8bed2006-12-04 17:49:24 -08001090 sector_div(capacity, heads * sectors);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001091
1092 geom[0] = heads;
1093 geom[1] = sectors;
Ed Linb4b8bed2006-12-04 17:49:24 -08001094 geom[2] = capacity;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001095
1096 return 0;
1097}
1098
1099static struct scsi_host_template driver_template = {
1100 .module = THIS_MODULE,
1101 .name = DRV_NAME,
1102 .proc_name = DRV_NAME,
1103 .bios_param = stex_biosparam,
1104 .queuecommand = stex_queuecommand,
Ed Lincf355882006-09-01 14:31:51 +08001105 .slave_alloc = stex_slave_alloc,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001106 .slave_configure = stex_slave_config,
1107 .slave_destroy = stex_slave_destroy,
1108 .eh_abort_handler = stex_abort,
1109 .eh_host_reset_handler = stex_reset,
1110 .can_queue = ST_CAN_QUEUE,
1111 .this_id = -1,
1112 .sg_tablesize = ST_MAX_SG,
1113 .cmd_per_lun = ST_CMD_PER_LUN,
1114};
1115
1116static int stex_set_dma_mask(struct pci_dev * pdev)
1117{
1118 int ret;
1119 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1120 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1121 return 0;
1122 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1123 if (!ret)
1124 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1125 return ret;
1126}
1127
1128static int __devinit
1129stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1130{
1131 struct st_hba *hba;
1132 struct Scsi_Host *host;
1133 int err;
1134
1135 err = pci_enable_device(pdev);
1136 if (err)
1137 return err;
1138
1139 pci_set_master(pdev);
1140
1141 host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1142
1143 if (!host) {
1144 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1145 pci_name(pdev));
1146 err = -ENOMEM;
1147 goto out_disable;
1148 }
1149
1150 hba = (struct st_hba *)host->hostdata;
1151 memset(hba, 0, sizeof(struct st_hba));
1152
1153 err = pci_request_regions(pdev, DRV_NAME);
1154 if (err < 0) {
1155 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1156 pci_name(pdev));
1157 goto out_scsi_host_put;
1158 }
1159
1160 hba->mmio_base = ioremap(pci_resource_start(pdev, 0),
1161 pci_resource_len(pdev, 0));
1162 if ( !hba->mmio_base) {
1163 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1164 pci_name(pdev));
1165 err = -ENOMEM;
1166 goto out_release_regions;
1167 }
1168
1169 err = stex_set_dma_mask(pdev);
1170 if (err) {
1171 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1172 pci_name(pdev));
1173 goto out_iounmap;
1174 }
1175
Ed Lin94e91082006-12-04 17:49:39 -08001176 hba->cardtype = (unsigned int) id->driver_data;
1177 if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1)
1178 hba->cardtype = st_vsc1;
1179 hba->dma_size = (hba->cardtype == st_vsc1) ?
1180 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001181 hba->dma_mem = dma_alloc_coherent(&pdev->dev,
Ed Lin94e91082006-12-04 17:49:39 -08001182 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001183 if (!hba->dma_mem) {
1184 err = -ENOMEM;
1185 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1186 pci_name(pdev));
1187 goto out_iounmap;
1188 }
1189
1190 hba->status_buffer =
1191 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1192 hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1193 hba->mu_status = MU_STATE_STARTING;
1194
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001195 /* firmware uses id/lun pair for a logical drive, but lun would be
1196 always 0 if CONFIG_SCSI_MULTI_LUN not configured, so we use
1197 channel to map lun here */
1198 host->max_channel = ST_MAX_LUN_PER_TARGET - 1;
1199 host->max_id = ST_MAX_TARGET_NUM;
1200 host->max_lun = 1;
1201 host->unique_id = host->host_no;
1202 host->max_cmd_len = STEX_CDB_LENGTH;
1203
1204 hba->host = host;
1205 hba->pdev = pdev;
1206 init_waitqueue_head(&hba->waitq);
1207
1208 err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1209 if (err) {
1210 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1211 pci_name(pdev));
1212 goto out_pci_free;
1213 }
1214
1215 err = stex_handshake(hba);
1216 if (err)
1217 goto out_free_irq;
1218
Ed Lin529e7a62006-12-04 17:49:34 -08001219 err = scsi_init_shared_tag_map(host, host->can_queue);
James Bottomleydeb81d82006-09-01 09:28:48 -04001220 if (err) {
Ed Lincf355882006-09-01 14:31:51 +08001221 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1222 pci_name(pdev));
1223 goto out_free_irq;
1224 }
1225
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001226 pci_set_drvdata(pdev, hba);
1227
1228 err = scsi_add_host(host, &pdev->dev);
1229 if (err) {
1230 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1231 pci_name(pdev));
1232 goto out_free_irq;
1233 }
1234
1235 scsi_scan_host(host);
1236
1237 return 0;
1238
1239out_free_irq:
1240 free_irq(pdev->irq, hba);
1241out_pci_free:
Ed Lin94e91082006-12-04 17:49:39 -08001242 dma_free_coherent(&pdev->dev, hba->dma_size,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001243 hba->dma_mem, hba->dma_handle);
1244out_iounmap:
1245 iounmap(hba->mmio_base);
1246out_release_regions:
1247 pci_release_regions(pdev);
1248out_scsi_host_put:
1249 scsi_host_put(host);
1250out_disable:
1251 pci_disable_device(pdev);
1252
1253 return err;
1254}
1255
1256static void stex_hba_stop(struct st_hba *hba)
1257{
1258 struct req_msg *req;
1259 unsigned long flags;
1260 unsigned long before;
Ed Lincf355882006-09-01 14:31:51 +08001261 u16 tag = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001262
1263 spin_lock_irqsave(hba->host->host_lock, flags);
1264 req = stex_alloc_req(hba);
1265 memset(req->cdb, 0, STEX_CDB_LENGTH);
1266
Ed Linfb4f66b2006-09-27 19:23:41 +08001267 if (hba->cardtype == st_yosemite) {
1268 req->cdb[0] = MGT_CMD;
1269 req->cdb[1] = MGT_CMD_SIGNATURE;
1270 req->cdb[2] = CTLR_CONFIG_CMD;
1271 req->cdb[3] = CTLR_SHUTDOWN;
1272 } else {
1273 req->cdb[0] = CONTROLLER_CMD;
1274 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1275 req->cdb[2] = CTLR_POWER_SAVING;
1276 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001277
1278 hba->ccb[tag].cmd = NULL;
1279 hba->ccb[tag].sg_count = 0;
1280 hba->ccb[tag].sense_bufflen = 0;
1281 hba->ccb[tag].sense_buffer = NULL;
1282 hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1283
1284 stex_send_cmd(hba, req, tag);
1285 spin_unlock_irqrestore(hba->host->host_lock, flags);
1286
Ed Lincf355882006-09-01 14:31:51 +08001287 before = jiffies;
1288 while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1289 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1290 return;
1291 msleep(10);
1292 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001293}
1294
1295static void stex_hba_free(struct st_hba *hba)
1296{
1297 free_irq(hba->pdev->irq, hba);
1298
1299 iounmap(hba->mmio_base);
1300
1301 pci_release_regions(hba->pdev);
1302
Ed Lin94e91082006-12-04 17:49:39 -08001303 dma_free_coherent(&hba->pdev->dev, hba->dma_size,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001304 hba->dma_mem, hba->dma_handle);
1305}
1306
1307static void stex_remove(struct pci_dev *pdev)
1308{
1309 struct st_hba *hba = pci_get_drvdata(pdev);
1310
1311 scsi_remove_host(hba->host);
1312
1313 pci_set_drvdata(pdev, NULL);
1314
1315 stex_hba_stop(hba);
1316
1317 stex_hba_free(hba);
1318
1319 scsi_host_put(hba->host);
1320
1321 pci_disable_device(pdev);
1322}
1323
1324static void stex_shutdown(struct pci_dev *pdev)
1325{
1326 struct st_hba *hba = pci_get_drvdata(pdev);
1327
1328 stex_hba_stop(hba);
1329}
1330
1331static struct pci_device_id stex_pci_tbl[] = {
Ed Linee926b22006-12-04 17:49:36 -08001332 /* st_shasta */
1333 { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1334 st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */
1335 { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1336 st_shasta }, /* SuperTrak EX12350 */
1337 { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1338 st_shasta }, /* SuperTrak EX4350 */
1339 { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1340 st_shasta }, /* SuperTrak EX24350 */
1341
1342 /* st_vsc */
1343 { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1344
1345 /* st_yosemite */
1346 { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0,
1347 st_yosemite }, /* SuperTrak EX4650 */
1348 { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0,
1349 st_yosemite }, /* SuperTrak EX4650o */
1350 { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1351 st_yosemite }, /* SuperTrak EX8650EL */
1352 { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1353 st_yosemite }, /* SuperTrak EX8650 */
1354 { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1355 st_yosemite }, /* SuperTrak EX8654 */
1356 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1357 st_yosemite }, /* generic st_yosemite */
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001358 { } /* terminate list */
1359};
1360MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1361
1362static struct pci_driver stex_pci_driver = {
1363 .name = DRV_NAME,
1364 .id_table = stex_pci_tbl,
1365 .probe = stex_probe,
1366 .remove = __devexit_p(stex_remove),
1367 .shutdown = stex_shutdown,
1368};
1369
1370static int __init stex_init(void)
1371{
1372 printk(KERN_INFO DRV_NAME
1373 ": Promise SuperTrak EX Driver version: %s\n",
1374 ST_DRIVER_VERSION);
1375
1376 return pci_register_driver(&stex_pci_driver);
1377}
1378
1379static void __exit stex_exit(void)
1380{
1381 pci_unregister_driver(&stex_pci_driver);
1382}
1383
1384module_init(stex_init);
1385module_exit(stex_exit);