blob: 315c5032806702e0e133c0f526a448074f59de4a [file] [log] [blame]
Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
Kyungmin Park516607d2010-08-06 19:59:21 +09002 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
Kyungmin Park34d79312010-08-21 09:49:49 +090010#include <linux/platform_device.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090011#include <linux/serial_core.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090012#include <linux/input.h>
Kyungmin Park3b7998f2010-10-08 22:34:56 +090013#include <linux/i2c.h>
Kyungmin Park34d79312010-08-21 09:49:49 +090014#include <linux/gpio_keys.h>
15#include <linux/gpio.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090016#include <linux/fb.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090017#include <linux/mfd/max8998.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090018#include <linux/regulator/machine.h>
19#include <linux/regulator/fixed.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090020#include <linux/regulator/max8952.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090021#include <linux/mmc/host.h>
Marek Szyprowskib908af42011-06-22 13:43:39 +090022#include <linux/i2c-gpio.h>
23#include <linux/i2c/mcs.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090024#include <linux/i2c/atmel_mxt_ts.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090025
26#include <asm/mach/arch.h>
27#include <asm/mach-types.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090028
29#include <plat/regs-serial.h>
Kukjin Kimd11135c2011-02-14 14:59:52 +090030#include <plat/exynos4.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090031#include <plat/cpu.h>
Kyungmin Parkacf5eda2010-10-08 22:34:52 +090032#include <plat/devs.h>
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090033#include <plat/iic.h>
Marek Szyprowski0b398b62011-06-22 13:43:39 +090034#include <plat/gpio-cfg.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090035#include <plat/fb.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090036#include <plat/mfc.h>
Kyungmin Parka8928ce2010-12-22 13:34:23 +090037#include <plat/sdhci.h>
Kamil Debskib14f04d2011-07-21 16:43:20 +090038#include <plat/pd.h>
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +090039#include <plat/regs-fb-v4.h>
Kyungmin Park516607d2010-08-06 19:59:21 +090040
41#include <mach/map.h>
42
43/* Following are default values for UCON, ULCON and UFCON UART registers */
44#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
45 S3C2410_UCON_RXILEVEL | \
46 S3C2410_UCON_TXIRQMODE | \
47 S3C2410_UCON_RXIRQMODE | \
48 S3C2410_UCON_RXFIFO_TOI | \
49 S3C2443_UCON_RXERR_IRQEN)
50
51#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
52
53#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
54 S5PV210_UFCON_TXTRIG256 | \
55 S5PV210_UFCON_RXTRIG256)
56
57static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
58 [0] = {
59 .hwport = 0,
60 .ucon = UNIVERSAL_UCON_DEFAULT,
61 .ulcon = UNIVERSAL_ULCON_DEFAULT,
62 .ufcon = UNIVERSAL_UFCON_DEFAULT,
63 },
64 [1] = {
65 .hwport = 1,
66 .ucon = UNIVERSAL_UCON_DEFAULT,
67 .ulcon = UNIVERSAL_ULCON_DEFAULT,
68 .ufcon = UNIVERSAL_UFCON_DEFAULT,
69 },
70 [2] = {
71 .hwport = 2,
72 .ucon = UNIVERSAL_UCON_DEFAULT,
73 .ulcon = UNIVERSAL_ULCON_DEFAULT,
74 .ufcon = UNIVERSAL_UFCON_DEFAULT,
75 },
76 [3] = {
77 .hwport = 3,
78 .ucon = UNIVERSAL_UCON_DEFAULT,
79 .ulcon = UNIVERSAL_ULCON_DEFAULT,
80 .ufcon = UNIVERSAL_UFCON_DEFAULT,
81 },
82};
83
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090084static struct regulator_consumer_supply max8952_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +090085 REGULATOR_SUPPLY("vdd_arm", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +090086
87static struct max8952_platform_data universal_max8952_pdata __initdata = {
88 .gpio_vid0 = EXYNOS4_GPX0(3),
89 .gpio_vid1 = EXYNOS4_GPX0(4),
90 .gpio_en = -1, /* Not controllable, set "Always High" */
91 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
92 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
93 .sync_freq = 0, /* default: fastest */
94 .ramp_speed = 0, /* default: fastest */
95
96 .reg_data = {
97 .constraints = {
98 .name = "VARM_1.2V",
99 .min_uV = 770000,
100 .max_uV = 1400000,
101 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
102 .always_on = 1,
103 .boot_on = 1,
104 },
105 .num_consumer_supplies = 1,
106 .consumer_supplies = &max8952_consumer,
107 },
108};
109
110static struct regulator_consumer_supply lp3974_buck1_consumer =
Kyungmin Parkc1a238a2011-08-11 16:36:41 +0900111 REGULATOR_SUPPLY("vdd_int", NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900112
113static struct regulator_consumer_supply lp3974_buck2_consumer =
114 REGULATOR_SUPPLY("vddg3d", NULL);
115
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900116static struct regulator_consumer_supply lp3974_buck3_consumer =
117 REGULATOR_SUPPLY("vdet", "s5p-sdo");
118
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900119static struct regulator_init_data lp3974_buck1_data = {
120 .constraints = {
121 .name = "VINT_1.1V",
122 .min_uV = 750000,
123 .max_uV = 1500000,
124 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
125 REGULATOR_CHANGE_STATUS,
126 .boot_on = 1,
127 .state_mem = {
128 .disabled = 1,
129 },
130 },
131 .num_consumer_supplies = 1,
132 .consumer_supplies = &lp3974_buck1_consumer,
133};
134
135static struct regulator_init_data lp3974_buck2_data = {
136 .constraints = {
137 .name = "VG3D_1.1V",
138 .min_uV = 750000,
139 .max_uV = 1500000,
140 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
141 REGULATOR_CHANGE_STATUS,
142 .boot_on = 1,
143 .state_mem = {
144 .disabled = 1,
145 },
146 },
147 .num_consumer_supplies = 1,
148 .consumer_supplies = &lp3974_buck2_consumer,
149};
150
151static struct regulator_init_data lp3974_buck3_data = {
152 .constraints = {
153 .name = "VCC_1.8V",
154 .min_uV = 1800000,
155 .max_uV = 1800000,
156 .apply_uV = 1,
157 .always_on = 1,
158 .state_mem = {
159 .enabled = 1,
160 },
161 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900162 .num_consumer_supplies = 1,
163 .consumer_supplies = &lp3974_buck3_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900164};
165
166static struct regulator_init_data lp3974_buck4_data = {
167 .constraints = {
168 .name = "VMEM_1.2V",
169 .min_uV = 1200000,
170 .max_uV = 1200000,
171 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
172 .apply_uV = 1,
173 .state_mem = {
174 .disabled = 1,
175 },
176 },
177};
178
179static struct regulator_init_data lp3974_ldo2_data = {
180 .constraints = {
181 .name = "VALIVE_1.2V",
182 .min_uV = 1200000,
183 .max_uV = 1200000,
184 .apply_uV = 1,
185 .always_on = 1,
186 .state_mem = {
187 .enabled = 1,
188 },
189 },
190};
191
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900192static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
193 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
194 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
195};
196
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900197static struct regulator_init_data lp3974_ldo3_data = {
198 .constraints = {
199 .name = "VUSB+MIPI_1.1V",
200 .min_uV = 1100000,
201 .max_uV = 1100000,
202 .apply_uV = 1,
203 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
204 .state_mem = {
205 .disabled = 1,
206 },
207 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900208 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
209 .consumer_supplies = lp3974_ldo3_consumer,
210};
211
212static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
213 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900214};
215
216static struct regulator_init_data lp3974_ldo4_data = {
217 .constraints = {
218 .name = "VADC_3.3V",
219 .min_uV = 3300000,
220 .max_uV = 3300000,
221 .apply_uV = 1,
222 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
223 .state_mem = {
224 .disabled = 1,
225 },
226 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900227 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
228 .consumer_supplies = lp3974_ldo4_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900229};
230
231static struct regulator_init_data lp3974_ldo5_data = {
232 .constraints = {
233 .name = "VTF_2.8V",
234 .min_uV = 2800000,
235 .max_uV = 2800000,
236 .apply_uV = 1,
237 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
238 .state_mem = {
239 .disabled = 1,
240 },
241 },
242};
243
244static struct regulator_init_data lp3974_ldo6_data = {
245 .constraints = {
246 .name = "LDO6",
247 .min_uV = 2000000,
248 .max_uV = 2000000,
249 .apply_uV = 1,
250 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
251 .state_mem = {
252 .disabled = 1,
253 },
254 },
255};
256
257static struct regulator_init_data lp3974_ldo7_data = {
258 .constraints = {
259 .name = "VLCD+VMIPI_1.8V",
260 .min_uV = 1800000,
261 .max_uV = 1800000,
262 .apply_uV = 1,
263 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
264 .state_mem = {
265 .disabled = 1,
266 },
267 },
268};
269
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900270static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
271 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
272};
273
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900274static struct regulator_init_data lp3974_ldo8_data = {
275 .constraints = {
276 .name = "VUSB+VDAC_3.3V",
277 .min_uV = 3300000,
278 .max_uV = 3300000,
279 .apply_uV = 1,
280 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
281 .state_mem = {
282 .disabled = 1,
283 },
284 },
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900285 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
286 .consumer_supplies = lp3974_ldo8_consumer,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900287};
288
289static struct regulator_init_data lp3974_ldo9_data = {
290 .constraints = {
291 .name = "VCC_2.8V",
292 .min_uV = 2800000,
293 .max_uV = 2800000,
294 .apply_uV = 1,
295 .always_on = 1,
296 .state_mem = {
297 .enabled = 1,
298 },
299 },
300};
301
302static struct regulator_init_data lp3974_ldo10_data = {
303 .constraints = {
304 .name = "VPLL_1.1V",
305 .min_uV = 1100000,
306 .max_uV = 1100000,
307 .boot_on = 1,
308 .apply_uV = 1,
309 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
310 .state_mem = {
311 .disabled = 1,
312 },
313 },
314};
315
316static struct regulator_init_data lp3974_ldo11_data = {
317 .constraints = {
318 .name = "CAM_AF_3.3V",
319 .min_uV = 3300000,
320 .max_uV = 3300000,
321 .apply_uV = 1,
322 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
323 .state_mem = {
324 .disabled = 1,
325 },
326 },
327};
328
329static struct regulator_init_data lp3974_ldo12_data = {
330 .constraints = {
331 .name = "PS_2.8V",
332 .min_uV = 2800000,
333 .max_uV = 2800000,
334 .apply_uV = 1,
335 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
336 .state_mem = {
337 .disabled = 1,
338 },
339 },
340};
341
342static struct regulator_init_data lp3974_ldo13_data = {
343 .constraints = {
344 .name = "VHIC_1.2V",
345 .min_uV = 1200000,
346 .max_uV = 1200000,
347 .apply_uV = 1,
348 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
349 .state_mem = {
350 .disabled = 1,
351 },
352 },
353};
354
355static struct regulator_init_data lp3974_ldo14_data = {
356 .constraints = {
357 .name = "CAM_I_HOST_1.8V",
358 .min_uV = 1800000,
359 .max_uV = 1800000,
360 .apply_uV = 1,
361 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
362 .state_mem = {
363 .disabled = 1,
364 },
365 },
366};
367
368static struct regulator_init_data lp3974_ldo15_data = {
369 .constraints = {
370 .name = "CAM_S_DIG+FM33_CORE_1.2V",
371 .min_uV = 1200000,
372 .max_uV = 1200000,
373 .apply_uV = 1,
374 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
375 .state_mem = {
376 .disabled = 1,
377 },
378 },
379};
380
381static struct regulator_init_data lp3974_ldo16_data = {
382 .constraints = {
383 .name = "CAM_S_ANA_2.8V",
384 .min_uV = 2800000,
385 .max_uV = 2800000,
386 .apply_uV = 1,
387 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
388 .state_mem = {
389 .disabled = 1,
390 },
391 },
392};
393
394static struct regulator_init_data lp3974_ldo17_data = {
395 .constraints = {
396 .name = "VCC_3.0V_LCD",
397 .min_uV = 3000000,
398 .max_uV = 3000000,
399 .apply_uV = 1,
400 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
401 .boot_on = 1,
402 .state_mem = {
403 .disabled = 1,
404 },
405 },
406};
407
408static struct regulator_init_data lp3974_32khz_ap_data = {
409 .constraints = {
410 .name = "32KHz AP",
411 .always_on = 1,
412 .state_mem = {
413 .enabled = 1,
414 },
415 },
416};
417
418static struct regulator_init_data lp3974_32khz_cp_data = {
419 .constraints = {
420 .name = "32KHz CP",
421 .state_mem = {
422 .disabled = 1,
423 },
424 },
425};
426
427static struct regulator_init_data lp3974_vichg_data = {
428 .constraints = {
429 .name = "VICHG",
430 .state_mem = {
431 .disabled = 1,
432 },
433 },
434};
435
436static struct regulator_init_data lp3974_esafeout1_data = {
437 .constraints = {
438 .name = "SAFEOUT1",
439 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
440 .state_mem = {
441 .enabled = 1,
442 },
443 },
444};
445
446static struct regulator_init_data lp3974_esafeout2_data = {
447 .constraints = {
448 .name = "SAFEOUT2",
449 .boot_on = 1,
450 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
451 .state_mem = {
452 .enabled = 1,
453 },
454 },
455};
456
457static struct max8998_regulator_data lp3974_regulators[] = {
458 { MAX8998_LDO2, &lp3974_ldo2_data },
459 { MAX8998_LDO3, &lp3974_ldo3_data },
460 { MAX8998_LDO4, &lp3974_ldo4_data },
461 { MAX8998_LDO5, &lp3974_ldo5_data },
462 { MAX8998_LDO6, &lp3974_ldo6_data },
463 { MAX8998_LDO7, &lp3974_ldo7_data },
464 { MAX8998_LDO8, &lp3974_ldo8_data },
465 { MAX8998_LDO9, &lp3974_ldo9_data },
466 { MAX8998_LDO10, &lp3974_ldo10_data },
467 { MAX8998_LDO11, &lp3974_ldo11_data },
468 { MAX8998_LDO12, &lp3974_ldo12_data },
469 { MAX8998_LDO13, &lp3974_ldo13_data },
470 { MAX8998_LDO14, &lp3974_ldo14_data },
471 { MAX8998_LDO15, &lp3974_ldo15_data },
472 { MAX8998_LDO16, &lp3974_ldo16_data },
473 { MAX8998_LDO17, &lp3974_ldo17_data },
474 { MAX8998_BUCK1, &lp3974_buck1_data },
475 { MAX8998_BUCK2, &lp3974_buck2_data },
476 { MAX8998_BUCK3, &lp3974_buck3_data },
477 { MAX8998_BUCK4, &lp3974_buck4_data },
478 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
479 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
480 { MAX8998_ENVICHG, &lp3974_vichg_data },
481 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
482 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
483};
484
485static struct max8998_platform_data universal_lp3974_pdata = {
486 .num_regulators = ARRAY_SIZE(lp3974_regulators),
487 .regulators = lp3974_regulators,
488 .buck1_voltage1 = 1100000, /* INT */
489 .buck1_voltage2 = 1000000,
490 .buck1_voltage3 = 1100000,
491 .buck1_voltage4 = 1000000,
492 .buck1_set1 = EXYNOS4_GPX0(5),
493 .buck1_set2 = EXYNOS4_GPX0(6),
494 .buck2_voltage1 = 1200000, /* G3D */
495 .buck2_voltage2 = 1100000,
496 .buck1_default_idx = 0,
497 .buck2_set3 = EXYNOS4_GPE2(0),
498 .buck2_default_idx = 0,
499 .wakeup = true,
500};
501
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900502static struct regulator_consumer_supply hdmi_fixed_consumer =
503 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
504
505static struct regulator_init_data hdmi_fixed_voltage_init_data = {
506 .constraints = {
507 .name = "HDMI_5V",
508 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
509 },
510 .num_consumer_supplies = 1,
511 .consumer_supplies = &hdmi_fixed_consumer,
512};
513
514static struct fixed_voltage_config hdmi_fixed_voltage_config = {
515 .supply_name = "HDMI_EN1",
516 .microvolts = 5000000,
517 .gpio = EXYNOS4_GPE0(1),
518 .enable_high = true,
519 .init_data = &hdmi_fixed_voltage_init_data,
520};
521
522static struct platform_device hdmi_fixed_voltage = {
523 .name = "reg-fixed-voltage",
524 .id = 6,
525 .dev = {
526 .platform_data = &hdmi_fixed_voltage_config,
527 },
528};
529
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900530/* GPIO I2C 5 (PMIC) */
531static struct i2c_board_info i2c5_devs[] __initdata = {
532 {
533 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
534 .platform_data = &universal_max8952_pdata,
535 }, {
536 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
537 .platform_data = &universal_lp3974_pdata,
538 },
539};
540
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900541/* I2C3 (TSP) */
542static struct mxt_platform_data qt602240_platform_data = {
543 .x_line = 19,
544 .y_line = 11,
545 .x_size = 800,
546 .y_size = 480,
547 .blen = 0x11,
548 .threshold = 0x28,
549 .voltage = 2800000, /* 2.8V */
550 .orient = MXT_DIAGONAL,
551};
552
553static struct i2c_board_info i2c3_devs[] __initdata = {
554 {
555 I2C_BOARD_INFO("qt602240_ts", 0x4a),
556 .platform_data = &qt602240_platform_data,
557 },
558};
559
560static void __init universal_tsp_init(void)
561{
562 int gpio;
563
564 /* TSP_LDO_ON: XMDMADDR_11 */
565 gpio = EXYNOS4_GPE2(3);
566 gpio_request(gpio, "TSP_LDO_ON");
567 gpio_direction_output(gpio, 1);
568 gpio_export(gpio, 0);
569
570 /* TSP_INT: XMDMADDR_7 */
571 gpio = EXYNOS4_GPE1(7);
572 gpio_request(gpio, "TSP_INT");
573
574 s5p_register_gpio_interrupt(gpio);
575 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
576 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
577 i2c3_devs[0].irq = gpio_to_irq(gpio);
578}
579
580
Marek Szyprowskib908af42011-06-22 13:43:39 +0900581/* GPIO I2C 12 (3 Touchkey) */
582static uint32_t touchkey_keymap[] = {
583 /* MCS_KEY_MAP(value, keycode) */
584 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
585 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
586};
587
588static struct mcs_platform_data touchkey_data = {
589 .keymap = touchkey_keymap,
590 .keymap_size = ARRAY_SIZE(touchkey_keymap),
591 .key_maxval = 2,
592};
593
594/* GPIO I2C 3_TOUCH 2.8V */
595#define I2C_GPIO_BUS_12 12
596static struct i2c_gpio_platform_data i2c_gpio12_data = {
597 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
598 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
599};
600
601static struct platform_device i2c_gpio12 = {
602 .name = "i2c-gpio",
603 .id = I2C_GPIO_BUS_12,
604 .dev = {
605 .platform_data = &i2c_gpio12_data,
606 },
607};
608
609static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
610 {
611 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
612 .platform_data = &touchkey_data,
613 },
614};
615
616static void __init universal_touchkey_init(void)
617{
618 int gpio;
619
620 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
621 gpio_request(gpio, "3_TOUCH_INT");
622 s5p_register_gpio_interrupt(gpio);
623 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
624 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
625
626 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
627 gpio_request(gpio, "3_TOUCH_EN");
628 gpio_direction_output(gpio, 1);
629}
630
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900631/* GPIO KEYS */
Kyungmin Park34d79312010-08-21 09:49:49 +0900632static struct gpio_keys_button universal_gpio_keys_tables[] = {
633 {
634 .code = KEY_VOLUMEUP,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900635 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900636 .desc = "gpio-keys: KEY_VOLUMEUP",
637 .type = EV_KEY,
638 .active_low = 1,
639 .debounce_interval = 1,
640 }, {
641 .code = KEY_VOLUMEDOWN,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900642 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900643 .desc = "gpio-keys: KEY_VOLUMEDOWN",
644 .type = EV_KEY,
645 .active_low = 1,
646 .debounce_interval = 1,
647 }, {
648 .code = KEY_CONFIG,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900649 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900650 .desc = "gpio-keys: KEY_CONFIG",
651 .type = EV_KEY,
652 .active_low = 1,
653 .debounce_interval = 1,
654 }, {
655 .code = KEY_CAMERA,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900656 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900657 .desc = "gpio-keys: KEY_CAMERA",
658 .type = EV_KEY,
659 .active_low = 1,
660 .debounce_interval = 1,
661 }, {
662 .code = KEY_OK,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900663 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
Kyungmin Park34d79312010-08-21 09:49:49 +0900664 .desc = "gpio-keys: KEY_OK",
665 .type = EV_KEY,
666 .active_low = 1,
667 .debounce_interval = 1,
668 },
669};
670
671static struct gpio_keys_platform_data universal_gpio_keys_data = {
672 .buttons = universal_gpio_keys_tables,
673 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
674};
675
676static struct platform_device universal_gpio_keys = {
677 .name = "gpio-keys",
678 .dev = {
679 .platform_data = &universal_gpio_keys_data,
680 },
681};
682
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900683/* eMMC */
684static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
685 .max_width = 8,
686 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
687 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
688 MMC_CAP_DISABLE),
689 .cd_type = S3C_SDHCI_CD_PERMANENT,
690 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
691};
692
693static struct regulator_consumer_supply mmc0_supplies[] = {
694 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
695};
696
697static struct regulator_init_data mmc0_fixed_voltage_init_data = {
698 .constraints = {
699 .name = "VMEM_VDD_2.8V",
700 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
701 },
702 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
703 .consumer_supplies = mmc0_supplies,
704};
705
706static struct fixed_voltage_config mmc0_fixed_voltage_config = {
707 .supply_name = "MASSMEMORY_EN",
708 .microvolts = 2800000,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900709 .gpio = EXYNOS4_GPE1(3),
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900710 .enable_high = true,
711 .init_data = &mmc0_fixed_voltage_init_data,
712};
713
714static struct platform_device mmc0_fixed_voltage = {
715 .name = "reg-fixed-voltage",
716 .id = 0,
717 .dev = {
718 .platform_data = &mmc0_fixed_voltage_config,
719 },
720};
721
722/* SD */
723static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
724 .max_width = 4,
725 .host_caps = MMC_CAP_4_BIT_DATA |
726 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
727 MMC_CAP_DISABLE,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900728 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900729 .ext_cd_gpio_invert = 1,
730 .cd_type = S3C_SDHCI_CD_GPIO,
731 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
732};
733
734/* WiFi */
735static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
736 .max_width = 4,
737 .host_caps = MMC_CAP_4_BIT_DATA |
738 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
739 MMC_CAP_DISABLE,
740 .cd_type = S3C_SDHCI_CD_EXTERNAL,
741};
742
743static void __init universal_sdhci_init(void)
744{
745 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
746 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
747 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
748}
749
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900750/* I2C0 */
751static struct i2c_board_info i2c0_devs[] __initdata = {
752 /* Camera, To be updated */
753};
754
755/* I2C1 */
756static struct i2c_board_info i2c1_devs[] __initdata = {
757 /* Gyro, To be updated */
758};
759
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900760/* Frame Buffer */
761static struct s3c_fb_pd_win universal_fb_win0 = {
762 .win_mode = {
763 .left_margin = 16,
764 .right_margin = 16,
765 .upper_margin = 2,
766 .lower_margin = 28,
767 .hsync_len = 2,
768 .vsync_len = 1,
769 .xres = 480,
770 .yres = 800,
771 .refresh = 55,
772 },
773 .max_bpp = 32,
774 .default_bpp = 16,
775};
776
777static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
778 .win[0] = &universal_fb_win0,
779 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
780 VIDCON0_CLKSEL_LCD,
781 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
782 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
783 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
784};
785
Kyungmin Park34d79312010-08-21 09:49:49 +0900786static struct platform_device *universal_devices[] __initdata = {
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900787 /* Samsung Platform Devices */
Marek Szyprowskiedd967b2011-06-22 13:43:39 +0900788 &s5p_device_fimc0,
789 &s5p_device_fimc1,
790 &s5p_device_fimc2,
791 &s5p_device_fimc3,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900792 &mmc0_fixed_voltage,
793 &s3c_device_hsmmc0,
794 &s3c_device_hsmmc2,
795 &s3c_device_hsmmc3,
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900796 &s3c_device_i2c3,
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900797 &s3c_device_i2c5,
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900798 &s5p_device_i2c_hdmiphy,
799 &hdmi_fixed_voltage,
800 &exynos4_device_pd[PD_TV],
801 &s5p_device_hdmi,
802 &s5p_device_sdo,
803 &s5p_device_mixer,
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900804
805 /* Universal Devices */
Marek Szyprowskib908af42011-06-22 13:43:39 +0900806 &i2c_gpio12,
Kyungmin Park34d79312010-08-21 09:49:49 +0900807 &universal_gpio_keys,
Kyungmin Parkacf5eda2010-10-08 22:34:52 +0900808 &s5p_device_onenand,
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900809 &s5p_device_fimd0,
Kamil Debskib14f04d2011-07-21 16:43:20 +0900810 &s5p_device_mfc,
811 &s5p_device_mfc_l,
812 &s5p_device_mfc_r,
813 &exynos4_device_pd[PD_MFC],
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900814 &exynos4_device_pd[PD_LCD0],
Kyungmin Park34d79312010-08-21 09:49:49 +0900815};
816
Kyungmin Park516607d2010-08-06 19:59:21 +0900817static void __init universal_map_io(void)
818{
819 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
820 s3c24xx_init_clocks(24000000);
821 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
822}
823
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900824void s5p_tv_setup(void)
825{
826 /* direct HPD to HDMI chip */
827 gpio_request(EXYNOS4_GPX3(7), "hpd-plug");
828
829 gpio_direction_input(EXYNOS4_GPX3(7));
830 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
831 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
832
833 /* setup dependencies between TV devices */
834 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
835 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
836}
837
Kamil Debskib14f04d2011-07-21 16:43:20 +0900838static void __init universal_reserve(void)
839{
840 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
841}
842
Kyungmin Park516607d2010-08-06 19:59:21 +0900843static void __init universal_machine_init(void)
844{
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900845 universal_sdhci_init();
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900846 s5p_tv_setup();
Kyungmin Parka8928ce2010-12-22 13:34:23 +0900847
Kyungmin Park3b7998f2010-10-08 22:34:56 +0900848 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
849 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
850
Marek Szyprowski0b398b62011-06-22 13:43:39 +0900851 universal_tsp_init();
852 s3c_i2c3_set_platdata(NULL);
853 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
854
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900855 s3c_i2c5_set_platdata(NULL);
Tomasz Stanislawskid737cf22011-09-16 18:48:32 +0900856 s5p_i2c_hdmiphy_set_platdata(NULL);
Marek Szyprowski4d838ec2011-03-04 10:19:52 +0900857 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
858
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900859 s5p_fimd0_set_platdata(&universal_lcd_pdata);
860
Marek Szyprowskib908af42011-06-22 13:43:39 +0900861 universal_touchkey_init();
862 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
863 ARRAY_SIZE(i2c_gpio12_devs));
864
Kyungmin Park34d79312010-08-21 09:49:49 +0900865 /* Last */
866 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
Kamil Debskib14f04d2011-07-21 16:43:20 +0900867 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
Marek Szyprowskif3f5bfe2011-08-11 19:55:40 +0900868 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
Kyungmin Park516607d2010-08-06 19:59:21 +0900869}
870
871MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
872 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
Kyungmin Park516607d2010-08-06 19:59:21 +0900873 .boot_params = S5P_PA_SDRAM + 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900874 .init_irq = exynos4_init_irq,
Kyungmin Park516607d2010-08-06 19:59:21 +0900875 .map_io = universal_map_io,
876 .init_machine = universal_machine_init,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900877 .timer = &exynos4_timer,
Kamil Debskib14f04d2011-07-21 16:43:20 +0900878 .reserve = &universal_reserve,
Kyungmin Park516607d2010-08-06 19:59:21 +0900879MACHINE_END