Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * BRIEF MODULE DESCRIPTION |
| 4 | * Alchemy Db1x00 board setup. |
| 5 | * |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 6 | * Copyright 2000, 2008 MontaVista Software Inc. |
| 7 | * Author: MontaVista Software, Inc. <source@mvista.com> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 15 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 16 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 17 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 18 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 19 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 20 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 21 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 23 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License along |
| 26 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 27 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 28 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Manuel Lauss | ce65cc8 | 2009-06-06 14:09:58 +0200 | [diff] [blame] | 30 | #include <linux/gpio.h> |
Sergei Shtylyov | ce28f94 | 2008-04-23 22:43:55 +0400 | [diff] [blame] | 31 | #include <linux/init.h> |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 32 | #include <linux/interrupt.h> |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 33 | #include <linux/pm.h> |
Sergei Shtylyov | ce28f94 | 2008-04-23 22:43:55 +0400 | [diff] [blame] | 34 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <asm/mach-au1x00/au1000.h> |
Florian Fainelli | 66f75cc | 2009-11-10 01:13:30 +0100 | [diff] [blame] | 36 | #include <asm/mach-au1x00/au1xxx_eth.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <asm/mach-db1x00/db1x00.h> |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 38 | #include <asm/mach-db1x00/bcsr.h> |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 39 | #include <asm/reboot.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | |
Manuel Lauss | 7179380 | 2008-12-21 09:26:16 +0100 | [diff] [blame] | 41 | #include <prom.h> |
| 42 | |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 43 | #ifdef CONFIG_MIPS_DB1500 |
| 44 | char irq_tab_alchemy[][5] __initdata = { |
Manuel Lauss | 7881446 | 2009-10-07 20:15:15 +0200 | [diff] [blame] | 45 | [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - HPT371 */ |
| 46 | [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 47 | }; |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 48 | |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 49 | #endif |
| 50 | |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 51 | |
| 52 | #ifdef CONFIG_MIPS_DB1550 |
| 53 | char irq_tab_alchemy[][5] __initdata = { |
| 54 | [11] = { -1, AU1550_PCI_INTC, 0xff, 0xff, 0xff }, /* IDSEL 11 - on-board HPT371 */ |
| 55 | [12] = { -1, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD, AU1550_PCI_INTA }, /* IDSEL 12 - PCI slot 2 (left) */ |
| 56 | [13] = { -1, AU1550_PCI_INTA, AU1550_PCI_INTB, AU1550_PCI_INTC, AU1550_PCI_INTD }, /* IDSEL 13 - PCI slot 1 (right) */ |
| 57 | }; |
| 58 | #endif |
| 59 | |
| 60 | |
| 61 | #ifdef CONFIG_MIPS_BOSPORUS |
| 62 | char irq_tab_alchemy[][5] __initdata = { |
| 63 | [11] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 11 - miniPCI */ |
| 64 | [12] = { -1, AU1500_PCI_INTA, 0xff, 0xff, 0xff }, /* IDSEL 12 - SN1741 */ |
| 65 | [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, AU1500_PCI_INTC, AU1500_PCI_INTD }, /* IDSEL 13 - PCI slot */ |
| 66 | }; |
| 67 | |
Florian Fainelli | 66f75cc | 2009-11-10 01:13:30 +0100 | [diff] [blame] | 68 | /* |
| 69 | * Micrel/Kendin 5 port switch attached to MAC0, |
| 70 | * MAC0 is associated with PHY address 5 (== WAN port) |
| 71 | * MAC1 is not associated with any PHY, since it's connected directly |
| 72 | * to the switch. |
| 73 | * no interrupts are used |
| 74 | */ |
| 75 | static struct au1000_eth_platform_data eth0_pdata = { |
| 76 | .phy_static_config = 1, |
| 77 | .phy_addr = 5, |
| 78 | }; |
| 79 | |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 80 | static void bosporus_power_off(void) |
| 81 | { |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 82 | while (1) |
| 83 | asm volatile (".set mips3 ; wait ; .set mips0"); |
| 84 | } |
Florian Fainelli | 66f75cc | 2009-11-10 01:13:30 +0100 | [diff] [blame] | 85 | |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 86 | const char *get_system_type(void) |
| 87 | { |
| 88 | return "Alchemy Bosporus Gateway Reference"; |
| 89 | } |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 90 | #endif |
| 91 | |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 92 | |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 93 | #ifdef CONFIG_MIPS_MIRAGE |
| 94 | char irq_tab_alchemy[][5] __initdata = { |
Manuel Lauss | 7881446 | 2009-10-07 20:15:15 +0200 | [diff] [blame] | 95 | [11] = { -1, AU1500_PCI_INTD, 0xff, 0xff, 0xff }, /* IDSEL 11 - SMI VGX */ |
| 96 | [12] = { -1, 0xff, 0xff, AU1500_PCI_INTC, 0xff }, /* IDSEL 12 - PNX1300 */ |
| 97 | [13] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 13 - miniPCI */ |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 98 | }; |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 99 | |
| 100 | static void mirage_power_off(void) |
| 101 | { |
| 102 | alchemy_gpio_direction_output(210, 1); |
| 103 | } |
| 104 | |
| 105 | const char *get_system_type(void) |
| 106 | { |
| 107 | return "Alchemy Mirage"; |
| 108 | } |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 109 | #endif |
| 110 | |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 111 | |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 112 | #if defined(CONFIG_MIPS_BOSPORUS) || defined(CONFIG_MIPS_MIRAGE) |
| 113 | static void mips_softreset(void) |
Manuel Lauss | 23ba25d | 2008-12-21 09:26:15 +0100 | [diff] [blame] | 114 | { |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 115 | asm volatile ("jr\t%0" : : "r"(0xbfc00000)); |
Manuel Lauss | 23ba25d | 2008-12-21 09:26:15 +0100 | [diff] [blame] | 116 | } |
| 117 | |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 118 | #else |
| 119 | |
| 120 | const char *get_system_type(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | { |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 122 | return "Alchemy Db1x00"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | } |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 124 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | |
Manuel Lauss | 570cb45 | 2010-02-26 17:22:01 +0100 | [diff] [blame] | 126 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | void __init board_setup(void) |
| 128 | { |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 129 | unsigned long bcsr1, bcsr2; |
Florian Fainelli | 32fc0ad | 2009-10-18 16:04:09 +0200 | [diff] [blame] | 130 | u32 pin_func; |
Manuel Lauss | 7179380 | 2008-12-21 09:26:16 +0100 | [diff] [blame] | 131 | |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 132 | bcsr1 = DB1000_BCSR_PHYS_ADDR; |
| 133 | bcsr2 = DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS; |
| 134 | |
Florian Fainelli | 32fc0ad | 2009-10-18 16:04:09 +0200 | [diff] [blame] | 135 | pin_func = 0; |
| 136 | |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 137 | #ifdef CONFIG_MIPS_DB1000 |
| 138 | printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n"); |
| 139 | #endif |
| 140 | #ifdef CONFIG_MIPS_DB1500 |
| 141 | printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n"); |
| 142 | #endif |
| 143 | #ifdef CONFIG_MIPS_DB1100 |
| 144 | printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n"); |
| 145 | #endif |
| 146 | #ifdef CONFIG_MIPS_BOSPORUS |
Florian Fainelli | 66f75cc | 2009-11-10 01:13:30 +0100 | [diff] [blame] | 147 | au1xxx_override_eth_cfg(0, ð0_pdata); |
| 148 | |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 149 | printk(KERN_INFO "AMD Alchemy Bosporus Board\n"); |
| 150 | #endif |
| 151 | #ifdef CONFIG_MIPS_MIRAGE |
| 152 | printk(KERN_INFO "AMD Alchemy Mirage Board\n"); |
| 153 | #endif |
| 154 | #ifdef CONFIG_MIPS_DB1550 |
| 155 | printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n"); |
| 156 | |
| 157 | bcsr1 = DB1550_BCSR_PHYS_ADDR; |
| 158 | bcsr2 = DB1550_BCSR_PHYS_ADDR + DB1550_BCSR_HEXLED_OFS; |
| 159 | #endif |
| 160 | |
| 161 | /* initialize board register space */ |
| 162 | bcsr_init(bcsr1, bcsr2); |
| 163 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 164 | /* Not valid for Au1550 */ |
| 165 | #if defined(CONFIG_IRDA) && \ |
| 166 | (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100)) |
| 167 | /* Set IRFIRSEL instead of GPIO15 */ |
| 168 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | au_writel(pin_func, SYS_PINFUNC); |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 170 | /* Power off until the driver is in use */ |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 171 | bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK, |
| 172 | BCSR_RESETS_IRDA_MODE_OFF); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | #endif |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame] | 174 | bcsr_write(BCSR_PCMCIA, 0); /* turn off PCMCIA power */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 176 | /* Enable GPIO[31:0] inputs */ |
Manuel Lauss | ce65cc8 | 2009-06-06 14:09:58 +0200 | [diff] [blame] | 177 | alchemy_gpio1_input_enable(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
Manuel Lauss | ce65cc8 | 2009-06-06 14:09:58 +0200 | [diff] [blame] | 179 | #ifdef CONFIG_MIPS_MIRAGE |
| 180 | /* GPIO[20] is output */ |
| 181 | alchemy_gpio_direction_output(20, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 183 | /* Set GPIO[210:208] instead of SSI_0 */ |
| 184 | pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 186 | /* Set GPIO[215:211] for LEDs */ |
| 187 | pin_func |= 5 << 2; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 189 | /* Set GPIO[214:213] for more LEDs */ |
| 190 | pin_func |= 5 << 12; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 192 | /* Set GPIO[207:200] instead of PCMCIA/LCD */ |
| 193 | pin_func |= SYS_PF_LCD | SYS_PF_PC; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | au_writel(pin_func, SYS_PINFUNC); |
| 195 | |
Sergei Shtylyov | abd14cc | 2008-04-30 23:25:04 +0400 | [diff] [blame] | 196 | /* |
| 197 | * Enable speaker amplifier. This should |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | * be part of the audio driver. |
| 199 | */ |
Manuel Lauss | ce65cc8 | 2009-06-06 14:09:58 +0200 | [diff] [blame] | 200 | alchemy_gpio_direction_output(209, 1); |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 201 | |
| 202 | pm_power_off = mirage_power_off; |
| 203 | _machine_halt = mirage_power_off; |
| 204 | _machine_restart = (void(*)(char *))mips_softreset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | #endif |
| 206 | |
Manuel Lauss | 32fd690 | 2009-12-08 19:18:13 +0100 | [diff] [blame] | 207 | #ifdef CONFIG_MIPS_BOSPORUS |
| 208 | pm_power_off = bosporus_power_off; |
| 209 | _machine_halt = bosporus_power_off; |
| 210 | _machine_restart = (void(*)(char *))mips_softreset; |
| 211 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | au_sync(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | } |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 214 | |
| 215 | static int __init db1x00_init_irq(void) |
| 216 | { |
| 217 | #if defined(CONFIG_MIPS_MIRAGE) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 218 | irq_set_irq_type(AU1500_GPIO7_INT, IRQF_TRIGGER_RISING); /* TS pendown */ |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 219 | #elif defined(CONFIG_MIPS_DB1550) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 220 | irq_set_irq_type(AU1550_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ |
| 221 | irq_set_irq_type(AU1550_GPIO1_INT, IRQF_TRIGGER_LOW); /* CD1# */ |
| 222 | irq_set_irq_type(AU1550_GPIO3_INT, IRQF_TRIGGER_LOW); /* CARD0# */ |
| 223 | irq_set_irq_type(AU1550_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ |
| 224 | irq_set_irq_type(AU1550_GPIO21_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ |
| 225 | irq_set_irq_type(AU1550_GPIO22_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ |
Manuel Lauss | 7881446 | 2009-10-07 20:15:15 +0200 | [diff] [blame] | 226 | #elif defined(CONFIG_MIPS_DB1500) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 227 | irq_set_irq_type(AU1500_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ |
| 228 | irq_set_irq_type(AU1500_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ |
| 229 | irq_set_irq_type(AU1500_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ |
| 230 | irq_set_irq_type(AU1500_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ |
| 231 | irq_set_irq_type(AU1500_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ |
| 232 | irq_set_irq_type(AU1500_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ |
Manuel Lauss | 7881446 | 2009-10-07 20:15:15 +0200 | [diff] [blame] | 233 | #elif defined(CONFIG_MIPS_DB1100) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 234 | irq_set_irq_type(AU1100_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ |
| 235 | irq_set_irq_type(AU1100_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ |
| 236 | irq_set_irq_type(AU1100_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ |
| 237 | irq_set_irq_type(AU1100_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ |
| 238 | irq_set_irq_type(AU1100_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ |
| 239 | irq_set_irq_type(AU1100_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ |
Manuel Lauss | 7881446 | 2009-10-07 20:15:15 +0200 | [diff] [blame] | 240 | #elif defined(CONFIG_MIPS_DB1000) |
Thomas Gleixner | e4ec798 | 2011-03-27 15:19:28 +0200 | [diff] [blame] | 241 | irq_set_irq_type(AU1000_GPIO0_INT, IRQF_TRIGGER_LOW); /* CD0# */ |
| 242 | irq_set_irq_type(AU1000_GPIO3_INT, IRQF_TRIGGER_LOW); /* CD1# */ |
| 243 | irq_set_irq_type(AU1000_GPIO2_INT, IRQF_TRIGGER_LOW); /* CARD0# */ |
| 244 | irq_set_irq_type(AU1000_GPIO5_INT, IRQF_TRIGGER_LOW); /* CARD1# */ |
| 245 | irq_set_irq_type(AU1000_GPIO1_INT, IRQF_TRIGGER_LOW); /* STSCHG0# */ |
| 246 | irq_set_irq_type(AU1000_GPIO4_INT, IRQF_TRIGGER_LOW); /* STSCHG1# */ |
Manuel Lauss | 7e50b2b | 2009-10-04 14:55:26 +0200 | [diff] [blame] | 247 | #endif |
| 248 | return 0; |
| 249 | } |
| 250 | arch_initcall(db1x00_init_irq); |