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gerrit-public.fairphone.software / kernel / msm / dc803df8dd68a045bea4753f5300eeecb961ca2d / . / drivers / net / sfc / efx.h
blob: 179e0e3b0ec6965a3db204d3ac117d3e7796ef9a [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2008 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#ifndef EFX_EFX_H
12#define EFX_EFX_H
13
14#include "net_driver.h"
15
16/* PCI IDs */
17#define EFX_VENDID_SFC 0x1924
18#define FALCON_A_P_DEVID 0x0703
19#define FALCON_A_S_DEVID 0x6703
20#define FALCON_B_P_DEVID 0x0710
21
Ben Hutchingsdc803df2009-10-23 08:32:33 +0000[diff] [blame^]22/* Solarstorm controllers use BAR 0 for I/O space and BAR 2(&3) for memory */
23#define EFX_MEM_BAR 2
24
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]25/* TX */
Stephen Hemminger613573252009-08-31 19:50:58 +0000[diff] [blame]26extern netdev_tx_t efx_xmit(struct efx_nic *efx,
27 struct efx_tx_queue *tx_queue,
28 struct sk_buff *skb);
Ben Hutchings59cf09c2009-10-23 08:31:54 +0000[diff] [blame]29extern void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]30extern void efx_stop_queue(struct efx_nic *efx);
31extern void efx_wake_queue(struct efx_nic *efx);
Ben Hutchings3ffeabd2009-10-23 08:30:58 +0000[diff] [blame]32#define EFX_TXQ_SIZE 1024
33#define EFX_TXQ_MASK (EFX_TXQ_SIZE - 1)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]34
35/* RX */
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]36extern void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100[diff] [blame]37 unsigned int len, bool checksummed, bool discard);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]38extern void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay);
Ben Hutchings3ffeabd2009-10-23 08:30:58 +0000[diff] [blame]39#define EFX_RXQ_SIZE 1024
40#define EFX_RXQ_MASK (EFX_RXQ_SIZE - 1)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]41
42/* Channels */
43extern void efx_process_channel_now(struct efx_channel *channel);
Ben Hutchingsbc3c90a2008-09-01 12:48:46 +0100[diff] [blame]44extern void efx_flush_queues(struct efx_nic *efx);
Ben Hutchings3ffeabd2009-10-23 08:30:58 +0000[diff] [blame]45#define EFX_EVQ_SIZE 4096
46#define EFX_EVQ_MASK (EFX_EVQ_SIZE - 1)
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]47
48/* Ports */
Ben Hutchings1974cc22009-01-29 18:00:07 +0000[diff] [blame]49extern void efx_stats_disable(struct efx_nic *efx);
50extern void efx_stats_enable(struct efx_nic *efx);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]51extern void efx_reconfigure_port(struct efx_nic *efx);
Ben Hutchings8c8661e2008-09-01 12:49:02 +0100[diff] [blame]52extern void __efx_reconfigure_port(struct efx_nic *efx);
53
54/* Reset handling */
Steve Hodgson4b988282009-01-29 17:50:51 +0000[diff] [blame]55extern void efx_reset_down(struct efx_nic *efx, enum reset_type method,
56 struct ethtool_cmd *ecmd);
57extern int efx_reset_up(struct efx_nic *efx, enum reset_type method,
58 struct ethtool_cmd *ecmd, bool ok);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]59
60/* Global */
61extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
62extern void efx_suspend(struct efx_nic *efx);
63extern void efx_resume(struct efx_nic *efx);
64extern void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs,
Ben Hutchings6fb70fd2009-03-20 13:30:37 +0000[diff] [blame]65 int rx_usecs, bool rx_adaptive);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]66extern int efx_request_power(struct efx_nic *efx, int mw, const char *name);
67extern void efx_hex_dump(const u8 *, unsigned int, const char *);
68
69/* Dummy PHY ops for PHY drivers */
70extern int efx_port_dummy_op_int(struct efx_nic *efx);
71extern void efx_port_dummy_op_void(struct efx_nic *efx);
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100[diff] [blame]72extern void efx_port_dummy_op_blink(struct efx_nic *efx, bool blink);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]73
Ben Hutchingsf4150722008-11-04 20:34:28 +0000[diff] [blame]74/* MTD */
75#ifdef CONFIG_SFC_MTD
76extern int efx_mtd_probe(struct efx_nic *efx);
77extern void efx_mtd_rename(struct efx_nic *efx);
78extern void efx_mtd_remove(struct efx_nic *efx);
79#else
80static inline int efx_mtd_probe(struct efx_nic *efx) { return 0; }
81static inline void efx_mtd_rename(struct efx_nic *efx) {}
82static inline void efx_mtd_remove(struct efx_nic *efx) {}
83#endif
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]84
85extern unsigned int efx_monitor_interval;
86
87static inline void efx_schedule_channel(struct efx_channel *channel)
88{
89 EFX_TRACE(channel->efx, "channel %d scheduling NAPI poll on CPU%d\n",
90 channel->channel, raw_smp_processor_id());
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100[diff] [blame]91 channel->work_pending = true;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]92
Ben Hutchings288379f2009-01-19 16:43:59 -0800[diff] [blame]93 napi_schedule(&channel->napi_str);
Ben Hutchings8ceee662008-04-27 12:55:59 +0100[diff] [blame]94}
95
96#endif /* EFX_EFX_H */