blob: 0630e6a3ca9e034a33b10a580bcc00d289c7a96b [file] [log] [blame]
Duy Truong790f06d2013-02-13 16:38:12 -08001/* Copyright (c) 2012, The Linux Foundation. All rights reserved.
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/platform_device.h>
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070016#include <linux/err.h>
17#include <linux/io.h>
18#include <linux/delay.h>
Stephen Boydf169b4b2012-05-10 17:55:55 -070019#include <linux/atomic.h>
20#include <linux/interrupt.h>
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070021
Stephen Boydf169b4b2012-05-10 17:55:55 -070022#include <mach/subsystem_restart.h>
23#include <mach/msm_smsm.h>
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070024
25#include "peripheral-loader.h"
26#include "scm-pas.h"
Stephen Boydf169b4b2012-05-10 17:55:55 -070027#include "ramdump.h"
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070028
Stephen Boyde24edf52012-07-12 17:46:19 -070029#define PPSS_RESET 0x2594
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070030#define PPSS_RESET_PROC_RESET 0x2
31#define PPSS_RESET_RESET 0x1
Stephen Boyde24edf52012-07-12 17:46:19 -070032#define PPSS_PROC_CLK_CTL 0x2588
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070033#define CLK_BRANCH_ENA 0x10
Stephen Boyde24edf52012-07-12 17:46:19 -070034#define PPSS_HCLK_CTL 0x2580
35#define CLK_HALT_DFAB_STATE 0x2FC8
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070036
Stephen Boydf169b4b2012-05-10 17:55:55 -070037#define PPSS_WDOG_UNMASKED_INT_EN 0x1808
38
39struct dsps_data {
Stephen Boyde24edf52012-07-12 17:46:19 -070040 void __iomem *base;
Stephen Boydf169b4b2012-05-10 17:55:55 -070041 struct pil_desc desc;
42 struct subsys_device *subsys;
43 struct subsys_desc subsys_desc;
44 int crash;
45 int wdog_irq;
46 atomic_t wd_crash;
47 atomic_t crash_in_progress;
48 void __iomem *ppss_base;
49
50 void *ramdump_dev;
Stephen Boydf169b4b2012-05-10 17:55:55 -070051
52 void *smem_ramdump_dev;
53 struct ramdump_segment smem_ramdump_segments[1];
54};
55
56#define desc_to_drv(d) container_of(d, struct dsps_data, subsys_desc)
Stephen Boyde24edf52012-07-12 17:46:19 -070057#define pil_to_drv(d) container_of(d, struct dsps_data, desc)
Stephen Boydf169b4b2012-05-10 17:55:55 -070058
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070059static int init_image_dsps(struct pil_desc *pil, const u8 *metadata,
60 size_t size)
61{
Stephen Boyde24edf52012-07-12 17:46:19 -070062 struct dsps_data *drv = pil_to_drv(pil);
63
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070064 /* Bring memory and bus interface out of reset */
Stephen Boyde24edf52012-07-12 17:46:19 -070065 writel_relaxed(PPSS_RESET_PROC_RESET, drv->base + PPSS_RESET);
66 writel_relaxed(CLK_BRANCH_ENA, drv->base + PPSS_HCLK_CTL);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070067 mb();
68 return 0;
69}
70
71static int reset_dsps(struct pil_desc *pil)
72{
Stephen Boyde24edf52012-07-12 17:46:19 -070073 struct dsps_data *drv = pil_to_drv(pil);
74
75 writel_relaxed(CLK_BRANCH_ENA, drv->base + PPSS_PROC_CLK_CTL);
76 while (readl_relaxed(drv->base + CLK_HALT_DFAB_STATE) & BIT(18))
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070077 cpu_relax();
78 /* Bring DSPS out of reset */
Stephen Boyde24edf52012-07-12 17:46:19 -070079 writel_relaxed(0x0, drv->base + PPSS_RESET);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070080 return 0;
81}
82
83static int shutdown_dsps(struct pil_desc *pil)
84{
Stephen Boyde24edf52012-07-12 17:46:19 -070085 struct dsps_data *drv = pil_to_drv(pil);
86
87 writel_relaxed(PPSS_RESET_PROC_RESET | PPSS_RESET_RESET,
88 drv->base + PPSS_RESET);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070089 usleep_range(1000, 2000);
Stephen Boyde24edf52012-07-12 17:46:19 -070090 writel_relaxed(PPSS_RESET_PROC_RESET, drv->base + PPSS_RESET);
91 writel_relaxed(0x0, drv->base + PPSS_PROC_CLK_CTL);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -070092 return 0;
93}
94
95struct pil_reset_ops pil_dsps_ops = {
96 .init_image = init_image_dsps,
97 .auth_and_reset = reset_dsps,
98 .shutdown = shutdown_dsps,
99};
100
101static int init_image_dsps_trusted(struct pil_desc *pil, const u8 *metadata,
102 size_t size)
103{
104 return pas_init_image(PAS_DSPS, metadata, size);
105}
106
107static int reset_dsps_trusted(struct pil_desc *pil)
108{
109 return pas_auth_and_reset(PAS_DSPS);
110}
111
112static int shutdown_dsps_trusted(struct pil_desc *pil)
113{
114 return pas_shutdown(PAS_DSPS);
115}
116
117struct pil_reset_ops pil_dsps_ops_trusted = {
118 .init_image = init_image_dsps_trusted,
119 .auth_and_reset = reset_dsps_trusted,
120 .shutdown = shutdown_dsps_trusted,
121};
122
Stephen Boydf169b4b2012-05-10 17:55:55 -0700123static void dsps_log_sfr(void)
124{
125 const char dflt_reason[] = "Died too early due to unknown reason";
126 char *smem_reset_reason;
127 unsigned smem_reset_size;
128
129 smem_reset_reason = smem_get_entry(SMEM_SSR_REASON_DSPS0,
130 &smem_reset_size);
131 if (smem_reset_reason != NULL && smem_reset_reason[0] != 0) {
132 smem_reset_reason[smem_reset_size-1] = 0;
133 pr_err("%s: DSPS failure: %s\nResetting DSPS\n",
134 __func__, smem_reset_reason);
135 memset(smem_reset_reason, 0, smem_reset_size);
136 wmb();
137 } else
138 pr_err("%s: DSPS failure: %s\nResetting DSPS\n",
139 __func__, dflt_reason);
140}
141
142
143static void dsps_restart_handler(struct dsps_data *drv)
144{
145 pr_debug("%s: Restart lvl %d\n",
146 __func__, get_restart_level());
147
148 if (atomic_add_return(1, &drv->crash_in_progress) > 1) {
149 pr_err("%s: DSPS already resetting. Count %d\n", __func__,
150 atomic_read(&drv->crash_in_progress));
151 } else {
152 subsystem_restart_dev(drv->subsys);
153 }
154}
155
156static void dsps_smsm_state_cb(void *data, uint32_t old_state,
157 uint32_t new_state)
158{
159 struct dsps_data *drv = data;
160
161 if (drv->crash == 1) {
162 pr_debug("SMSM_RESET state change ignored\n");
163 drv->crash = 0;
164 } else if (new_state & SMSM_RESET) {
165 dsps_log_sfr();
166 dsps_restart_handler(drv);
167 }
168}
169
Stephen Boyd037c3532012-06-27 11:07:03 -0700170static int dsps_start(const struct subsys_desc *desc)
171{
Stephen Boyd037c3532012-06-27 11:07:03 -0700172 struct dsps_data *drv = desc_to_drv(desc);
173
Stephen Boyde83a0a22012-06-29 13:51:27 -0700174 return pil_boot(&drv->desc);
Stephen Boyd037c3532012-06-27 11:07:03 -0700175}
176
177static void dsps_stop(const struct subsys_desc *desc)
178{
179 struct dsps_data *drv = desc_to_drv(desc);
Stephen Boyde83a0a22012-06-29 13:51:27 -0700180 pil_shutdown(&drv->desc);
Stephen Boyd037c3532012-06-27 11:07:03 -0700181}
182
Stephen Boydf169b4b2012-05-10 17:55:55 -0700183static int dsps_shutdown(const struct subsys_desc *desc)
184{
185 struct dsps_data *drv = desc_to_drv(desc);
186 disable_irq_nosync(drv->wdog_irq);
187 if (drv->ppss_base) {
188 writel_relaxed(0, drv->ppss_base + PPSS_WDOG_UNMASKED_INT_EN);
189 mb(); /* Make sure wdog is disabled before shutting down */
190 }
Stephen Boyde83a0a22012-06-29 13:51:27 -0700191 pil_shutdown(&drv->desc);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700192 return 0;
193}
194
195static int dsps_powerup(const struct subsys_desc *desc)
196{
197 struct dsps_data *drv = desc_to_drv(desc);
198
Stephen Boyde83a0a22012-06-29 13:51:27 -0700199 pil_boot(&drv->desc);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700200 atomic_set(&drv->crash_in_progress, 0);
201 enable_irq(drv->wdog_irq);
202
203 return 0;
204}
205
206static int dsps_ramdump(int enable, const struct subsys_desc *desc)
207{
208 int ret;
209 struct dsps_data *drv = desc_to_drv(desc);
210
211 if (!enable)
212 return 0;
213
Stephen Boyd5eb17ce2012-11-29 15:34:21 -0800214 ret = pil_do_ramdump(&drv->desc, drv->ramdump_dev);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700215 if (ret < 0) {
216 pr_err("%s: Unable to dump DSPS memory (rc = %d).\n",
217 __func__, ret);
218 return ret;
219 }
Stephen Boyd5eb17ce2012-11-29 15:34:21 -0800220 ret = do_elf_ramdump(drv->smem_ramdump_dev, drv->smem_ramdump_segments,
Stephen Boydf169b4b2012-05-10 17:55:55 -0700221 ARRAY_SIZE(drv->smem_ramdump_segments));
222 if (ret < 0) {
223 pr_err("%s: Unable to dump smem memory (rc = %d).\n",
224 __func__, ret);
225 return ret;
226 }
227 return 0;
228}
229
230static void dsps_crash_shutdown(const struct subsys_desc *desc)
231{
232 struct dsps_data *drv = desc_to_drv(desc);
233
234 disable_irq_nosync(drv->wdog_irq);
235 drv->crash = 1;
236 smsm_change_state(SMSM_DSPS_STATE, SMSM_RESET, SMSM_RESET);
237}
238
239static irqreturn_t dsps_wdog_bite_irq(int irq, void *dev_id)
240{
241 struct dsps_data *drv = dev_id;
242
243 atomic_set(&drv->wd_crash, 1);
244 dsps_log_sfr();
245 dsps_restart_handler(drv);
246 return IRQ_HANDLED;
247}
248
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700249static int __devinit pil_dsps_driver_probe(struct platform_device *pdev)
250{
Stephen Boydf169b4b2012-05-10 17:55:55 -0700251 struct dsps_data *drv;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700252 struct pil_desc *desc;
Stephen Boydf169b4b2012-05-10 17:55:55 -0700253 struct resource *res;
Stephen Boyde24edf52012-07-12 17:46:19 -0700254 int ret;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700255
Stephen Boydf169b4b2012-05-10 17:55:55 -0700256 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
257 if (!drv)
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700258 return -ENOMEM;
Stephen Boydf169b4b2012-05-10 17:55:55 -0700259 platform_set_drvdata(pdev, drv);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700260
Stephen Boydf169b4b2012-05-10 17:55:55 -0700261 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Stephen Boyde24edf52012-07-12 17:46:19 -0700262 if (!res)
263 return -EINVAL;
264 drv->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
265 if (!drv->base)
266 return -ENOMEM;
267
268 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700269 if (res) {
270 drv->ppss_base = devm_ioremap(&pdev->dev, res->start,
271 resource_size(res));
272 if (!drv->ppss_base)
273 return -ENOMEM;
274 }
275
276 desc = &drv->desc;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700277 desc->name = pdev->dev.platform_data;
278 desc->dev = &pdev->dev;
279 desc->owner = THIS_MODULE;
Stephen Boyd3030c252012-08-08 17:24:05 -0700280 desc->flags = PIL_SKIP_ENTRY_CHECK;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700281 if (pas_supported(PAS_DSPS) > 0) {
282 desc->ops = &pil_dsps_ops_trusted;
283 dev_info(&pdev->dev, "using secure boot\n");
284 } else {
285 desc->ops = &pil_dsps_ops;
286 dev_info(&pdev->dev, "using non-secure boot\n");
287 }
Stephen Boyde83a0a22012-06-29 13:51:27 -0700288 ret = pil_desc_init(desc);
289 if (ret)
290 return ret;
Stephen Boydf169b4b2012-05-10 17:55:55 -0700291
Stephen Boydc1a72612012-07-05 14:07:35 -0700292 drv->ramdump_dev = create_ramdump_device("dsps", &pdev->dev);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700293 if (!drv->ramdump_dev) {
294 ret = -ENOMEM;
295 goto err_ramdump;
296 }
297
298 drv->smem_ramdump_segments[0].address = PHYS_OFFSET - SZ_2M;
299 drv->smem_ramdump_segments[0].size = SZ_2M;
Stephen Boydc1a72612012-07-05 14:07:35 -0700300 drv->smem_ramdump_dev = create_ramdump_device("smem-dsps", &pdev->dev);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700301 if (!drv->smem_ramdump_dev) {
302 ret = -ENOMEM;
303 goto err_smem_ramdump;
304 }
305
306 drv->subsys_desc.name = "dsps";
Stephen Boyd037c3532012-06-27 11:07:03 -0700307 drv->subsys_desc.dev = &pdev->dev;
308 drv->subsys_desc.owner = THIS_MODULE;
309 drv->subsys_desc.start = dsps_start;
310 drv->subsys_desc.stop = dsps_stop;
Stephen Boydf169b4b2012-05-10 17:55:55 -0700311 drv->subsys_desc.shutdown = dsps_shutdown;
312 drv->subsys_desc.powerup = dsps_powerup;
313 drv->subsys_desc.ramdump = dsps_ramdump,
314 drv->subsys_desc.crash_shutdown = dsps_crash_shutdown;
315
316 drv->subsys = subsys_register(&drv->subsys_desc);
317 if (IS_ERR(drv->subsys)) {
318 ret = PTR_ERR(drv->subsys);
319 goto err_subsys;
320 }
321
322 ret = smsm_state_cb_register(SMSM_DSPS_STATE, SMSM_RESET,
323 dsps_smsm_state_cb, drv);
324 if (ret)
325 goto err_smsm;
326
327 drv->wdog_irq = platform_get_irq(pdev, 0);
328 if (drv->wdog_irq >= 0) {
329 ret = devm_request_irq(&pdev->dev, drv->wdog_irq,
330 dsps_wdog_bite_irq, IRQF_TRIGGER_RISING,
331 "dsps_wdog", drv);
332 if (ret) {
333 dev_err(&pdev->dev, "request_irq failed\n");
334 goto err_smsm;
335 }
336 } else {
337 drv->wdog_irq = -1;
338 dev_dbg(&pdev->dev, "ppss_wdog not supported\n");
339 }
340
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700341 return 0;
Stephen Boydf169b4b2012-05-10 17:55:55 -0700342
343err_smsm:
344 subsys_unregister(drv->subsys);
345err_subsys:
346 destroy_ramdump_device(drv->smem_ramdump_dev);
347err_smem_ramdump:
348 destroy_ramdump_device(drv->ramdump_dev);
349err_ramdump:
Stephen Boyde83a0a22012-06-29 13:51:27 -0700350 pil_desc_release(desc);
Stephen Boydf169b4b2012-05-10 17:55:55 -0700351 return ret;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700352}
353
354static int __devexit pil_dsps_driver_exit(struct platform_device *pdev)
355{
Stephen Boydf169b4b2012-05-10 17:55:55 -0700356 struct dsps_data *drv = platform_get_drvdata(pdev);
357 smsm_state_cb_deregister(SMSM_DSPS_STATE, SMSM_RESET,
358 dsps_smsm_state_cb, drv);
359 subsys_unregister(drv->subsys);
360 destroy_ramdump_device(drv->smem_ramdump_dev);
361 destroy_ramdump_device(drv->ramdump_dev);
Stephen Boyde83a0a22012-06-29 13:51:27 -0700362 pil_desc_release(&drv->desc);
Stephen Boyd25c4a0b2011-09-20 00:12:36 -0700363 return 0;
364}
365
366static struct platform_driver pil_dsps_driver = {
367 .probe = pil_dsps_driver_probe,
368 .remove = __devexit_p(pil_dsps_driver_exit),
369 .driver = {
370 .name = "pil_dsps",
371 .owner = THIS_MODULE,
372 },
373};
374
375static int __init pil_dsps_init(void)
376{
377 return platform_driver_register(&pil_dsps_driver);
378}
379module_init(pil_dsps_init);
380
381static void __exit pil_dsps_exit(void)
382{
383 platform_driver_unregister(&pil_dsps_driver);
384}
385module_exit(pil_dsps_exit);
386
387MODULE_DESCRIPTION("Support for booting sensors (DSPS) images");
388MODULE_LICENSE("GPL v2");