Bhalchandra Gajare | 87fef4c | 2013-02-19 14:57:03 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef WCD9XXX_CODEC_COMMON |
| 14 | |
| 15 | #define WCD9XXX_CODEC_COMMON |
| 16 | |
| 17 | #define WCD9XXX_CLSH_REQ_ENABLE true |
| 18 | #define WCD9XXX_CLSH_REQ_DISABLE false |
| 19 | |
| 20 | #define WCD9XXX_CLSH_EVENT_PRE_DAC 0x01 |
| 21 | #define WCD9XXX_CLSH_EVENT_POST_PA 0x02 |
| 22 | |
| 23 | /* Basic states for Class H state machine. |
| 24 | * represented as a bit mask within a u8 data type |
| 25 | * bit 0: EAR mode |
| 26 | * bit 1: HPH Left mode |
| 27 | * bit 2: HPH Right mode |
| 28 | * bit 3: Lineout mode |
| 29 | * bit 4: Ultrasound mode |
| 30 | */ |
| 31 | #define WCD9XXX_CLSH_STATE_IDLE 0x00 |
| 32 | #define WCD9XXX_CLSH_STATE_EAR (0x01 << 0) |
| 33 | #define WCD9XXX_CLSH_STATE_HPHL (0x01 << 1) |
| 34 | #define WCD9XXX_CLSH_STATE_HPHR (0x01 << 2) |
| 35 | #define WCD9XXX_CLSH_STATE_LO (0x01 << 3) |
| 36 | #define NUM_CLSH_STATES ((0x01 << 4) - 1) |
| 37 | |
| 38 | /* Derived State: Bits 1 and 2 should be set for Headphone stereo */ |
| 39 | #define WCD9XXX_CLSH_STATE_HPH_ST (WCD9XXX_CLSH_STATE_HPHL | \ |
| 40 | WCD9XXX_CLSH_STATE_HPHR) |
| 41 | |
| 42 | |
| 43 | struct wcd9xxx_reg_mask_val { |
| 44 | u16 reg; |
| 45 | u8 mask; |
| 46 | u8 val; |
| 47 | }; |
| 48 | |
| 49 | /* Class H data that the codec driver will maintain */ |
| 50 | struct wcd9xxx_clsh_cdc_data { |
| 51 | u8 state; |
| 52 | int buck_mv; |
| 53 | }; |
| 54 | |
| 55 | |
| 56 | enum wcd9xxx_buck_volt { |
| 57 | WCD9XXX_CDC_BUCK_UNSUPPORTED = 0, |
| 58 | WCD9XXX_CDC_BUCK_MV_1P8 = 1800000, |
| 59 | WCD9XXX_CDC_BUCK_MV_2P15 = 2150000, |
| 60 | }; |
| 61 | |
| 62 | extern void wcd9xxx_clsh_fsm(struct snd_soc_codec *codec, |
| 63 | struct wcd9xxx_clsh_cdc_data *cdc_clsh_d, |
| 64 | u8 req_state, bool req_type, u8 clsh_event); |
| 65 | |
| 66 | extern void wcd9xxx_clsh_init(struct wcd9xxx_clsh_cdc_data *clsh); |
| 67 | |
| 68 | #endif |