Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Header for MultiMediaCard (MMC) |
| 3 | * |
| 4 | * Copyright 2002 Hewlett-Packard Company |
| 5 | * |
| 6 | * Use consistent with the GNU GPL is permitted, |
| 7 | * provided that this copyright notice is |
| 8 | * preserved in its entirety in all copies and derived works. |
| 9 | * |
| 10 | * HEWLETT-PACKARD COMPANY MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, |
| 11 | * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS |
| 12 | * FITNESS FOR ANY PARTICULAR PURPOSE. |
| 13 | * |
| 14 | * Many thanks to Alessandro Rubini and Jonathan Corbet! |
| 15 | * |
| 16 | * Based strongly on code by: |
| 17 | * |
| 18 | * Author: Yong-iL Joh <tolkien@mizi.com> |
| 19 | * Date : $Date: 2002/06/18 12:37:30 $ |
| 20 | * |
| 21 | * Author: Andrew Christian |
| 22 | * 15 May 2002 |
| 23 | */ |
| 24 | |
| 25 | #ifndef MMC_MMC_PROTOCOL_H |
| 26 | #define MMC_MMC_PROTOCOL_H |
| 27 | |
| 28 | /* Standard MMC commands (3.1) type argument response */ |
| 29 | /* class 1 */ |
| 30 | #define MMC_GO_IDLE_STATE 0 /* bc */ |
| 31 | #define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ |
| 32 | #define MMC_ALL_SEND_CID 2 /* bcr R2 */ |
| 33 | #define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ |
| 34 | #define MMC_SET_DSR 4 /* bc [31:16] RCA */ |
| 35 | #define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ |
| 36 | #define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ |
| 37 | #define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ |
| 38 | #define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ |
| 39 | #define MMC_STOP_TRANSMISSION 12 /* ac R1b */ |
| 40 | #define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ |
| 41 | #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ |
| 42 | |
| 43 | /* class 2 */ |
| 44 | #define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ |
| 45 | #define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */ |
| 46 | #define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */ |
| 47 | |
| 48 | /* class 3 */ |
| 49 | #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */ |
| 50 | |
| 51 | /* class 4 */ |
| 52 | #define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */ |
| 53 | #define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */ |
| 54 | #define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */ |
| 55 | #define MMC_PROGRAM_CID 26 /* adtc R1 */ |
| 56 | #define MMC_PROGRAM_CSD 27 /* adtc R1 */ |
| 57 | |
| 58 | /* class 6 */ |
| 59 | #define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */ |
| 60 | #define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */ |
| 61 | #define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */ |
| 62 | |
| 63 | /* class 5 */ |
| 64 | #define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */ |
| 65 | #define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */ |
Pierre Ossman | 24117de | 2005-11-28 21:00:29 +0000 | [diff] [blame] | 66 | #define MMC_ERASE 38 /* ac R1b */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
| 68 | /* class 9 */ |
| 69 | #define MMC_FAST_IO 39 /* ac <Complex> R4 */ |
| 70 | #define MMC_GO_IRQ_STATE 40 /* bcr R5 */ |
| 71 | |
| 72 | /* class 7 */ |
| 73 | #define MMC_LOCK_UNLOCK 42 /* adtc R1b */ |
| 74 | |
| 75 | /* class 8 */ |
| 76 | #define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */ |
Pierre Ossman | 24117de | 2005-11-28 21:00:29 +0000 | [diff] [blame] | 77 | #define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
| 79 | /* SD commands type argument response */ |
| 80 | /* class 8 */ |
| 81 | /* This is basically the same command as for MMC with some quirks. */ |
Russell King | e922517 | 2006-02-02 12:23:12 +0000 | [diff] [blame] | 82 | #define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
| 84 | /* Application commands */ |
| 85 | #define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */ |
Pierre Ossman | ec5a19d | 2006-10-06 00:44:03 -0700 | [diff] [blame] | 86 | #define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | #define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */ |
| 88 | #define SD_APP_SEND_SCR 51 /* adtc R1 */ |
| 89 | |
| 90 | /* |
| 91 | MMC status in R1 |
| 92 | Type |
| 93 | e : error bit |
| 94 | s : status bit |
| 95 | r : detected and set for the actual command response |
| 96 | x : detected and set during command execution. the host must poll |
| 97 | the card by sending status command in order to read these bits. |
| 98 | Clear condition |
| 99 | a : according to the card state |
| 100 | b : always related to the previous command. Reception of |
| 101 | a valid command will clear it (with a delay of one command) |
| 102 | c : clear by read |
| 103 | */ |
| 104 | |
| 105 | #define R1_OUT_OF_RANGE (1 << 31) /* er, c */ |
| 106 | #define R1_ADDRESS_ERROR (1 << 30) /* erx, c */ |
| 107 | #define R1_BLOCK_LEN_ERROR (1 << 29) /* er, c */ |
| 108 | #define R1_ERASE_SEQ_ERROR (1 << 28) /* er, c */ |
| 109 | #define R1_ERASE_PARAM (1 << 27) /* ex, c */ |
| 110 | #define R1_WP_VIOLATION (1 << 26) /* erx, c */ |
| 111 | #define R1_CARD_IS_LOCKED (1 << 25) /* sx, a */ |
| 112 | #define R1_LOCK_UNLOCK_FAILED (1 << 24) /* erx, c */ |
| 113 | #define R1_COM_CRC_ERROR (1 << 23) /* er, b */ |
| 114 | #define R1_ILLEGAL_COMMAND (1 << 22) /* er, b */ |
| 115 | #define R1_CARD_ECC_FAILED (1 << 21) /* ex, c */ |
| 116 | #define R1_CC_ERROR (1 << 20) /* erx, c */ |
| 117 | #define R1_ERROR (1 << 19) /* erx, c */ |
| 118 | #define R1_UNDERRUN (1 << 18) /* ex, c */ |
| 119 | #define R1_OVERRUN (1 << 17) /* ex, c */ |
| 120 | #define R1_CID_CSD_OVERWRITE (1 << 16) /* erx, c, CID/CSD overwrite */ |
| 121 | #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */ |
| 122 | #define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ |
| 123 | #define R1_ERASE_RESET (1 << 13) /* sr, c */ |
| 124 | #define R1_STATUS(x) (x & 0xFFFFE000) |
| 125 | #define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ |
| 126 | #define R1_READY_FOR_DATA (1 << 8) /* sx, a */ |
| 127 | #define R1_APP_CMD (1 << 5) /* sr, c */ |
| 128 | |
| 129 | /* These are unpacked versions of the actual responses */ |
| 130 | |
| 131 | struct _mmc_csd { |
| 132 | u8 csd_structure; |
| 133 | u8 spec_vers; |
| 134 | u8 taac; |
| 135 | u8 nsac; |
| 136 | u8 tran_speed; |
| 137 | u16 ccc; |
| 138 | u8 read_bl_len; |
| 139 | u8 read_bl_partial; |
| 140 | u8 write_blk_misalign; |
| 141 | u8 read_blk_misalign; |
| 142 | u8 dsr_imp; |
| 143 | u16 c_size; |
| 144 | u8 vdd_r_curr_min; |
| 145 | u8 vdd_r_curr_max; |
| 146 | u8 vdd_w_curr_min; |
| 147 | u8 vdd_w_curr_max; |
| 148 | u8 c_size_mult; |
| 149 | union { |
| 150 | struct { /* MMC system specification version 3.1 */ |
| 151 | u8 erase_grp_size; |
| 152 | u8 erase_grp_mult; |
| 153 | } v31; |
| 154 | struct { /* MMC system specification version 2.2 */ |
| 155 | u8 sector_size; |
| 156 | u8 erase_grp_size; |
| 157 | } v22; |
| 158 | } erase; |
| 159 | u8 wp_grp_size; |
| 160 | u8 wp_grp_enable; |
| 161 | u8 default_ecc; |
| 162 | u8 r2w_factor; |
| 163 | u8 write_bl_len; |
| 164 | u8 write_bl_partial; |
| 165 | u8 file_format_grp; |
| 166 | u8 copy; |
| 167 | u8 perm_write_protect; |
| 168 | u8 tmp_write_protect; |
| 169 | u8 file_format; |
| 170 | u8 ecc; |
| 171 | }; |
| 172 | |
| 173 | #define MMC_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */ |
| 174 | #define MMC_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */ |
| 175 | #define MMC_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */ |
| 176 | #define MMC_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */ |
| 177 | #define MMC_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */ |
| 178 | #define MMC_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */ |
| 179 | #define MMC_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */ |
| 180 | #define MMC_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */ |
| 181 | #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ |
| 182 | #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ |
| 183 | #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ |
| 184 | #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ |
| 185 | #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ |
| 186 | #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ |
| 187 | #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ |
| 188 | #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ |
| 189 | #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ |
| 190 | #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ |
| 191 | #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ |
| 192 | #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ |
| 193 | #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ |
| 194 | #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ |
| 195 | #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ |
| 196 | #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ |
| 197 | #define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ |
| 198 | |
Pierre Ossman | 912490d | 2005-05-21 10:27:02 +0100 | [diff] [blame] | 199 | /* |
| 200 | * Card Command Classes (CCC) |
| 201 | */ |
| 202 | #define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ |
| 203 | /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ |
| 204 | #define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ |
| 205 | /* (CMD11) */ |
| 206 | #define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ |
| 207 | /* (CMD16,17,18) */ |
| 208 | #define CCC_STREAM_WRITE (1<<3) /* (3) Stream write commands */ |
| 209 | /* (CMD20) */ |
| 210 | #define CCC_BLOCK_WRITE (1<<4) /* (4) Block write commands */ |
| 211 | /* (CMD16,24,25,26,27) */ |
| 212 | #define CCC_ERASE (1<<5) /* (5) Ability to erase blocks */ |
| 213 | /* (CMD32,33,34,35,36,37,38,39) */ |
| 214 | #define CCC_WRITE_PROT (1<<6) /* (6) Able to write protect blocks */ |
| 215 | /* (CMD28,29,30) */ |
| 216 | #define CCC_LOCK_CARD (1<<7) /* (7) Able to lock down card */ |
| 217 | /* (CMD16,CMD42) */ |
| 218 | #define CCC_APP_SPEC (1<<8) /* (8) Application specific */ |
| 219 | /* (CMD55,56,57,ACMD*) */ |
| 220 | #define CCC_IO_MODE (1<<9) /* (9) I/O mode */ |
| 221 | /* (CMD5,39,40,52,53) */ |
| 222 | #define CCC_SWITCH (1<<10) /* (10) High speed switch */ |
| 223 | /* (CMD6,34,35,36,37,50) */ |
| 224 | /* (11) Reserved */ |
| 225 | /* (CMD?) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 226 | |
| 227 | /* |
| 228 | * CSD field definitions |
| 229 | */ |
| 230 | |
| 231 | #define CSD_STRUCT_VER_1_0 0 /* Valid for system specification 1.0 - 1.2 */ |
| 232 | #define CSD_STRUCT_VER_1_1 1 /* Valid for system specification 1.4 - 2.2 */ |
| 233 | #define CSD_STRUCT_VER_1_2 2 /* Valid for system specification 3.1 */ |
| 234 | |
| 235 | #define CSD_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.2 */ |
| 236 | #define CSD_SPEC_VER_1 1 /* Implements system specification 1.4 */ |
| 237 | #define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ |
| 238 | #define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */ |
| 239 | |
Pierre Ossman | f218278 | 2005-09-06 15:18:55 -0700 | [diff] [blame] | 240 | |
| 241 | /* |
| 242 | * SD bus widths |
| 243 | */ |
| 244 | #define SD_BUS_WIDTH_1 0 |
| 245 | #define SD_BUS_WIDTH_4 2 |
| 246 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 247 | #endif /* MMC_MMC_PROTOCOL_H */ |
| 248 | |