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Zang Roy-r619114b3afca2006-08-25 16:43:25 +08001/*
2 * MPC7448HPC2 (Taiga) board Device Tree Source
3 *
Kumar Gala998c6102008-04-17 09:40:48 -05004 * Copyright 2006, 2008 Freescale Semiconductor Inc.
Zang Roy-r619114b3afca2006-08-25 16:43:25 +08005 * 2006 Roy Zang <Roy Zang at freescale.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
Kumar Gala998c6102008-04-17 09:40:48 -050013/dts-v1/;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080014
15/ {
16 model = "mpc7448hpc2";
17 compatible = "mpc74xx";
18 #address-cells = <1>;
19 #size-cells = <1>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080020
Paul Gortmaker36aa7962008-07-10 16:21:35 -040021 aliases {
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24
25 serial0 = &serial0;
26 serial1 = &serial1;
27
28 pci0 = &pci0;
29 };
30
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080031 cpus {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080032 #address-cells = <1>;
33 #size-cells =<0>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080034
35 PowerPC,7448@0 {
36 device_type = "cpu";
Kumar Gala998c6102008-04-17 09:40:48 -050037 reg = <0x0>;
38 d-cache-line-size = <32>; // 32 bytes
39 i-cache-line-size = <32>; // 32 bytes
40 d-cache-size = <0x8000>; // L1, 32K bytes
41 i-cache-size = <0x8000>; // L1, 32K bytes
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080042 timebase-frequency = <0>; // 33 MHz, from uboot
43 clock-frequency = <0>; // From U-Boot
44 bus-frequency = <0>; // From U-Boot
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080045 };
46 };
47
48 memory {
49 device_type = "memory";
Kumar Gala998c6102008-04-17 09:40:48 -050050 reg = <0x0 0x20000000 // DDR2 512M at 0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080051 >;
52 };
53
54 tsi108@c0000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
Roy Zang006af9e2007-07-11 14:39:17 +080057 device_type = "tsi-bridge";
Kumar Gala998c6102008-04-17 09:40:48 -050058 ranges = <0x0 0xc0000000 0x10000>;
59 reg = <0xc0000000 0x10000>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080060 bus-frequency = <0>;
61
62 i2c@7000 {
Kumar Gala5c1992f2007-05-15 16:12:27 -050063 interrupt-parent = <&mpic>;
Kumar Gala998c6102008-04-17 09:40:48 -050064 interrupts = <14 0>;
65 reg = <0x7000 0x400>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080066 device_type = "i2c";
David Gibsone58ca3d2007-06-13 14:53:00 +100067 compatible = "tsi108-i2c";
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080068 };
69
David Gibsone58ca3d2007-06-13 14:53:00 +100070 MDIO: mdio@6000 {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080071 device_type = "mdio";
David Gibsone58ca3d2007-06-13 14:53:00 +100072 compatible = "tsi108-mdio";
Kumar Gala998c6102008-04-17 09:40:48 -050073 reg = <0x6000 0x50>;
David Gibsone58ca3d2007-06-13 14:53:00 +100074 #address-cells = <1>;
75 #size-cells = <0>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080076
David Gibsone58ca3d2007-06-13 14:53:00 +100077 phy8: ethernet-phy@8 {
Kumar Gala5c1992f2007-05-15 16:12:27 -050078 interrupt-parent = <&mpic>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080079 interrupts = <2 1>;
Kumar Gala998c6102008-04-17 09:40:48 -050080 reg = <0x8>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080081 };
82
David Gibsone58ca3d2007-06-13 14:53:00 +100083 phy9: ethernet-phy@9 {
Kumar Gala5c1992f2007-05-15 16:12:27 -050084 interrupt-parent = <&mpic>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080085 interrupts = <2 1>;
Kumar Gala998c6102008-04-17 09:40:48 -050086 reg = <0x9>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080087 };
88
89 };
90
Paul Gortmaker36aa7962008-07-10 16:21:35 -040091 enet0: ethernet@6200 {
Roy Zangc4e05bc2007-09-24 18:31:55 +080092 linux,network-index = <0>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080093 #size-cells = <0>;
94 device_type = "network";
David Gibsone58ca3d2007-06-13 14:53:00 +100095 compatible = "tsi108-ethernet";
Kumar Gala998c6102008-04-17 09:40:48 -050096 reg = <0x6000 0x200>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +080097 address = [ 00 06 D2 00 00 01 ];
Kumar Gala998c6102008-04-17 09:40:48 -050098 interrupts = <16 2>;
Kumar Gala5c1992f2007-05-15 16:12:27 -050099 interrupt-parent = <&mpic>;
David Gibsone58ca3d2007-06-13 14:53:00 +1000100 mdio-handle = <&MDIO>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500101 phy-handle = <&phy8>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800102 };
103
Paul Gortmaker36aa7962008-07-10 16:21:35 -0400104 enet1: ethernet@6600 {
Roy Zangc4e05bc2007-09-24 18:31:55 +0800105 linux,network-index = <1>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800106 #address-cells = <1>;
107 #size-cells = <0>;
108 device_type = "network";
David Gibsone58ca3d2007-06-13 14:53:00 +1000109 compatible = "tsi108-ethernet";
Kumar Gala998c6102008-04-17 09:40:48 -0500110 reg = <0x6400 0x200>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800111 address = [ 00 06 D2 00 00 02 ];
Kumar Gala998c6102008-04-17 09:40:48 -0500112 interrupts = <17 2>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500113 interrupt-parent = <&mpic>;
David Gibsone58ca3d2007-06-13 14:53:00 +1000114 mdio-handle = <&MDIO>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500115 phy-handle = <&phy9>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800116 };
117
Paul Gortmaker36aa7962008-07-10 16:21:35 -0400118 serial0: serial@7808 {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800119 device_type = "serial";
120 compatible = "ns16550";
Kumar Gala998c6102008-04-17 09:40:48 -0500121 reg = <0x7808 0x200>;
122 clock-frequency = <1064000000>;
123 interrupts = <12 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500124 interrupt-parent = <&mpic>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800125 };
126
Paul Gortmaker36aa7962008-07-10 16:21:35 -0400127 serial1: serial@7c08 {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800128 device_type = "serial";
129 compatible = "ns16550";
Kumar Gala998c6102008-04-17 09:40:48 -0500130 reg = <0x7c08 0x200>;
131 clock-frequency = <1064000000>;
132 interrupts = <13 0>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500133 interrupt-parent = <&mpic>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800134 };
135
Kumar Gala5c1992f2007-05-15 16:12:27 -0500136 mpic: pic@7400 {
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800137 interrupt-controller;
138 #address-cells = <0>;
139 #interrupt-cells = <2>;
Kumar Gala998c6102008-04-17 09:40:48 -0500140 reg = <0x7400 0x400>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800141 compatible = "chrp,open-pic";
142 device_type = "open-pic";
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800143 };
Paul Gortmaker36aa7962008-07-10 16:21:35 -0400144 pci0: pci@1000 {
David Gibsone58ca3d2007-06-13 14:53:00 +1000145 compatible = "tsi108-pci";
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800146 device_type = "pci";
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800147 #interrupt-cells = <1>;
148 #size-cells = <2>;
149 #address-cells = <3>;
Kumar Gala998c6102008-04-17 09:40:48 -0500150 reg = <0x1000 0x1000>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800151 bus-range = <0 0>;
Kumar Gala998c6102008-04-17 09:40:48 -0500152 ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
153 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
154 clock-frequency = <133333332>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500155 interrupt-parent = <&mpic>;
Kumar Gala998c6102008-04-17 09:40:48 -0500156 interrupts = <23 2>;
157 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800158 interrupt-map = <
159
160 /* IDSEL 0x11 */
Kumar Gala998c6102008-04-17 09:40:48 -0500161 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
162 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
163 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
164 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800165
166 /* IDSEL 0x12 */
Kumar Gala998c6102008-04-17 09:40:48 -0500167 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
168 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
169 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
170 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800171
172 /* IDSEL 0x13 */
Kumar Gala998c6102008-04-17 09:40:48 -0500173 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
174 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
175 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
176 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800177
178 /* IDSEL 0x14 */
Kumar Gala998c6102008-04-17 09:40:48 -0500179 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
180 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
181 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
182 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800183 >;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500184
185 RT0: router@1180 {
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800186 clock-frequency = <0>;
187 interrupt-controller;
188 device_type = "pic-router";
189 #address-cells = <0>;
190 #interrupt-cells = <2>;
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800191 big-endian;
Kumar Gala998c6102008-04-17 09:40:48 -0500192 interrupts = <23 2>;
Kumar Gala5c1992f2007-05-15 16:12:27 -0500193 interrupt-parent = <&mpic>;
Zang Roy-r619115873c9b2006-11-14 14:31:50 +0800194 };
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800195 };
196 };
Zang Roy-r619114b3afca2006-08-25 16:43:25 +0800197};