blob: 1ece0ee95de897cceada3dd7d2918cbbec4b5e75 [file] [log] [blame]
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001/* Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
Xiaozhe Shib19f7032012-08-16 12:14:16 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
Xiaozhe Shi73a65692012-09-18 17:51:57 -070013#define pr_fmt(fmt) "BMS: %s: " fmt, __func__
Xiaozhe Shib19f7032012-08-16 12:14:16 -070014
15#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <linux/err.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/power_supply.h>
23#include <linux/spmi.h>
Xiaozhe Shie118c692012-09-24 15:17:43 -070024#include <linux/rtc.h>
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070025#include <linux/qpnp/qpnp-adc.h>
Xiaozhe Shi73a65692012-09-18 17:51:57 -070026#include <linux/mfd/pm8xxx/batterydata-lib.h>
Xiaozhe Shib19f7032012-08-16 12:14:16 -070027
Xiaozhe Shib19f7032012-08-16 12:14:16 -070028/* BMS Register Offsets */
29#define BMS1_REVISION1 0x0
30#define BMS1_REVISION2 0x1
31#define BMS1_STATUS1 0x8
32#define BMS1_MODE_CTL 0X40
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070033/* Coulomb counter clear registers */
Xiaozhe Shib19f7032012-08-16 12:14:16 -070034#define BMS1_CC_DATA_CTL 0x42
35#define BMS1_CC_CLEAR_CTRL 0x43
36/* OCV limit registers */
37#define BMS1_OCV_USE_LOW_LIMIT_THR0 0x48
38#define BMS1_OCV_USE_LOW_LIMIT_THR1 0x49
39#define BMS1_OCV_USE_HIGH_LIMIT_THR0 0x4A
40#define BMS1_OCV_USE_HIGH_LIMIT_THR1 0x4B
41#define BMS1_OCV_USE_LIMIT_CTL 0x4C
42/* CC interrupt threshold */
43#define BMS1_CC_THR0 0x7A
44#define BMS1_CC_THR1 0x7B
45#define BMS1_CC_THR2 0x7C
46#define BMS1_CC_THR3 0x7D
47#define BMS1_CC_THR4 0x7E
48/* OCV for r registers */
49#define BMS1_OCV_FOR_R_DATA0 0x80
50#define BMS1_OCV_FOR_R_DATA1 0x81
51#define BMS1_VSENSE_FOR_R_DATA0 0x82
52#define BMS1_VSENSE_FOR_R_DATA1 0x83
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070053/* Coulomb counter data */
Xiaozhe Shib19f7032012-08-16 12:14:16 -070054#define BMS1_CC_DATA0 0x8A
55#define BMS1_CC_DATA1 0x8B
56#define BMS1_CC_DATA2 0x8C
57#define BMS1_CC_DATA3 0x8D
58#define BMS1_CC_DATA4 0x8E
59/* OCV for soc data */
60#define BMS1_OCV_FOR_SOC_DATA0 0x90
61#define BMS1_OCV_FOR_SOC_DATA1 0x91
62#define BMS1_VSENSE_PON_DATA0 0x94
63#define BMS1_VSENSE_PON_DATA1 0x95
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070064#define BMS1_VSENSE_AVG_DATA0 0x98
65#define BMS1_VSENSE_AVG_DATA1 0x99
Xiaozhe Shib19f7032012-08-16 12:14:16 -070066#define BMS1_VBAT_AVG_DATA0 0x9E
67#define BMS1_VBAT_AVG_DATA1 0x9F
68/* Extra bms registers */
69#define BMS1_BMS_DATA_REG_0 0xB0
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070070#define IAVG_STORAGE_REG 0xB1
71#define SOC_STORAGE_REG 0xB2
Xiaozhe Shib19f7032012-08-16 12:14:16 -070072#define BMS1_BMS_DATA_REG_3 0xB3
73
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070074/* Configuration for saving of shutdown soc/iavg */
75#define IGNORE_SOC_TEMP_DECIDEG 50
76#define IAVG_STEP_SIZE_MA 50
77#define IAVG_START 600
78#define SOC_ZERO 0xFF
79
Xiaozhe Shie118c692012-09-24 15:17:43 -070080#define IAVG_SAMPLES 16
81
Xiaozhe Shib19f7032012-08-16 12:14:16 -070082#define QPNP_BMS_DEV_NAME "qcom,qpnp-bms"
83
Xiaozhe Shicd7e5302012-10-17 12:29:53 -070084struct soc_params {
85 int fcc_uah;
86 int cc_uah;
87 int rbatt;
88 int iavg_ua;
89 int uuc_uah;
90 int ocv_charge_uah;
91};
92
93struct raw_soc_params {
94 uint16_t last_good_ocv_raw;
95 int64_t cc;
96 int last_good_ocv_uv;
97};
98
Xiaozhe Shib19f7032012-08-16 12:14:16 -070099struct qpnp_bms_chip {
100 struct device *dev;
101 struct power_supply bms_psy;
102 struct spmi_device *spmi;
103 u16 base;
104
105 u8 revision1;
106 u8 revision2;
107 int charger_status;
108 bool online;
109 /* platform data */
110 unsigned int r_sense_mohm;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700111 unsigned int v_cutoff_uv;
112 unsigned int max_voltage_uv;
Xiaozhe Shib19f7032012-08-16 12:14:16 -0700113 unsigned int r_conn_mohm;
114 int shutdown_soc_valid_limit;
115 int adjust_soc_low_threshold;
116 int adjust_soc_high_threshold;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700117 int chg_term_ua;
Xiaozhe Shi73a65692012-09-18 17:51:57 -0700118 enum battery_type batt_type;
119 unsigned int fcc;
120 struct single_row_lut *fcc_temp_lut;
121 struct single_row_lut *fcc_sf_lut;
122 struct pc_temp_ocv_lut *pc_temp_ocv_lut;
123 struct sf_lut *pc_sf_lut;
124 struct sf_lut *rbatt_sf_lut;
125 int default_rbatt_mohm;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700126
127 struct delayed_work calculate_soc_delayed_work;
128
129 struct mutex bms_output_lock;
130 struct mutex last_ocv_uv_mutex;
Xiaozhe Shie118c692012-09-24 15:17:43 -0700131 struct mutex soc_invalidation_mutex;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700132
133 unsigned int start_percent;
134 unsigned int end_percent;
135 bool ignore_shutdown_soc;
136 int shutdown_soc_invalid;
137 int shutdown_soc;
138 int shutdown_iavg_ma;
139
140 int low_soc_calc_threshold;
141 int low_soc_calculate_soc_ms;
142 int calculate_soc_ms;
143
Xiaozhe Shie118c692012-09-24 15:17:43 -0700144 uint16_t ocv_reading_at_100;
145 int64_t cc_reading_at_100;
146 uint16_t prev_last_good_ocv_raw;
147 int last_ocv_uv;
148 int last_cc_uah;
149 unsigned long tm_sec;
150 bool first_time_calc_soc;
151 bool first_time_calc_uuc;
152 int pon_ocv_uv;
153
154 int iavg_samples_ma[IAVG_SAMPLES];
155 int iavg_index;
156 int iavg_num_samples;
157 struct timespec t_soc_queried;
158 int last_soc;
159
160 int charge_time_us;
161 int catch_up_time_us;
162 struct single_row_lut *adjusted_fcc_temp_lut;
163
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700164 unsigned int vadc_v0625;
165 unsigned int vadc_v1250;
166
167 int prev_iavg_ua;
168 int prev_uuc_iavg_ma;
169 int prev_pc_unusable;
170 int ibat_at_cv_ua;
171 int soc_at_cv;
172 int prev_chg_soc;
173 int calculated_soc;
Xiaozhe Shi781b0a22012-11-05 17:18:27 -0800174 int last_vbat_read_uv;
Xiaozhe Shib19f7032012-08-16 12:14:16 -0700175};
176
177static struct of_device_id qpnp_bms_match_table[] = {
178 { .compatible = QPNP_BMS_DEV_NAME },
179 {}
180};
181
182static char *qpnp_bms_supplicants[] = {
183 "battery"
184};
185
186static enum power_supply_property msm_bms_power_props[] = {
187 POWER_SUPPLY_PROP_STATUS,
188 POWER_SUPPLY_PROP_ONLINE,
189 POWER_SUPPLY_PROP_CAPACITY,
190 POWER_SUPPLY_PROP_CURRENT_NOW,
191 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
192};
193
Xiaozhe Shi781b0a22012-11-05 17:18:27 -0800194static bool use_voltage_soc;
195
196/* module params */
197static int bms_param_set_bool(const char *val, const struct kernel_param *kp)
198{
199 int rc;
200 struct power_supply *bms_psy;
201
202 rc = param_set_bool(val, kp);
203 if (rc) {
204 pr_err("failed to set %s, rc = %d\n", kp->name, rc);
205 return rc;
206 }
207
208 bms_psy = power_supply_get_by_name("bms");
209
210 if (bms_psy)
211 power_supply_changed(bms_psy);
212 else
213 pr_debug("%s changed but bms has not been initialized yet\n",
214 kp->name);
215
216 return 0;
217}
218
219static struct kernel_param_ops bms_param_ops = {
220 .set = bms_param_set_bool,
221 .get = param_get_bool,
222};
223
224module_param_cb(use_voltage_soc, &bms_param_ops, &use_voltage_soc, 0644);
225
Xiaozhe Shib19f7032012-08-16 12:14:16 -0700226static int qpnp_read_wrapper(struct qpnp_bms_chip *chip, u8 *val,
227 u16 base, int count)
228{
229 int rc;
230 struct spmi_device *spmi = chip->spmi;
231
232 rc = spmi_ext_register_readl(spmi->ctrl, spmi->sid, base, val, count);
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700233 if (rc) {
Xiaozhe Shib19f7032012-08-16 12:14:16 -0700234 pr_err("SPMI read failed rc=%d\n", rc);
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700235 return rc;
236 }
Xiaozhe Shib19f7032012-08-16 12:14:16 -0700237 return 0;
238}
239
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700240static int qpnp_write_wrapper(struct qpnp_bms_chip *chip, u8 *val,
241 u16 base, int count)
242{
243 int rc;
244 struct spmi_device *spmi = chip->spmi;
245
246 rc = spmi_ext_register_writel(spmi->ctrl, spmi->sid, base, val, count);
247 if (rc) {
248 pr_err("SPMI write failed rc=%d\n", rc);
249 return rc;
250 }
251 return 0;
252}
253
254static int qpnp_masked_write(struct qpnp_bms_chip *chip, u16 addr,
255 u8 mask, u8 val)
256{
257 int rc;
258 u8 reg;
259
260 rc = qpnp_read_wrapper(chip, &reg, chip->base + addr, 1);
261 if (rc) {
262 pr_err("read failed addr = %03X, rc = %d\n",
263 chip->base + addr, rc);
264 return rc;
265 }
266 reg &= ~mask;
267 reg |= val & mask;
268 rc = qpnp_write_wrapper(chip, &reg, chip->base + addr, 1);
269 if (rc) {
270 pr_err("write failed addr = %03X, val = %02x, mask = %02x, reg = %02x, rc = %d\n",
271 chip->base + addr, val, mask, reg, rc);
272 return rc;
273 }
274 return 0;
275}
276
277#define HOLD_OREG_DATA BIT(0)
278static int lock_output_data(struct qpnp_bms_chip *chip)
279{
280 int rc;
281
282 rc = qpnp_masked_write(chip, BMS1_CC_DATA_CTL,
283 HOLD_OREG_DATA, HOLD_OREG_DATA);
284 if (rc) {
285 pr_err("couldnt lock bms output rc = %d\n", rc);
286 return rc;
287 }
288 return 0;
289}
290
291static int unlock_output_data(struct qpnp_bms_chip *chip)
292{
293 int rc;
294
295 rc = qpnp_masked_write(chip, BMS1_CC_DATA_CTL, HOLD_OREG_DATA, 0);
296 if (rc) {
297 pr_err("fail to unlock BMS_CONTROL rc = %d\n", rc);
298 return rc;
299 }
300 return 0;
301}
302
303#define V_PER_BIT_MUL_FACTOR 97656
304#define V_PER_BIT_DIV_FACTOR 1000
305#define VADC_INTRINSIC_OFFSET 0x6000
306
307static int vadc_reading_to_uv(unsigned int reading)
308{
309 if (reading <= VADC_INTRINSIC_OFFSET)
310 return 0;
311
312 return (reading - VADC_INTRINSIC_OFFSET)
313 * V_PER_BIT_MUL_FACTOR / V_PER_BIT_DIV_FACTOR;
314}
315
316#define VADC_CALIB_UV 625000
317#define VBATT_MUL_FACTOR 3
318
319static int adjust_vbatt_reading(struct qpnp_bms_chip *chip,
320 unsigned int reading_uv)
321{
322 s64 numerator, denominator;
323
324 if (reading_uv == 0)
325 return 0;
326
327 /* don't adjust if not calibrated */
328 if (chip->vadc_v0625 == 0 || chip->vadc_v1250 == 0) {
329 pr_debug("No cal yet return %d\n",
330 VBATT_MUL_FACTOR * reading_uv);
331 return VBATT_MUL_FACTOR * reading_uv;
332 }
333
334 numerator = ((s64)reading_uv - chip->vadc_v0625)
335 * VADC_CALIB_UV;
336 denominator = (s64)chip->vadc_v1250 - chip->vadc_v0625;
337 if (denominator == 0)
338 return reading_uv * VBATT_MUL_FACTOR;
339 return (VADC_CALIB_UV + div_s64(numerator, denominator))
340 * VBATT_MUL_FACTOR;
341}
342
343static inline int convert_vbatt_raw_to_uv(struct qpnp_bms_chip *chip,
344 uint16_t reading)
345{
346 return adjust_vbatt_reading(chip, vadc_reading_to_uv(reading));
347}
348
349#define CC_READING_RESOLUTION_N 542535
350#define CC_READING_RESOLUTION_D 100000
351static int cc_reading_to_uv(int16_t reading)
352{
353 return div_s64(reading * CC_READING_RESOLUTION_N,
354 CC_READING_RESOLUTION_D);
355}
356
357#define QPNP_ADC_GAIN_NV 17857LL
358static s64 cc_adjust_for_gain(s64 uv, s64 gain)
359{
360 s64 result_uv;
361
362 pr_debug("adjusting_uv = %lld\n", uv);
363 pr_debug("adjusting by factor: %lld/%lld = %lld%%\n",
364 QPNP_ADC_GAIN_NV, gain,
365 div_s64(QPNP_ADC_GAIN_NV * 100LL, gain));
366
367 result_uv = div_s64(uv * QPNP_ADC_GAIN_NV, gain);
368 pr_debug("result_uv = %lld\n", result_uv);
369 return result_uv;
370}
371
372static int convert_vsense_to_uv(struct qpnp_bms_chip *chip,
373 int16_t reading)
374{
375 return cc_adjust_for_gain(cc_reading_to_uv(reading), QPNP_ADC_GAIN_NV);
376}
377
378static int read_vsense_avg(struct qpnp_bms_chip *chip, int *result_uv)
379{
380 int rc;
381 int16_t reading;
382
383 rc = qpnp_read_wrapper(chip, (u8 *)&reading,
384 chip->base + BMS1_VSENSE_AVG_DATA0, 2);
385
386 if (rc) {
387 pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
388 return rc;
389 }
390
391 *result_uv = convert_vsense_to_uv(chip, reading);
392 return 0;
393}
394
395static int get_battery_current(struct qpnp_bms_chip *chip, int *result_ua)
396{
397 int vsense_uv = 0;
398
399 if (chip->r_sense_mohm == 0) {
400 pr_err("r_sense is zero\n");
401 return -EINVAL;
402 }
403
404 mutex_lock(&chip->bms_output_lock);
405 lock_output_data(chip);
406 read_vsense_avg(chip, &vsense_uv);
407 unlock_output_data(chip);
408 mutex_unlock(&chip->bms_output_lock);
409
410 pr_debug("vsense_uv=%duV\n", vsense_uv);
411 /* cast for signed division */
412 *result_ua = vsense_uv * 1000 / (int)chip->r_sense_mohm;
413 pr_debug("ibat=%duA\n", *result_ua);
414 return 0;
415}
416
417static int get_battery_voltage(int *result_uv)
418{
419 int rc;
420 struct qpnp_vadc_result adc_result;
421
422 rc = qpnp_vadc_read(VBAT_SNS, &adc_result);
423 if (rc) {
424 pr_err("error reading adc channel = %d, rc = %d\n",
425 VBAT_SNS, rc);
426 return rc;
427 }
428 pr_debug("mvolts phy = %lld meas = 0x%llx\n", adc_result.physical,
429 adc_result.measurement);
430 *result_uv = (int)adc_result.physical;
431 return 0;
432}
433
Xiaozhe Shie118c692012-09-24 15:17:43 -0700434#define CC_36_BIT_MASK 0xFFFFFFFFFLL
435
436static int read_cc_raw(struct qpnp_bms_chip *chip, int64_t *reading)
437{
438 int64_t raw_reading;
439 int rc;
440
441 rc = qpnp_read_wrapper(chip, (u8 *)&raw_reading,
442 chip->base + BMS1_CC_DATA0, 5);
443 if (rc) {
444 pr_err("Error reading cc: rc = %d\n", rc);
445 return -ENXIO;
446 }
447
448 raw_reading = raw_reading & CC_36_BIT_MASK;
449 /* convert 36 bit signed value into 64 signed value */
450 *reading = (raw_reading >> 35) == 0LL ?
451 raw_reading : ((-1LL ^ CC_36_BIT_MASK) | raw_reading);
452 pr_debug("before conversion: %llx, after conversion: %llx\n",
453 raw_reading, *reading);
454
455 return 0;
456}
457
458static void convert_and_store_ocv(struct qpnp_bms_chip *chip,
459 struct raw_soc_params *raw)
460{
461 chip->prev_last_good_ocv_raw = raw->last_good_ocv_raw;
462 raw->last_good_ocv_uv = convert_vbatt_raw_to_uv(chip,
463 raw->last_good_ocv_raw);
464 chip->last_ocv_uv = raw->last_good_ocv_uv;
465}
466
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700467static int read_soc_params_raw(struct qpnp_bms_chip *chip,
468 struct raw_soc_params *raw)
469{
Xiaozhe Shie118c692012-09-24 15:17:43 -0700470 int rc;
471
472 mutex_lock(&chip->bms_output_lock);
473 lock_output_data(chip);
474
475 rc = qpnp_read_wrapper(chip, (u8 *)&raw->last_good_ocv_raw,
476 chip->base + BMS1_OCV_FOR_SOC_DATA0, 2);
477 if (rc) {
478 pr_err("Error reading ocv: rc = %d\n", rc);
479 return -ENXIO;
480 }
481
482 rc = read_cc_raw(chip, &raw->cc);
483 if (rc) {
484 pr_err("Failed to read raw cc data, rc = %d\n", rc);
485 return rc;
486 }
487
488 unlock_output_data(chip);
489 mutex_unlock(&chip->bms_output_lock);
490
491 if (chip->prev_last_good_ocv_raw == 0) {
492 convert_and_store_ocv(chip, raw);
493 pr_debug("PON_OCV_UV = %d\n", chip->last_ocv_uv);
494 } else if (chip->prev_last_good_ocv_raw != raw->last_good_ocv_raw) {
495 convert_and_store_ocv(chip, raw);
496 /* forget the old cc value upon ocv */
497 chip->last_cc_uah = 0;
498 } else {
499 raw->last_good_ocv_uv = chip->last_ocv_uv;
500 }
501
502 /* fake a high OCV if done charging */
503 if (chip->ocv_reading_at_100 != raw->last_good_ocv_raw) {
504 chip->ocv_reading_at_100 = 0;
505 chip->cc_reading_at_100 = 0;
506 } else {
507 /*
508 * force 100% ocv by selecting the highest voltage the
509 * battery could ever reach
510 */
511 raw->last_good_ocv_uv = chip->max_voltage_uv;
512 chip->last_ocv_uv = chip->max_voltage_uv;
513 }
514 pr_debug("last_good_ocv_raw= 0x%x, last_good_ocv_uv= %duV\n",
515 raw->last_good_ocv_raw, raw->last_good_ocv_uv);
516 pr_debug("cc_raw= 0x%llx\n", raw->cc);
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700517 return 0;
518}
519
Xiaozhe Shie118c692012-09-24 15:17:43 -0700520static int calculate_pc(struct qpnp_bms_chip *chip, int ocv_uv,
521 int batt_temp)
522{
523 int pc;
524
525 pc = interpolate_pc(chip->pc_temp_ocv_lut,
526 batt_temp / 10, ocv_uv / 1000);
527 pr_debug("pc = %u %% for ocv = %d uv batt_temp = %d\n",
528 pc, ocv_uv, batt_temp);
529 /* Multiply the initial FCC value by the scale factor. */
530 return pc;
531}
532
533static int calculate_fcc(struct qpnp_bms_chip *chip, int batt_temp)
534{
535 int fcc_uah;
536
537 if (chip->adjusted_fcc_temp_lut == NULL) {
538 /* interpolate_fcc returns a mv value. */
539 fcc_uah = interpolate_fcc(chip->fcc_temp_lut,
540 batt_temp) * 1000;
541 pr_debug("fcc = %d uAh\n", fcc_uah);
542 return fcc_uah;
543 } else {
544 return 1000 * interpolate_fcc(chip->adjusted_fcc_temp_lut,
545 batt_temp);
546 }
547}
548
549/* calculate remaining charge at the time of ocv */
550static int calculate_ocv_charge(struct qpnp_bms_chip *chip,
551 struct raw_soc_params *raw,
552 int fcc_uah,
553 int batt_temp)
554{
555 int ocv_uv, pc;
556
557 ocv_uv = raw->last_good_ocv_uv;
558 pc = calculate_pc(chip, ocv_uv, batt_temp);
559 pr_debug("ocv_uv = %d pc = %d\n", ocv_uv, pc);
560 return (fcc_uah * pc) / 100;
561}
562
563#define CC_RESOLUTION_N 542535
564#define CC_RESOLUTION_D 100000
565
566static s64 cc_to_uv(s64 cc)
567{
568 return div_s64(cc * CC_RESOLUTION_N, CC_RESOLUTION_D);
569}
570
571#define CC_READING_TICKS 56
572#define SLEEP_CLK_HZ 32764
573#define SECONDS_PER_HOUR 3600
574
575static s64 cc_uv_to_nvh(s64 cc_uv)
576{
577 return div_s64(cc_uv * CC_READING_TICKS * 1000,
578 SLEEP_CLK_HZ * SECONDS_PER_HOUR);
579}
580
581/**
582 * calculate_cc-
583 * @chip: the bms chip pointer
584 * @cc: the cc reading from bms h/w
585 * @val: return value
586 * @coulomb_counter: adjusted coulomb counter for 100%
587 *
588 * RETURNS: in val pointer coulomb counter based charger in uAh
589 * (micro Amp hour)
590 */
591static int calculate_cc(struct qpnp_bms_chip *chip, int64_t cc)
592{
593 int64_t cc_voltage_uv, cc_nvh, cc_uah;
594 cc_voltage_uv = cc;
595 cc_voltage_uv -= chip->cc_reading_at_100;
596 pr_debug("cc = %lld. after subtracting 0x%llx cc = %lld\n",
597 cc, chip->cc_reading_at_100,
598 cc_voltage_uv);
599 cc_voltage_uv = cc_to_uv(cc_voltage_uv);
600 cc_voltage_uv = cc_adjust_for_gain(cc_voltage_uv, QPNP_ADC_GAIN_NV);
601 pr_debug("cc_voltage_uv = %lld uv\n", cc_voltage_uv);
602 cc_nvh = cc_uv_to_nvh(cc_voltage_uv);
603 pr_debug("cc_nvh = %lld nano_volt_hour\n", cc_nvh);
604 cc_uah = div_s64(cc_nvh, chip->r_sense_mohm);
605 /* cc_raw had 4 bits of extra precision.
606 By now it should be within 32 bit range */
607 return (int)cc_uah;
608}
609
610static int get_rbatt(struct qpnp_bms_chip *chip,
611 int soc_rbatt_mohm, int batt_temp)
612{
613 int rbatt_mohm, scalefactor;
614
615 rbatt_mohm = chip->default_rbatt_mohm;
616 pr_debug("rbatt before scaling = %d\n", rbatt_mohm);
617 if (chip->rbatt_sf_lut == NULL) {
618 pr_debug("RBATT = %d\n", rbatt_mohm);
619 return rbatt_mohm;
620 }
621 /* Convert the batt_temp to DegC from deciDegC */
622 batt_temp = batt_temp / 10;
623 scalefactor = interpolate_scalingfactor(chip->rbatt_sf_lut,
624 batt_temp, soc_rbatt_mohm);
625 pr_debug("rbatt sf = %d for batt_temp = %d, soc_rbatt = %d\n",
626 scalefactor, batt_temp, soc_rbatt_mohm);
627 rbatt_mohm = (rbatt_mohm * scalefactor) / 100;
628
629 rbatt_mohm += chip->r_conn_mohm;
630 pr_debug("adding r_conn_mohm = %d rbatt = %d\n",
631 chip->r_conn_mohm, rbatt_mohm);
632
633 pr_debug("RBATT = %d\n", rbatt_mohm);
634 return rbatt_mohm;
635}
636
637static void calculate_iavg(struct qpnp_bms_chip *chip, int cc_uah,
638 int *iavg_ua)
639{
640 int delta_cc_uah, delta_time_s, rc;
641 struct rtc_time tm;
642 struct rtc_device *rtc;
643 unsigned long now_tm_sec = 0;
644
645 rc = 0;
646 /* if anything fails report the previous iavg_ua */
647 *iavg_ua = chip->prev_iavg_ua;
648
649 rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
650 if (rtc == NULL) {
651 pr_err("%s: unable to open rtc device (%s)\n",
652 __FILE__, CONFIG_RTC_HCTOSYS_DEVICE);
653 goto out;
654 }
655
656 rc = rtc_read_time(rtc, &tm);
657 if (rc) {
658 pr_err("Error reading rtc device (%s) : %d\n",
659 CONFIG_RTC_HCTOSYS_DEVICE, rc);
660 goto out;
661 }
662
663 rc = rtc_valid_tm(&tm);
664 if (rc) {
665 pr_err("Invalid RTC time (%s): %d\n",
666 CONFIG_RTC_HCTOSYS_DEVICE, rc);
667 goto out;
668 }
669 rtc_tm_to_time(&tm, &now_tm_sec);
670
671 if (chip->tm_sec == 0) {
672 get_battery_current(chip, iavg_ua);
673 goto out;
674 }
675
676 delta_time_s = (now_tm_sec - chip->tm_sec);
677
678 /* use the previous iavg if called within 15 seconds */
679 if (delta_time_s < 15) {
680 *iavg_ua = chip->prev_iavg_ua;
681 goto out;
682 }
683
684 delta_cc_uah = cc_uah - chip->last_cc_uah;
685
686 *iavg_ua = div_s64((s64)delta_cc_uah * 3600, delta_time_s);
687
688 pr_debug("tm_sec = %ld, now_tm_sec = %ld delta_s = %d delta_cc = %d iavg_ua = %d\n",
689 chip->tm_sec, now_tm_sec,
690 delta_time_s, delta_cc_uah, (int)*iavg_ua);
691
692out:
693 /* remember the iavg */
694 chip->prev_iavg_ua = *iavg_ua;
695
696 /* remember cc_uah */
697 chip->last_cc_uah = cc_uah;
698
699 /* remember this time */
700 chip->tm_sec = now_tm_sec;
701}
702
703static int calculate_termination_uuc(struct qpnp_bms_chip *chip,
704 struct soc_params *params,
705 int batt_temp, int uuc_iavg_ma,
706 int *ret_pc_unusable)
707{
708 int unusable_uv, pc_unusable, uuc_uah;
709 int i = 0;
710 int ocv_mv;
711 int batt_temp_degc = batt_temp / 10;
712 int rbatt_mohm;
713 int delta_uv;
714 int prev_delta_uv = 0;
715 int prev_rbatt_mohm = 0;
716 int uuc_rbatt_mohm;
717
718 for (i = 0; i <= 100; i++) {
719 ocv_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
720 batt_temp_degc, i);
721 rbatt_mohm = get_rbatt(chip, i, batt_temp);
722 unusable_uv = (rbatt_mohm * uuc_iavg_ma)
723 + (chip->v_cutoff_uv);
724 delta_uv = ocv_mv * 1000 - unusable_uv;
725
726 pr_debug("soc = %d ocv = %d rbat = %d u_uv = %d delta_v = %d\n",
727 i, ocv_mv, rbatt_mohm, unusable_uv, delta_uv);
728
729 if (delta_uv > 0)
730 break;
731
732 prev_delta_uv = delta_uv;
733 prev_rbatt_mohm = rbatt_mohm;
734 }
735
736 uuc_rbatt_mohm = linear_interpolate(rbatt_mohm, delta_uv,
737 prev_rbatt_mohm, prev_delta_uv,
738 0);
739
740 unusable_uv = (uuc_rbatt_mohm * uuc_iavg_ma) + (chip->v_cutoff_uv);
741
742 pc_unusable = calculate_pc(chip, unusable_uv, batt_temp);
743 uuc_uah = (params->fcc_uah * pc_unusable) / 100;
744 pr_debug("For uuc_iavg_ma = %d, unusable_rbatt = %d unusable_uv = %d unusable_pc = %d uuc = %d\n",
745 uuc_iavg_ma,
746 uuc_rbatt_mohm, unusable_uv,
747 pc_unusable, uuc_uah);
748 *ret_pc_unusable = pc_unusable;
749 return uuc_uah;
750}
751
752static int adjust_uuc(struct qpnp_bms_chip *chip,
753 struct soc_params *params,
754 int new_pc_unusable,
755 int new_uuc_uah,
756 int batt_temp)
757{
758 int new_unusable_mv, new_iavg_ma;
759 int batt_temp_degc = batt_temp / 10;
760
761 if (chip->prev_pc_unusable == -EINVAL
762 || abs(chip->prev_pc_unusable - new_pc_unusable) <= 1) {
763 chip->prev_pc_unusable = new_pc_unusable;
764 return new_uuc_uah;
765 }
766
767 /* the uuc is trying to change more than 1% restrict it */
768 if (new_pc_unusable > chip->prev_pc_unusable)
769 chip->prev_pc_unusable++;
770 else
771 chip->prev_pc_unusable--;
772
773 new_uuc_uah = (params->fcc_uah * chip->prev_pc_unusable) / 100;
774
775 /* also find update the iavg_ma accordingly */
776 new_unusable_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
777 batt_temp_degc, chip->prev_pc_unusable);
778 if (new_unusable_mv < chip->v_cutoff_uv/1000)
779 new_unusable_mv = chip->v_cutoff_uv/1000;
780
781 new_iavg_ma = (new_unusable_mv * 1000 - chip->v_cutoff_uv)
782 / params->rbatt;
783 if (new_iavg_ma == 0)
784 new_iavg_ma = 1;
785 chip->prev_uuc_iavg_ma = new_iavg_ma;
786 pr_debug("Restricting UUC to %d (%d%%) unusable_mv = %d iavg_ma = %d\n",
787 new_uuc_uah, chip->prev_pc_unusable,
788 new_unusable_mv, new_iavg_ma);
789
790 return new_uuc_uah;
791}
792
793#define CHARGING_IAVG_MA 250
794#define MIN_SECONDS_FOR_VALID_SAMPLE 20
795static int calculate_unusable_charge_uah(struct qpnp_bms_chip *chip,
796 struct soc_params *params,
797 int batt_temp)
798{
799 int uuc_uah_iavg;
800 int i;
801 int uuc_iavg_ma = params->iavg_ua / 1000;
802 int pc_unusable;
803
804 /*
805 * if called first time, fill all the samples with
806 * the shutdown_iavg_ma
807 */
808 if (chip->first_time_calc_uuc && chip->shutdown_iavg_ma != 0) {
809 pr_debug("Using shutdown_iavg_ma = %d in all samples\n",
810 chip->shutdown_iavg_ma);
811 for (i = 0; i < IAVG_SAMPLES; i++)
812 chip->iavg_samples_ma[i] = chip->shutdown_iavg_ma;
813
814 chip->iavg_index = 0;
815 chip->iavg_num_samples = IAVG_SAMPLES;
816 }
817
818 /*
819 * if charging use a nominal avg current to keep
820 * a reasonable UUC while charging
821 */
822 if (uuc_iavg_ma < 0)
823 uuc_iavg_ma = CHARGING_IAVG_MA;
824 chip->iavg_samples_ma[chip->iavg_index] = uuc_iavg_ma;
825 chip->iavg_index = (chip->iavg_index + 1) % IAVG_SAMPLES;
826 chip->iavg_num_samples++;
827 if (chip->iavg_num_samples >= IAVG_SAMPLES)
828 chip->iavg_num_samples = IAVG_SAMPLES;
829
830 /* now that this sample is added calcualte the average */
831 uuc_iavg_ma = 0;
832 if (chip->iavg_num_samples != 0) {
833 for (i = 0; i < chip->iavg_num_samples; i++) {
834 pr_debug("iavg_samples_ma[%d] = %d\n", i,
835 chip->iavg_samples_ma[i]);
836 uuc_iavg_ma += chip->iavg_samples_ma[i];
837 }
838
839 uuc_iavg_ma = DIV_ROUND_CLOSEST(uuc_iavg_ma,
840 chip->iavg_num_samples);
841 }
842
843 uuc_uah_iavg = calculate_termination_uuc(chip, params, uuc_iavg_ma,
844 batt_temp, &pc_unusable);
845 pr_debug("uuc_iavg_ma = %d uuc with iavg = %d\n",
846 uuc_iavg_ma, uuc_uah_iavg);
847
848 chip->prev_uuc_iavg_ma = uuc_iavg_ma;
849 /* restrict the uuc such that it can increase only by one percent */
850 uuc_uah_iavg = adjust_uuc(chip, params, pc_unusable,
851 uuc_uah_iavg, batt_temp);
852
853 chip->first_time_calc_uuc = 0;
854 return uuc_uah_iavg;
855}
856
857static void find_ocv_for_soc(struct qpnp_bms_chip *chip,
858 struct soc_params *params,
859 int batt_temp,
860 int shutdown_soc,
861 int *ret_ocv_uv)
862{
863 s64 ocv_charge_uah;
864 int pc, new_pc;
865 int batt_temp_degc = batt_temp / 10;
866 int ocv_uv;
867
868 ocv_charge_uah = (s64)shutdown_soc
869 * (params->fcc_uah - params->uuc_uah);
870 ocv_charge_uah = div_s64(ocv_charge_uah, 100)
871 + params->cc_uah + params->uuc_uah;
872 pc = DIV_ROUND_CLOSEST((int)ocv_charge_uah * 100, params->fcc_uah);
873 pc = clamp(pc, 0, 100);
874
875 ocv_uv = interpolate_ocv(chip->pc_temp_ocv_lut, batt_temp_degc, pc);
876
877 pr_debug("s_soc = %d, fcc = %d uuc = %d rc = %d, pc = %d, ocv mv = %d\n",
878 shutdown_soc, params->fcc_uah,
879 params->uuc_uah, (int)ocv_charge_uah,
880 pc, ocv_uv);
881 new_pc = interpolate_pc(chip->pc_temp_ocv_lut, batt_temp_degc, ocv_uv);
882 pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv_uv);
883
884 while (abs(new_pc - pc) > 1) {
885 int delta_mv = 5;
886
887 if (new_pc > pc)
888 delta_mv = -1 * delta_mv;
889
890 ocv_uv = ocv_uv + delta_mv;
891 new_pc = interpolate_pc(chip->pc_temp_ocv_lut,
892 batt_temp_degc, ocv_uv);
893 pr_debug("test revlookup pc = %d for ocv = %d\n",
894 new_pc, ocv_uv);
895 }
896
897 *ret_ocv_uv = ocv_uv * 1000;
898 params->ocv_charge_uah = (int)ocv_charge_uah;
899}
900
901static void calculate_soc_params(struct qpnp_bms_chip *chip,
902 struct raw_soc_params *raw,
903 struct soc_params *params,
904 int batt_temp)
905{
906 int soc_rbatt;
907
908 params->fcc_uah = calculate_fcc(chip, batt_temp);
909 pr_debug("FCC = %uuAh batt_temp = %d\n", params->fcc_uah, batt_temp);
910
911 /* calculate remainging charge */
912 params->ocv_charge_uah = calculate_ocv_charge(
913 chip, raw,
914 params->fcc_uah,
915 batt_temp);
916 pr_debug("ocv_charge_uah = %uuAh\n", params->ocv_charge_uah);
917
918 /* calculate cc micro_volt_hour */
919 params->cc_uah = calculate_cc(chip, raw->cc);
920 pr_debug("cc_uah = %duAh raw->cc = %llx cc = %lld after subtracting %llx\n",
921 params->cc_uah, raw->cc,
922 (int64_t)raw->cc - chip->cc_reading_at_100,
923 chip->cc_reading_at_100);
924
925 soc_rbatt = ((params->ocv_charge_uah - params->cc_uah) * 100)
926 / params->fcc_uah;
927 if (soc_rbatt < 0)
928 soc_rbatt = 0;
929 params->rbatt = get_rbatt(chip, soc_rbatt, batt_temp);
930
931 calculate_iavg(chip, params->cc_uah, &params->iavg_ua);
932
933 params->uuc_uah = calculate_unusable_charge_uah(chip, params,
934 batt_temp);
935 pr_debug("UUC = %uuAh\n", params->uuc_uah);
936}
937
938static bool is_shutdown_soc_within_limits(struct qpnp_bms_chip *chip, int soc)
939{
940 if (chip->shutdown_soc_invalid) {
941 pr_debug("NOT forcing shutdown soc = %d\n", chip->shutdown_soc);
942 return 0;
943 }
944
945 if (abs(chip->shutdown_soc - soc) > chip->shutdown_soc_valid_limit) {
946 pr_debug("rejecting shutdown soc = %d, soc = %d limit = %d\n",
947 chip->shutdown_soc, soc,
948 chip->shutdown_soc_valid_limit);
949 chip->shutdown_soc_invalid = 1;
950 return 0;
951 }
952
953 return 1;
954}
955
956static int adjust_soc(struct qpnp_bms_chip *chip, struct soc_params *params,
957 int soc, int batt_temp)
958{
959 pr_debug("Do not adjust\n");
960 return soc;
961}
962
Xiaozhe Shicd7e5302012-10-17 12:29:53 -0700963static int calculate_state_of_charge(struct qpnp_bms_chip *chip,
964 struct raw_soc_params *raw,
965 int batt_temp)
966{
Xiaozhe Shie118c692012-09-24 15:17:43 -0700967 int soc, new_ocv_uv;
968 int shutdown_soc, new_calculated_soc, remaining_usable_charge_uah;
969 struct soc_params params;
970
971 calculate_soc_params(chip, raw, &params, batt_temp);
972 /* calculate remaining usable charge */
973 remaining_usable_charge_uah = params.ocv_charge_uah
974 - params.cc_uah
975 - params.uuc_uah;
976
977 pr_debug("RUC = %duAh\n", remaining_usable_charge_uah);
978 if (params.fcc_uah - params.uuc_uah <= 0) {
979 pr_warn("FCC = %duAh, UUC = %duAh forcing soc = 0\n",
980 params.fcc_uah,
981 params.uuc_uah);
982 soc = 0;
983 } else {
984 soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
985 (params.fcc_uah
986 - params.uuc_uah));
987 }
988
989 if (chip->first_time_calc_soc && soc < 0) {
990 /*
991 * first time calcualtion and the pon ocv is too low resulting
992 * in a bad soc. Adjust ocv to get 0 soc
993 */
994 pr_debug("soc is %d, adjusting pon ocv to make it 0\n", soc);
995 find_ocv_for_soc(chip, &params, batt_temp, 0, &new_ocv_uv);
996 chip->last_ocv_uv = new_ocv_uv;
997
998 remaining_usable_charge_uah = params.ocv_charge_uah
999 - params.cc_uah
1000 - params.uuc_uah;
1001
1002 soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
1003 (params.fcc_uah
1004 - params.uuc_uah));
1005 pr_debug("DONE for O soc is %d, pon ocv adjusted to %duV\n",
1006 soc, chip->last_ocv_uv);
1007 }
1008
1009 if (soc > 100)
1010 soc = 100;
1011
1012 if (soc < 0) {
1013 pr_err("bad rem_usb_chg = %d rem_chg %d, cc_uah %d, unusb_chg %d\n",
1014 remaining_usable_charge_uah,
1015 params.ocv_charge_uah,
1016 params.cc_uah, params.uuc_uah);
1017
1018 pr_err("for bad rem_usb_chg last_ocv_uv = %d batt_temp = %d fcc = %d soc =%d\n",
1019 chip->last_ocv_uv, batt_temp,
1020 params.fcc_uah, soc);
1021 soc = 0;
1022 }
1023
1024 mutex_lock(&chip->soc_invalidation_mutex);
1025 shutdown_soc = chip->shutdown_soc;
1026
1027 if (chip->first_time_calc_soc && soc != shutdown_soc
1028 && is_shutdown_soc_within_limits(chip, soc)) {
1029 /*
1030 * soc for the first time - use shutdown soc
1031 * to adjust pon ocv since it is a small percent away from
1032 * the real soc
1033 */
1034 pr_debug("soc = %d before forcing shutdown_soc = %d\n",
1035 soc, shutdown_soc);
1036 find_ocv_for_soc(chip, &params, batt_temp,
1037 shutdown_soc, &new_ocv_uv);
1038 chip->pon_ocv_uv = chip->last_ocv_uv;
1039 chip->last_ocv_uv = new_ocv_uv;
1040
1041 remaining_usable_charge_uah = params.ocv_charge_uah
1042 - params.cc_uah
1043 - params.uuc_uah;
1044
1045 soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
1046 (params.fcc_uah
1047 - params.uuc_uah));
1048
1049 pr_debug("DONE for shutdown_soc = %d soc is %d, adjusted ocv to %duV\n",
1050 shutdown_soc, soc, chip->last_ocv_uv);
1051 }
1052 mutex_unlock(&chip->soc_invalidation_mutex);
1053
1054 pr_debug("SOC before adjustment = %d\n", soc);
1055 new_calculated_soc = adjust_soc(chip, &params, soc, batt_temp);
1056
1057 if (new_calculated_soc != chip->calculated_soc
1058 && chip->bms_psy.name != NULL) {
1059 power_supply_changed(&chip->bms_psy);
1060 pr_debug("power supply changed\n");
1061 }
1062
1063 chip->calculated_soc = new_calculated_soc;
1064 pr_debug("Set calculated SOC = %d\n", chip->calculated_soc);
1065 chip->first_time_calc_soc = 0;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001066 return chip->calculated_soc;
1067}
1068
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001069static void read_vbat(struct qpnp_bms_chip *chip)
1070{
1071 int rc;
1072 struct qpnp_vadc_result result;
1073
1074 rc = qpnp_vadc_read(VBAT_SNS, &result);
1075 if (rc) {
1076 pr_err("error reading vadc VBAT_SNS = %d, rc = %d\n",
1077 VBAT_SNS, rc);
1078 return;
1079 }
1080 chip->last_vbat_read_uv = (int)result.physical;
1081}
1082
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001083static void calculate_soc_work(struct work_struct *work)
1084{
1085 struct qpnp_bms_chip *chip = container_of(work,
1086 struct qpnp_bms_chip,
1087 calculate_soc_delayed_work.work);
1088 int batt_temp, rc, soc;
1089 struct qpnp_vadc_result result;
1090 struct raw_soc_params raw;
1091
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001092 read_vbat(chip);
1093
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001094 rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result);
1095 if (rc) {
1096 pr_err("error reading vadc LR_MUX1_BATT_THERM = %d, rc = %d\n",
1097 LR_MUX1_BATT_THERM, rc);
1098 return;
1099 }
1100 pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
1101 result.measurement);
1102 batt_temp = (int)result.physical;
1103
1104 mutex_lock(&chip->last_ocv_uv_mutex);
1105 read_soc_params_raw(chip, &raw);
1106 soc = calculate_state_of_charge(chip, &raw, batt_temp);
1107 mutex_unlock(&chip->last_ocv_uv_mutex);
1108
1109 if (soc < chip->low_soc_calc_threshold)
1110 schedule_delayed_work(&chip->calculate_soc_delayed_work,
1111 round_jiffies_relative(msecs_to_jiffies
1112 (chip->low_soc_calculate_soc_ms)));
1113 else
1114 schedule_delayed_work(&chip->calculate_soc_delayed_work,
1115 round_jiffies_relative(msecs_to_jiffies
1116 (chip->calculate_soc_ms)));
1117}
1118
Xiaozhe Shie118c692012-09-24 15:17:43 -07001119static void backup_soc_and_iavg(struct qpnp_bms_chip *chip, int batt_temp,
1120 int soc)
1121{
1122 u8 temp;
1123 int rc;
1124 int iavg_ma = chip->prev_uuc_iavg_ma;
1125
1126 if (iavg_ma > IAVG_START)
1127 temp = (iavg_ma - IAVG_START) / IAVG_STEP_SIZE_MA;
1128 else
1129 temp = 0;
1130
1131 rc = qpnp_write_wrapper(chip, &temp,
1132 chip->base + IAVG_STORAGE_REG, 1);
1133
1134 if (soc == 0)
1135 temp = SOC_ZERO;
1136 else
1137 temp = soc;
1138
1139 /* don't store soc if temperature is below 5degC */
1140 if (batt_temp > IGNORE_SOC_TEMP_DECIDEG)
1141 rc = qpnp_write_wrapper(chip, &temp,
1142 chip->base + SOC_STORAGE_REG, 1);
1143}
1144
1145#define SOC_CATCHUP_SEC_MAX 600
1146#define SOC_CATCHUP_SEC_PER_PERCENT 60
1147#define MAX_CATCHUP_SOC (SOC_CATCHUP_SEC_MAX/SOC_CATCHUP_SEC_PER_PERCENT)
1148static int scale_soc_while_chg(struct qpnp_bms_chip *chip,
1149 int delta_time_us, int new_soc, int prev_soc)
1150{
1151 int chg_time_sec;
1152 int catch_up_sec;
1153 int scaled_soc;
1154 int numerator;
1155
1156 /*
1157 * The device must be charging for reporting a higher soc, if
1158 * not ignore this soc and continue reporting the prev_soc.
1159 * Also don't report a high value immediately slowly scale the
1160 * value from prev_soc to the new soc based on a charge time
1161 * weighted average
1162 */
1163
1164 /* if not charging, return last soc */
1165 if (chip->start_percent == -EINVAL)
1166 return prev_soc;
1167
1168 chg_time_sec = DIV_ROUND_UP(chip->charge_time_us, USEC_PER_SEC);
1169 catch_up_sec = DIV_ROUND_UP(chip->catch_up_time_us, USEC_PER_SEC);
1170 pr_debug("cts= %d catch_up_sec = %d\n", chg_time_sec, catch_up_sec);
1171
1172 /*
1173 * if charging for more than catch_up time, simply return
1174 * new soc
1175 */
1176 if (chg_time_sec > catch_up_sec)
1177 return new_soc;
1178
1179 numerator = (catch_up_sec - chg_time_sec) * prev_soc
1180 + chg_time_sec * new_soc;
1181 scaled_soc = numerator / catch_up_sec;
1182
1183 pr_debug("cts = %d new_soc = %d prev_soc = %d scaled_soc = %d\n",
1184 chg_time_sec, new_soc, prev_soc, scaled_soc);
1185
1186 return scaled_soc;
1187}
1188
1189/*
1190 * bms_fake_battery is set in setups where a battery emulator is used instead
1191 * of a real battery. This makes the bms driver report a different/fake value
1192 * regardless of the calculated state of charge.
1193 */
1194static int bms_fake_battery = -EINVAL;
1195module_param(bms_fake_battery, int, 0644);
1196
1197static int report_state_of_charge(struct qpnp_bms_chip *chip)
1198{
1199 int soc;
1200 int delta_time_us;
1201 struct timespec now;
1202 struct qpnp_vadc_result result;
1203 int batt_temp;
1204 int rc;
1205
1206 if (bms_fake_battery != -EINVAL) {
1207 pr_debug("Returning Fake SOC = %d%%\n", bms_fake_battery);
1208 return bms_fake_battery;
1209 }
1210
1211 soc = chip->calculated_soc;
1212
1213 rc = qpnp_vadc_read(LR_MUX1_BATT_THERM, &result);
1214
1215 if (rc) {
1216 pr_err("error reading adc channel = %d, rc = %d\n",
1217 LR_MUX1_BATT_THERM, rc);
1218 return rc;
1219 }
1220 pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
1221 result.measurement);
1222 batt_temp = (int)result.physical;
1223
1224 do_posix_clock_monotonic_gettime(&now);
1225 if (chip->t_soc_queried.tv_sec != 0) {
1226 delta_time_us
1227 = (now.tv_sec - chip->t_soc_queried.tv_sec) * USEC_PER_SEC
1228 + (now.tv_nsec - chip->t_soc_queried.tv_nsec) / 1000;
1229 } else {
1230 /* calculation for the first time */
1231 delta_time_us = 0;
1232 }
1233
1234 /*
1235 * account for charge time - limit it to SOC_CATCHUP_SEC to
1236 * avoid overflows when charging continues for extended periods
1237 */
1238 if (chip->start_percent != -EINVAL) {
1239 if (chip->charge_time_us == 0) {
1240 /*
1241 * calculating soc for the first time
1242 * after start of chg. Initialize catchup time
1243 */
1244 if (abs(soc - chip->last_soc) < MAX_CATCHUP_SOC)
1245 chip->catch_up_time_us =
1246 (soc - chip->last_soc)
1247 * SOC_CATCHUP_SEC_PER_PERCENT
1248 * USEC_PER_SEC;
1249 else
1250 chip->catch_up_time_us =
1251 SOC_CATCHUP_SEC_MAX * USEC_PER_SEC;
1252
1253 if (chip->catch_up_time_us < 0)
1254 chip->catch_up_time_us = 0;
1255 }
1256
1257 /* add charge time */
1258 if (chip->charge_time_us < SOC_CATCHUP_SEC_MAX * USEC_PER_SEC)
1259 chip->charge_time_us += delta_time_us;
1260
1261 /* end catchup if calculated soc and last soc are same */
1262 if (chip->last_soc == soc)
1263 chip->catch_up_time_us = 0;
1264 }
1265
1266 /* last_soc < soc ... scale and catch up */
1267 if (chip->last_soc != -EINVAL && chip->last_soc < soc && soc != 100)
1268 soc = scale_soc_while_chg(chip, delta_time_us,
1269 soc, chip->last_soc);
1270
1271 pr_debug("last_soc = %d, calculated_soc = %d, soc = %d\n",
1272 chip->last_soc, chip->calculated_soc, soc);
1273 chip->last_soc = soc;
1274 backup_soc_and_iavg(chip, batt_temp, chip->last_soc);
1275 pr_debug("Reported SOC = %d\n", chip->last_soc);
1276 chip->t_soc_queried = now;
1277
1278 return chip->last_soc;
1279}
1280
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001281static int calculate_soc_from_voltage(struct qpnp_bms_chip *chip)
1282{
1283 int voltage_range_uv, voltage_remaining_uv, voltage_based_soc;
1284
1285 if (chip->last_vbat_read_uv < 0)
1286 read_vbat(chip);
1287
1288 voltage_range_uv = chip->max_voltage_uv - chip->v_cutoff_uv;
1289 voltage_remaining_uv = chip->last_vbat_read_uv - chip->v_cutoff_uv;
1290 voltage_based_soc = voltage_remaining_uv * 100 / voltage_range_uv;
1291
1292 return clamp(voltage_based_soc, 0, 100);
1293}
1294
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001295/* Returns capacity as a SoC percentage between 0 and 100 */
1296static int get_prop_bms_capacity(struct qpnp_bms_chip *chip)
1297{
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001298 if (use_voltage_soc)
1299 return calculate_soc_from_voltage(chip);
Xiaozhe Shie118c692012-09-24 15:17:43 -07001300 else
1301 return report_state_of_charge(chip);
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001302}
1303
1304/* Returns instantaneous current in uA */
1305static int get_prop_bms_current_now(struct qpnp_bms_chip *chip)
1306{
1307 /* temporarily return 0 until a real algorithm is put in */
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001308 int rc, result_ua;
1309
1310 rc = get_battery_current(chip, &result_ua);
1311 if (rc) {
1312 pr_err("failed to get current: %d\n", rc);
1313 return rc;
1314 }
1315 return result_ua;
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001316}
1317
1318/* Returns full charge design in uAh */
1319static int get_prop_bms_charge_full_design(struct qpnp_bms_chip *chip)
1320{
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001321 return chip->fcc;
1322}
1323
1324static bool get_prop_bms_online(struct qpnp_bms_chip *chip)
1325{
1326 return chip->online;
1327}
1328
1329static int get_prop_bms_status(struct qpnp_bms_chip *chip)
1330{
1331 return chip->charger_status;
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001332}
1333
1334static void set_prop_bms_online(struct qpnp_bms_chip *chip, bool online)
1335{
1336 chip->online = online;
1337}
1338
1339static void set_prop_bms_status(struct qpnp_bms_chip *chip, int status)
1340{
1341 chip->charger_status = status;
1342}
1343
1344static void qpnp_bms_external_power_changed(struct power_supply *psy)
1345{
1346}
1347
1348static int qpnp_bms_power_get_property(struct power_supply *psy,
1349 enum power_supply_property psp,
1350 union power_supply_propval *val)
1351{
1352 struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip,
1353 bms_psy);
1354
1355 switch (psp) {
1356 case POWER_SUPPLY_PROP_CAPACITY:
1357 val->intval = get_prop_bms_capacity(chip);
1358 break;
1359 case POWER_SUPPLY_PROP_CURRENT_NOW:
1360 val->intval = get_prop_bms_current_now(chip);
1361 break;
1362 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1363 val->intval = get_prop_bms_charge_full_design(chip);
1364 break;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001365 case POWER_SUPPLY_PROP_STATUS:
1366 val->intval = get_prop_bms_status(chip);
1367 break;
1368 case POWER_SUPPLY_PROP_ONLINE:
1369 val->intval = get_prop_bms_online(chip);
1370 break;
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001371 default:
1372 return -EINVAL;
1373 }
1374 return 0;
1375}
1376
1377static int qpnp_bms_power_set_property(struct power_supply *psy,
1378 enum power_supply_property psp,
1379 const union power_supply_propval *val)
1380{
1381 struct qpnp_bms_chip *chip = container_of(psy, struct qpnp_bms_chip,
1382 bms_psy);
1383
1384 switch (psp) {
1385 case POWER_SUPPLY_PROP_ONLINE:
1386 set_prop_bms_online(chip, val->intval);
1387 break;
1388 case POWER_SUPPLY_PROP_STATUS:
1389 set_prop_bms_status(chip, (bool)val->intval);
1390 break;
1391 default:
1392 return -EINVAL;
1393 }
1394 return 0;
1395}
1396
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001397static void read_shutdown_soc_and_iavg(struct qpnp_bms_chip *chip)
1398{
1399 int rc;
1400 u8 temp;
1401
1402 if (chip->ignore_shutdown_soc) {
1403 chip->shutdown_soc_invalid = 1;
1404 chip->shutdown_soc = 0;
1405 chip->shutdown_iavg_ma = 0;
1406 } else {
1407 rc = qpnp_read_wrapper(chip, &temp,
1408 chip->base + IAVG_STORAGE_REG, 1);
1409 if (rc) {
1410 pr_err("failed to read addr = %d %d assuming %d\n",
1411 chip->base + IAVG_STORAGE_REG, rc,
1412 IAVG_START);
1413 chip->shutdown_iavg_ma = IAVG_START;
1414 } else {
1415 if (temp == 0) {
1416 chip->shutdown_iavg_ma = IAVG_START;
1417 } else {
1418 chip->shutdown_iavg_ma = IAVG_START
1419 + IAVG_STEP_SIZE_MA * (temp + 1);
1420 }
1421 }
1422
1423 rc = qpnp_read_wrapper(chip, &temp,
1424 chip->base + SOC_STORAGE_REG, 1);
1425 if (rc) {
1426 pr_err("failed to read addr = %d %d\n",
1427 chip->base + SOC_STORAGE_REG, rc);
1428 } else {
1429 chip->shutdown_soc = temp;
1430
1431 if (chip->shutdown_soc == 0) {
1432 pr_debug("No shutdown soc available\n");
1433 chip->shutdown_soc_invalid = 1;
1434 chip->shutdown_iavg_ma = 0;
1435 } else if (chip->shutdown_soc == SOC_ZERO) {
1436 chip->shutdown_soc = 0;
1437 }
1438 }
1439 }
1440
1441 pr_debug("shutdown_soc = %d shutdown_iavg = %d shutdown_soc_invalid = %d\n",
1442 chip->shutdown_soc,
1443 chip->shutdown_iavg_ma,
1444 chip->shutdown_soc_invalid);
1445}
1446
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001447#define PALLADIUM_ID_MIN 0x7F40
1448#define PALLADIUM_ID_MAX 0x7F5A
1449#define DESAY_5200_ID_MIN 0x7F7F
1450#define DESAY_5200_ID_MAX 0x802F
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001451static int32_t read_battery_id(struct qpnp_bms_chip *chip)
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001452{
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001453 int rc;
1454 struct qpnp_vadc_result result;
1455
1456 rc = qpnp_vadc_read(LR_MUX2_BAT_ID, &result);
1457 if (rc) {
1458 pr_err("error reading batt id channel = %d, rc = %d\n",
1459 LR_MUX2_BAT_ID, rc);
1460 return rc;
1461 }
1462 pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical,
1463 result.measurement);
1464 pr_debug("raw_code = 0x%x\n", result.adc_code);
1465 return result.adc_code;
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001466}
1467
1468static int set_battery_data(struct qpnp_bms_chip *chip)
1469{
1470 int64_t battery_id;
1471
1472 if (chip->batt_type == BATT_DESAY)
1473 goto desay;
1474 else if (chip->batt_type == BATT_PALLADIUM)
1475 goto palladium;
1476
1477 battery_id = read_battery_id(chip);
1478 if (battery_id < 0) {
1479 pr_err("cannot read battery id err = %lld\n", battery_id);
1480 return battery_id;
1481 }
1482
1483 if (is_between(PALLADIUM_ID_MIN, PALLADIUM_ID_MAX, battery_id)) {
1484 goto palladium;
1485 } else if (is_between(DESAY_5200_ID_MIN, DESAY_5200_ID_MAX,
1486 battery_id)) {
1487 goto desay;
1488 } else {
1489 pr_warn("invalid battid, palladium 1500 assumed batt_id %llx\n",
1490 battery_id);
1491 goto palladium;
1492 }
1493
1494palladium:
1495 chip->fcc = palladium_1500_data.fcc;
1496 chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut;
1497 chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut;
1498 chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut;
1499 chip->pc_sf_lut = palladium_1500_data.pc_sf_lut;
1500 chip->rbatt_sf_lut = palladium_1500_data.rbatt_sf_lut;
1501 chip->default_rbatt_mohm
1502 = palladium_1500_data.default_rbatt_mohm;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001503 goto check_lut;
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001504desay:
1505 chip->fcc = desay_5200_data.fcc;
1506 chip->fcc_temp_lut = desay_5200_data.fcc_temp_lut;
1507 chip->pc_temp_ocv_lut = desay_5200_data.pc_temp_ocv_lut;
1508 chip->pc_sf_lut = desay_5200_data.pc_sf_lut;
1509 chip->rbatt_sf_lut = desay_5200_data.rbatt_sf_lut;
1510 chip->default_rbatt_mohm = desay_5200_data.default_rbatt_mohm;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001511 goto check_lut;
1512check_lut:
1513 if (chip->pc_temp_ocv_lut == NULL) {
1514 pr_err("temp ocv lut table is NULL\n");
1515 return -EINVAL;
1516 }
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001517 return 0;
1518}
1519
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001520#define SPMI_PROP_READ(chip_prop, qpnp_spmi_property, retval) \
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001521do { \
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001522 retval = of_property_read_u32(chip->spmi->dev.of_node, \
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001523 "qcom,bms-" qpnp_spmi_property, \
1524 &chip->chip_prop); \
1525 if (retval) { \
1526 pr_err("Error reading " #qpnp_spmi_property \
1527 " property %d\n", rc); \
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001528 return -EINVAL; \
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001529 } \
1530} while (0)
1531
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001532static inline int bms_read_properties(struct qpnp_bms_chip *chip)
1533{
1534 int rc;
1535
1536 SPMI_PROP_READ(r_sense_mohm, "r-sense-mohm", rc);
1537 SPMI_PROP_READ(v_cutoff_uv, "v-cutoff-uv", rc);
1538 SPMI_PROP_READ(max_voltage_uv, "max-voltage-uv", rc);
1539 SPMI_PROP_READ(r_conn_mohm, "r-conn-mohm", rc);
1540 SPMI_PROP_READ(chg_term_ua, "chg-term-ua", rc);
1541 SPMI_PROP_READ(shutdown_soc_valid_limit,
1542 "shutdown-soc-valid-limit", rc);
1543 SPMI_PROP_READ(adjust_soc_high_threshold,
1544 "adjust-soc-high-threshold", rc);
1545 SPMI_PROP_READ(adjust_soc_low_threshold,
1546 "adjust-soc-low-threshold", rc);
1547 SPMI_PROP_READ(batt_type, "batt-type", rc);
1548 SPMI_PROP_READ(low_soc_calc_threshold,
1549 "low-soc-calculate-soc-threshold", rc);
1550 SPMI_PROP_READ(low_soc_calculate_soc_ms,
1551 "low-soc-calculate-soc-ms", rc);
1552 SPMI_PROP_READ(calculate_soc_ms, "calculate-soc-ms", rc);
1553 chip->ignore_shutdown_soc = of_property_read_bool(
1554 chip->spmi->dev.of_node,
1555 "qcom,bms-ignore-shutdown-soc");
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001556 use_voltage_soc = of_property_read_bool(chip->spmi->dev.of_node,
1557 "qcom,bms-use-voltage-soc");
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001558
1559 if (chip->adjust_soc_low_threshold >= 45)
1560 chip->adjust_soc_low_threshold = 45;
1561
1562 pr_debug("dts data: r_sense_mohm:%d, v_cutoff_uv:%d, max_v:%d\n",
1563 chip->r_sense_mohm, chip->v_cutoff_uv,
1564 chip->max_voltage_uv);
1565 pr_debug("r_conn:%d, shutdown_soc: %d, adjust_soc_low:%d\n",
1566 chip->r_conn_mohm, chip->shutdown_soc_valid_limit,
1567 chip->adjust_soc_low_threshold);
1568 pr_debug("adjust_soc_high:%d, chg_term_ua:%d, batt_type:%d\n",
1569 chip->adjust_soc_high_threshold, chip->chg_term_ua,
1570 chip->batt_type);
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001571 pr_debug("ignore_shutdown_soc:%d, use_voltage_soc:%d\n",
1572 chip->ignore_shutdown_soc, use_voltage_soc);
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001573
1574 return 0;
1575}
1576
1577static inline void bms_initialize_constants(struct qpnp_bms_chip *chip)
1578{
1579 chip->start_percent = -EINVAL;
1580 chip->end_percent = -EINVAL;
1581 chip->prev_pc_unusable = -EINVAL;
1582 chip->soc_at_cv = -EINVAL;
1583 chip->calculated_soc = -EINVAL;
Xiaozhe Shie118c692012-09-24 15:17:43 -07001584 chip->last_soc = -EINVAL;
Xiaozhe Shi781b0a22012-11-05 17:18:27 -08001585 chip->last_vbat_read_uv = -EINVAL;
Xiaozhe Shie118c692012-09-24 15:17:43 -07001586 chip->first_time_calc_soc = 1;
1587 chip->first_time_calc_uuc = 1;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001588}
1589
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001590static int __devinit
1591qpnp_bms_probe(struct spmi_device *spmi)
1592{
1593 struct qpnp_bms_chip *chip;
1594 struct resource *bms_resource;
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001595 int rc, vbatt;
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001596
1597 chip = kzalloc(sizeof *chip, GFP_KERNEL);
1598
1599 if (chip == NULL) {
1600 pr_err("kzalloc() failed.\n");
1601 return -ENOMEM;
1602 }
1603
1604 chip->dev = &(spmi->dev);
1605 chip->spmi = spmi;
1606
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001607 mutex_init(&chip->bms_output_lock);
1608 mutex_init(&chip->last_ocv_uv_mutex);
Xiaozhe Shie118c692012-09-24 15:17:43 -07001609 mutex_init(&chip->soc_invalidation_mutex);
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001610
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001611 bms_resource = spmi_get_resource(spmi, NULL, IORESOURCE_MEM, 0);
1612 if (!bms_resource) {
1613 dev_err(&spmi->dev, "Unable to get BMS base address\n");
1614 return -ENXIO;
1615 }
1616 chip->base = bms_resource->start;
1617
1618 rc = qpnp_read_wrapper(chip, &chip->revision1,
1619 chip->base + BMS1_REVISION1, 1);
1620 if (rc) {
1621 pr_err("error reading version register %d\n", rc);
1622 goto error_read;
1623 }
1624
1625 rc = qpnp_read_wrapper(chip, &chip->revision2,
1626 chip->base + BMS1_REVISION2, 1);
1627 if (rc) {
1628 pr_err("Error reading version register %d\n", rc);
1629 goto error_read;
1630 }
1631
Xiaozhe Shi73a65692012-09-18 17:51:57 -07001632 rc = set_battery_data(chip);
1633 if (rc) {
1634 pr_err("Bad battery data %d\n", rc);
1635 goto error_read;
1636 }
1637
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001638 rc = bms_read_properties(chip);
1639 if (rc) {
1640 pr_err("Unable to read all bms properties, rc = %d\n", rc);
1641 goto error_read;
1642 }
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001643
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001644 bms_initialize_constants(chip);
1645
1646 INIT_DELAYED_WORK(&chip->calculate_soc_delayed_work,
1647 calculate_soc_work);
1648
1649 read_shutdown_soc_and_iavg(chip);
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001650
1651 dev_set_drvdata(&spmi->dev, chip);
1652 device_init_wakeup(&spmi->dev, 1);
1653
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001654 calculate_soc_work(&(chip->calculate_soc_delayed_work.work));
1655
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001656 /* setup & register the battery power supply */
1657 chip->bms_psy.name = "bms";
1658 chip->bms_psy.type = POWER_SUPPLY_TYPE_BMS;
1659 chip->bms_psy.properties = msm_bms_power_props;
1660 chip->bms_psy.num_properties = ARRAY_SIZE(msm_bms_power_props);
1661 chip->bms_psy.get_property = qpnp_bms_power_get_property;
1662 chip->bms_psy.set_property = qpnp_bms_power_set_property;
1663 chip->bms_psy.external_power_changed =
1664 qpnp_bms_external_power_changed;
1665 chip->bms_psy.supplied_to = qpnp_bms_supplicants;
1666 chip->bms_psy.num_supplicants = ARRAY_SIZE(qpnp_bms_supplicants);
1667
1668 rc = power_supply_register(chip->dev, &chip->bms_psy);
1669
1670 if (rc < 0) {
1671 pr_err("power_supply_register bms failed rc = %d\n", rc);
1672 goto unregister_dc;
1673 }
1674
Xiaozhe Shicd7e5302012-10-17 12:29:53 -07001675 vbatt = 0;
1676 get_battery_voltage(&vbatt);
1677
1678 pr_info("OK battery_capacity_at_boot=%d vbatt = %d\n",
1679 get_prop_bms_capacity(chip),
1680 vbatt);
Xiaozhe Shib19f7032012-08-16 12:14:16 -07001681 pr_info("probe success\n");
1682 return 0;
1683
1684unregister_dc:
1685 power_supply_unregister(&chip->bms_psy);
1686 dev_set_drvdata(&spmi->dev, NULL);
1687error_read:
1688 kfree(chip);
1689 return rc;
1690}
1691
1692static int __devexit
1693qpnp_bms_remove(struct spmi_device *spmi)
1694{
1695 struct qpnp_bms_chip *chip = dev_get_drvdata(&spmi->dev);
1696
1697 dev_set_drvdata(&spmi->dev, NULL);
1698 kfree(chip);
1699 return 0;
1700}
1701
1702static struct spmi_driver qpnp_bms_driver = {
1703 .probe = qpnp_bms_probe,
1704 .remove = __devexit_p(qpnp_bms_remove),
1705 .driver = {
1706 .name = QPNP_BMS_DEV_NAME,
1707 .owner = THIS_MODULE,
1708 .of_match_table = qpnp_bms_match_table,
1709 },
1710};
1711
1712static int __init qpnp_bms_init(void)
1713{
1714 pr_info("QPNP BMS INIT\n");
1715 return spmi_driver_register(&qpnp_bms_driver);
1716}
1717
1718static void __exit qpnp_bms_exit(void)
1719{
1720 pr_info("QPNP BMS EXIT\n");
1721 return spmi_driver_unregister(&qpnp_bms_driver);
1722}
1723
1724module_init(qpnp_bms_init);
1725module_exit(qpnp_bms_exit);
1726
1727MODULE_DESCRIPTION("QPNP BMS Driver");
1728MODULE_LICENSE("GPL v2");
1729MODULE_ALIAS("platform:" QPNP_BMS_DEV_NAME);