blob: 73db34bf588ae7985fc50c71e9e2a4aa3af7a5f8 [file] [log] [blame]
Yong Shen64f102b2010-10-21 21:18:59 +08001/*
2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
9 *
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
12 */
13
14/*
15 * A driver for the Freescale Semiconductor i.MXC CPUfreq module.
Lucas De Marchi25985ed2011-03-30 22:57:33 -030016 * The CPUFREQ driver is for controlling CPU frequency. It allows you to change
Yong Shen64f102b2010-10-21 21:18:59 +080017 * the CPU clock speed on the fly.
18 */
19
Richard Zhao300a47b2011-12-09 10:46:21 +080020#include <linux/module.h>
Yong Shen64f102b2010-10-21 21:18:59 +080021#include <linux/cpufreq.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/slab.h>
25#include <mach/hardware.h>
26#include <mach/clock.h>
27
28#define CLK32_FREQ 32768
29#define NANOSECOND (1000 * 1000 * 1000)
30
31struct cpu_op *(*get_cpu_op)(int *op);
32
33static int cpu_freq_khz_min;
34static int cpu_freq_khz_max;
35
36static struct clk *cpu_clk;
37static struct cpufreq_frequency_table *imx_freq_table;
38
39static int cpu_op_nr;
40static struct cpu_op *cpu_op_tbl;
41
42static int set_cpu_freq(int freq)
43{
44 int ret = 0;
45 int org_cpu_rate;
46
47 org_cpu_rate = clk_get_rate(cpu_clk);
48 if (org_cpu_rate == freq)
49 return ret;
50
51 ret = clk_set_rate(cpu_clk, freq);
52 if (ret != 0) {
53 printk(KERN_DEBUG "cannot set CPU clock rate\n");
54 return ret;
55 }
56
57 return ret;
58}
59
60static int mxc_verify_speed(struct cpufreq_policy *policy)
61{
62 if (policy->cpu != 0)
63 return -EINVAL;
64
65 return cpufreq_frequency_table_verify(policy, imx_freq_table);
66}
67
68static unsigned int mxc_get_speed(unsigned int cpu)
69{
70 if (cpu)
71 return 0;
72
73 return clk_get_rate(cpu_clk) / 1000;
74}
75
76static int mxc_set_target(struct cpufreq_policy *policy,
77 unsigned int target_freq, unsigned int relation)
78{
79 struct cpufreq_freqs freqs;
80 int freq_Hz;
81 int ret = 0;
82 unsigned int index;
83
84 cpufreq_frequency_table_target(policy, imx_freq_table,
85 target_freq, relation, &index);
86 freq_Hz = imx_freq_table[index].frequency * 1000;
87
88 freqs.old = clk_get_rate(cpu_clk) / 1000;
89 freqs.new = freq_Hz / 1000;
90 freqs.cpu = 0;
91 freqs.flags = 0;
92 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
93
94 ret = set_cpu_freq(freq_Hz);
95
96 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
97
98 return ret;
99}
100
Richard Zhaoe1bff312011-12-13 14:25:27 +0800101static int mxc_cpufreq_init(struct cpufreq_policy *policy)
Yong Shen64f102b2010-10-21 21:18:59 +0800102{
103 int ret;
104 int i;
105
106 printk(KERN_INFO "i.MXC CPU frequency driver\n");
107
108 if (policy->cpu != 0)
109 return -EINVAL;
110
111 if (!get_cpu_op)
112 return -EINVAL;
113
114 cpu_clk = clk_get(NULL, "cpu_clk");
115 if (IS_ERR(cpu_clk)) {
116 printk(KERN_ERR "%s: failed to get cpu clock\n", __func__);
117 return PTR_ERR(cpu_clk);
118 }
119
120 cpu_op_tbl = get_cpu_op(&cpu_op_nr);
121
122 cpu_freq_khz_min = cpu_op_tbl[0].cpu_rate / 1000;
123 cpu_freq_khz_max = cpu_op_tbl[0].cpu_rate / 1000;
124
125 imx_freq_table = kmalloc(
126 sizeof(struct cpufreq_frequency_table) * (cpu_op_nr + 1),
127 GFP_KERNEL);
128 if (!imx_freq_table) {
129 ret = -ENOMEM;
130 goto err1;
131 }
132
133 for (i = 0; i < cpu_op_nr; i++) {
134 imx_freq_table[i].index = i;
135 imx_freq_table[i].frequency = cpu_op_tbl[i].cpu_rate / 1000;
136
137 if ((cpu_op_tbl[i].cpu_rate / 1000) < cpu_freq_khz_min)
138 cpu_freq_khz_min = cpu_op_tbl[i].cpu_rate / 1000;
139
140 if ((cpu_op_tbl[i].cpu_rate / 1000) > cpu_freq_khz_max)
141 cpu_freq_khz_max = cpu_op_tbl[i].cpu_rate / 1000;
142 }
143
144 imx_freq_table[i].index = i;
145 imx_freq_table[i].frequency = CPUFREQ_TABLE_END;
146
147 policy->cur = clk_get_rate(cpu_clk) / 1000;
Yong Shen64f102b2010-10-21 21:18:59 +0800148 policy->min = policy->cpuinfo.min_freq = cpu_freq_khz_min;
149 policy->max = policy->cpuinfo.max_freq = cpu_freq_khz_max;
150
151 /* Manual states, that PLL stabilizes in two CLK32 periods */
152 policy->cpuinfo.transition_latency = 2 * NANOSECOND / CLK32_FREQ;
153
154 ret = cpufreq_frequency_table_cpuinfo(policy, imx_freq_table);
155
156 if (ret < 0) {
Joe Perches85ee7a12011-04-23 20:38:19 -0700157 printk(KERN_ERR "%s: failed to register i.MXC CPUfreq with error code %d\n",
158 __func__, ret);
Yong Shen64f102b2010-10-21 21:18:59 +0800159 goto err;
160 }
161
162 cpufreq_frequency_table_get_attr(imx_freq_table, policy->cpu);
163 return 0;
164err:
165 kfree(imx_freq_table);
166err1:
167 clk_put(cpu_clk);
168 return ret;
169}
170
171static int mxc_cpufreq_exit(struct cpufreq_policy *policy)
172{
173 cpufreq_frequency_table_put_attr(policy->cpu);
174
175 set_cpu_freq(cpu_freq_khz_max * 1000);
176 clk_put(cpu_clk);
177 kfree(imx_freq_table);
178 return 0;
179}
180
181static struct cpufreq_driver mxc_driver = {
182 .flags = CPUFREQ_STICKY,
183 .verify = mxc_verify_speed,
184 .target = mxc_set_target,
185 .get = mxc_get_speed,
186 .init = mxc_cpufreq_init,
187 .exit = mxc_cpufreq_exit,
188 .name = "imx",
189};
190
191static int __devinit mxc_cpufreq_driver_init(void)
192{
193 return cpufreq_register_driver(&mxc_driver);
194}
195
196static void mxc_cpufreq_driver_exit(void)
197{
198 cpufreq_unregister_driver(&mxc_driver);
199}
200
201module_init(mxc_cpufreq_driver_init);
202module_exit(mxc_cpufreq_driver_exit);
203
204MODULE_AUTHOR("Freescale Semiconductor Inc. Yong Shen <yong.shen@linaro.org>");
205MODULE_DESCRIPTION("CPUfreq driver for i.MX");
206MODULE_LICENSE("GPL");