Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #include <linux/init.h> |
| 2 | #include <linux/pci.h> |
| 3 | |
| 4 | /* PCI interrupt pins */ |
| 5 | #define PCIA 1 |
| 6 | #define PCIB 2 |
| 7 | #define PCIC 3 |
| 8 | #define PCID 4 |
| 9 | |
| 10 | /* This table is filled in by interrogating the PIIX4 chip */ |
| 11 | static char pci_irq[5] __initdata; |
| 12 | |
| 13 | static char irq_tab[][5] __initdata = { |
| 14 | /* INTA INTB INTC INTD */ |
| 15 | {0, 0, 0, 0, 0 }, /* 0: GT64120 PCI bridge */ |
| 16 | {0, 0, 0, 0, 0 }, /* 1: Unused */ |
| 17 | {0, 0, 0, 0, 0 }, /* 2: Unused */ |
| 18 | {0, 0, 0, 0, 0 }, /* 3: Unused */ |
| 19 | {0, 0, 0, 0, 0 }, /* 4: Unused */ |
| 20 | {0, 0, 0, 0, 0 }, /* 5: Unused */ |
| 21 | {0, 0, 0, 0, 0 }, /* 6: Unused */ |
| 22 | {0, 0, 0, 0, 0 }, /* 7: Unused */ |
| 23 | {0, 0, 0, 0, 0 }, /* 8: Unused */ |
| 24 | {0, 0, 0, 0, 0 }, /* 9: Unused */ |
| 25 | {0, 0, 0, 0, PCID }, /* 10: PIIX4 USB */ |
| 26 | {0, PCIB, 0, 0, 0 }, /* 11: AMD 79C973 Ethernet */ |
| 27 | {0, PCIC, 0, 0, 0 }, /* 12: Crystal 4281 Sound */ |
| 28 | {0, 0, 0, 0, 0 }, /* 13: Unused */ |
| 29 | {0, 0, 0, 0, 0 }, /* 14: Unused */ |
| 30 | {0, 0, 0, 0, 0 }, /* 15: Unused */ |
| 31 | {0, 0, 0, 0, 0 }, /* 16: Unused */ |
| 32 | {0, 0, 0, 0, 0 }, /* 17: Bonito/SOC-it PCI Bridge*/ |
| 33 | {0, PCIA, PCIB, PCIC, PCID }, /* 18: PCI Slot 1 */ |
| 34 | {0, PCIB, PCIC, PCID, PCIA }, /* 19: PCI Slot 2 */ |
| 35 | {0, PCIC, PCID, PCIA, PCIB }, /* 20: PCI Slot 3 */ |
| 36 | {0, PCID, PCIA, PCIB, PCIC } /* 21: PCI Slot 4 */ |
| 37 | }; |
| 38 | |
Ralf Baechle | 19df0d1 | 2007-07-10 17:33:00 +0100 | [diff] [blame] | 39 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | { |
| 41 | int virq; |
| 42 | virq = irq_tab[slot][pin]; |
| 43 | return pci_irq[virq]; |
| 44 | } |
| 45 | |
| 46 | /* Do platform specific device initialization at pci_enable_device() time */ |
| 47 | int pcibios_plat_dev_init(struct pci_dev *dev) |
| 48 | { |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static void __init malta_piix_func0_fixup(struct pci_dev *pdev) |
| 53 | { |
| 54 | unsigned char reg_val; |
| 55 | static int piixirqmap[16] __initdata = { /* PIIX PIRQC[A:D] irq mappings */ |
| 56 | 0, 0, 0, 3, |
| 57 | 4, 5, 6, 7, |
| 58 | 0, 9, 10, 11, |
Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 59 | 12, 0, 14, 15 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | }; |
| 61 | int i; |
| 62 | |
| 63 | /* Interrogate PIIX4 to get PCI IRQ mapping */ |
| 64 | for (i = 0; i <= 3; i++) { |
| 65 | pci_read_config_byte(pdev, 0x60+i, ®_val); |
| 66 | if (reg_val & 0x80) |
| 67 | pci_irq[PCIA+i] = 0; /* Disabled */ |
| 68 | else |
| 69 | pci_irq[PCIA+i] = piixirqmap[reg_val & 15]; |
| 70 | } |
| 71 | |
| 72 | /* Done by YAMON 2.00 onwards */ |
| 73 | if (PCI_SLOT(pdev->devfn) == 10) { |
| 74 | /* |
| 75 | * Set top of main memory accessible by ISA or DMA |
| 76 | * devices to 16 Mb. |
| 77 | */ |
| 78 | pci_read_config_byte(pdev, 0x69, ®_val); |
| 79 | pci_write_config_byte(pdev, 0x69, reg_val | 0xf0); |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, |
| 84 | malta_piix_func0_fixup); |
| 85 | |
| 86 | static void __init malta_piix_func1_fixup(struct pci_dev *pdev) |
| 87 | { |
| 88 | unsigned char reg_val; |
| 89 | |
| 90 | /* Done by YAMON 2.02 onwards */ |
| 91 | if (PCI_SLOT(pdev->devfn) == 10) { |
| 92 | /* |
| 93 | * IDE Decode enable. |
| 94 | */ |
| 95 | pci_read_config_byte(pdev, 0x41, ®_val); |
| 96 | pci_write_config_byte(pdev, 0x41, reg_val|0x80); |
| 97 | pci_read_config_byte(pdev, 0x43, ®_val); |
| 98 | pci_write_config_byte(pdev, 0x43, reg_val|0x80); |
| 99 | } |
| 100 | } |
| 101 | |
| 102 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB, |
| 103 | malta_piix_func1_fixup); |