Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 3 | * hda_intel.c - Implementation of primary alsa driver code base |
| 4 | * for Intel HD Audio. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * Copyright(c) 2004 Intel Corporation. All rights reserved. |
| 7 | * |
| 8 | * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> |
| 9 | * PeiSen Hou <pshou@realtek.com.tw> |
| 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify it |
| 12 | * under the terms of the GNU General Public License as published by the Free |
| 13 | * Software Foundation; either version 2 of the License, or (at your option) |
| 14 | * any later version. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 17 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 19 | * more details. |
| 20 | * |
| 21 | * You should have received a copy of the GNU General Public License along with |
| 22 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 23 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 24 | * |
| 25 | * CONTACTS: |
| 26 | * |
| 27 | * Matt Jared matt.jared@intel.com |
| 28 | * Andy Kopp andy.kopp@intel.com |
| 29 | * Dan Kogan dan.d.kogan@intel.com |
| 30 | * |
| 31 | * CHANGES: |
| 32 | * |
| 33 | * 2004.12.01 Major rewrite by tiwai, merged the work of pshou |
| 34 | * |
| 35 | */ |
| 36 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <asm/io.h> |
| 38 | #include <linux/delay.h> |
| 39 | #include <linux/interrupt.h> |
Randy Dunlap | 362775e | 2005-11-07 14:43:23 +0100 | [diff] [blame] | 40 | #include <linux/kernel.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | #include <linux/module.h> |
| 42 | #include <linux/moduleparam.h> |
| 43 | #include <linux/init.h> |
| 44 | #include <linux/slab.h> |
| 45 | #include <linux/pci.h> |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 46 | #include <linux/mutex.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <sound/core.h> |
| 48 | #include <sound/initval.h> |
| 49 | #include "hda_codec.h" |
| 50 | |
| 51 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 52 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; |
| 53 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; |
| 54 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; |
| 55 | static char *model[SNDRV_CARDS]; |
| 56 | static int position_fix[SNDRV_CARDS]; |
| 57 | static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1}; |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 58 | static int single_cmd; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 59 | static int enable_msi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 61 | module_param_array(index, int, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | MODULE_PARM_DESC(index, "Index value for Intel HD audio interface."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 63 | module_param_array(id, charp, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | MODULE_PARM_DESC(id, "ID string for Intel HD audio interface."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 65 | module_param_array(enable, bool, NULL, 0444); |
| 66 | MODULE_PARM_DESC(enable, "Enable Intel HD audio interface."); |
| 67 | module_param_array(model, charp, NULL, 0444); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | MODULE_PARM_DESC(model, "Use the given board model."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 69 | module_param_array(position_fix, int, NULL, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 70 | MODULE_PARM_DESC(position_fix, "Fix DMA pointer " |
| 71 | "(0 = auto, 1 = none, 2 = POSBUF, 3 = FIFO size)."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 72 | module_param_array(probe_mask, int, NULL, 0444); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 73 | MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1)."); |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 74 | module_param(single_cmd, bool, 0444); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 75 | MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs " |
| 76 | "(for debugging only)."); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 77 | module_param(enable_msi, int, 0444); |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 78 | MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)"); |
Takashi Iwai | 606ad75 | 2005-11-24 16:03:40 +0100 | [diff] [blame] | 79 | |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 80 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 81 | /* power_save option is defined in hda_codec.c */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 83 | /* reset the HD-audio controller in power save mode. |
| 84 | * this may give more power-saving, but will take longer time to |
| 85 | * wake up. |
| 86 | */ |
| 87 | static int power_save_controller = 1; |
| 88 | module_param(power_save_controller, bool, 0644); |
| 89 | MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode."); |
| 90 | #endif |
| 91 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | MODULE_LICENSE("GPL"); |
| 93 | MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," |
| 94 | "{Intel, ICH6M}," |
Jason Gaston | 2f1b381 | 2005-05-01 08:58:50 -0700 | [diff] [blame] | 95 | "{Intel, ICH7}," |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 96 | "{Intel, ESB2}," |
Jason Gaston | d298139 | 2006-01-10 11:07:37 +0100 | [diff] [blame] | 97 | "{Intel, ICH8}," |
Jason Gaston | f9cc8a8 | 2006-11-22 11:53:52 +0100 | [diff] [blame] | 98 | "{Intel, ICH9}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 99 | "{ATI, SB450}," |
Felix Kuehling | 89be83f | 2006-03-31 12:33:59 +0200 | [diff] [blame] | 100 | "{ATI, SB600}," |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 101 | "{ATI, RS600}," |
Felix Kuehling | 5b15c95 | 2006-10-16 12:49:47 +0200 | [diff] [blame] | 102 | "{ATI, RS690}," |
Wolke Liu | e6db111 | 2007-04-27 12:20:57 +0200 | [diff] [blame] | 103 | "{ATI, RS780}," |
| 104 | "{ATI, R600}," |
Herton Ronaldo Krzesinski | 2797f72 | 2007-11-05 18:21:56 +0100 | [diff] [blame] | 105 | "{ATI, RV630}," |
| 106 | "{ATI, RV610}," |
Wolke Liu | 27da183 | 2007-11-16 11:06:30 +0100 | [diff] [blame] | 107 | "{ATI, RV670}," |
| 108 | "{ATI, RV635}," |
| 109 | "{ATI, RV620}," |
| 110 | "{ATI, RV770}," |
Takashi Iwai | fc20a56 | 2005-05-12 15:00:41 +0200 | [diff] [blame] | 111 | "{VIA, VT8251}," |
Takashi Iwai | 4767231 | 2005-08-12 16:44:04 +0200 | [diff] [blame] | 112 | "{VIA, VT8237A}," |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 113 | "{SiS, SIS966}," |
| 114 | "{ULI, M5461}}"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | MODULE_DESCRIPTION("Intel HDA driver"); |
| 116 | |
| 117 | #define SFX "hda-intel: " |
| 118 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 119 | |
| 120 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | * registers |
| 122 | */ |
| 123 | #define ICH6_REG_GCAP 0x00 |
| 124 | #define ICH6_REG_VMIN 0x02 |
| 125 | #define ICH6_REG_VMAJ 0x03 |
| 126 | #define ICH6_REG_OUTPAY 0x04 |
| 127 | #define ICH6_REG_INPAY 0x06 |
| 128 | #define ICH6_REG_GCTL 0x08 |
| 129 | #define ICH6_REG_WAKEEN 0x0c |
| 130 | #define ICH6_REG_STATESTS 0x0e |
| 131 | #define ICH6_REG_GSTS 0x10 |
| 132 | #define ICH6_REG_INTCTL 0x20 |
| 133 | #define ICH6_REG_INTSTS 0x24 |
| 134 | #define ICH6_REG_WALCLK 0x30 |
| 135 | #define ICH6_REG_SYNC 0x34 |
| 136 | #define ICH6_REG_CORBLBASE 0x40 |
| 137 | #define ICH6_REG_CORBUBASE 0x44 |
| 138 | #define ICH6_REG_CORBWP 0x48 |
| 139 | #define ICH6_REG_CORBRP 0x4A |
| 140 | #define ICH6_REG_CORBCTL 0x4c |
| 141 | #define ICH6_REG_CORBSTS 0x4d |
| 142 | #define ICH6_REG_CORBSIZE 0x4e |
| 143 | |
| 144 | #define ICH6_REG_RIRBLBASE 0x50 |
| 145 | #define ICH6_REG_RIRBUBASE 0x54 |
| 146 | #define ICH6_REG_RIRBWP 0x58 |
| 147 | #define ICH6_REG_RINTCNT 0x5a |
| 148 | #define ICH6_REG_RIRBCTL 0x5c |
| 149 | #define ICH6_REG_RIRBSTS 0x5d |
| 150 | #define ICH6_REG_RIRBSIZE 0x5e |
| 151 | |
| 152 | #define ICH6_REG_IC 0x60 |
| 153 | #define ICH6_REG_IR 0x64 |
| 154 | #define ICH6_REG_IRS 0x68 |
| 155 | #define ICH6_IRS_VALID (1<<1) |
| 156 | #define ICH6_IRS_BUSY (1<<0) |
| 157 | |
| 158 | #define ICH6_REG_DPLBASE 0x70 |
| 159 | #define ICH6_REG_DPUBASE 0x74 |
| 160 | #define ICH6_DPLBASE_ENABLE 0x1 /* Enable position buffer */ |
| 161 | |
| 162 | /* SD offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 163 | enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 }; |
| 164 | |
| 165 | /* stream register offsets from stream base */ |
| 166 | #define ICH6_REG_SD_CTL 0x00 |
| 167 | #define ICH6_REG_SD_STS 0x03 |
| 168 | #define ICH6_REG_SD_LPIB 0x04 |
| 169 | #define ICH6_REG_SD_CBL 0x08 |
| 170 | #define ICH6_REG_SD_LVI 0x0c |
| 171 | #define ICH6_REG_SD_FIFOW 0x0e |
| 172 | #define ICH6_REG_SD_FIFOSIZE 0x10 |
| 173 | #define ICH6_REG_SD_FORMAT 0x12 |
| 174 | #define ICH6_REG_SD_BDLPL 0x18 |
| 175 | #define ICH6_REG_SD_BDLPU 0x1c |
| 176 | |
| 177 | /* PCI space */ |
| 178 | #define ICH6_PCIREG_TCSEL 0x44 |
| 179 | |
| 180 | /* |
| 181 | * other constants |
| 182 | */ |
| 183 | |
| 184 | /* max number of SDs */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 185 | /* ICH, ATI and VIA have 4 playback and 4 capture */ |
| 186 | #define ICH6_CAPTURE_INDEX 0 |
| 187 | #define ICH6_NUM_CAPTURE 4 |
| 188 | #define ICH6_PLAYBACK_INDEX 4 |
| 189 | #define ICH6_NUM_PLAYBACK 4 |
| 190 | |
| 191 | /* ULI has 6 playback and 5 capture */ |
| 192 | #define ULI_CAPTURE_INDEX 0 |
| 193 | #define ULI_NUM_CAPTURE 5 |
| 194 | #define ULI_PLAYBACK_INDEX 5 |
| 195 | #define ULI_NUM_PLAYBACK 6 |
| 196 | |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 197 | /* ATI HDMI has 1 playback and 0 capture */ |
| 198 | #define ATIHDMI_CAPTURE_INDEX 0 |
| 199 | #define ATIHDMI_NUM_CAPTURE 0 |
| 200 | #define ATIHDMI_PLAYBACK_INDEX 0 |
| 201 | #define ATIHDMI_NUM_PLAYBACK 1 |
| 202 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 203 | /* this number is statically defined for simplicity */ |
| 204 | #define MAX_AZX_DEV 16 |
| 205 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | /* max number of fragments - we may use more if allocating more pages for BDL */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 207 | #define BDL_SIZE PAGE_ALIGN(8192) |
| 208 | #define AZX_MAX_FRAG (BDL_SIZE / (MAX_AZX_DEV * 16)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | /* max buffer size - no h/w limit, you can increase as you like */ |
| 210 | #define AZX_MAX_BUF_SIZE (1024*1024*1024) |
| 211 | /* max number of PCM devics per card */ |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 212 | #define AZX_MAX_AUDIO_PCMS 6 |
| 213 | #define AZX_MAX_MODEM_PCMS 2 |
| 214 | #define AZX_MAX_PCMS (AZX_MAX_AUDIO_PCMS + AZX_MAX_MODEM_PCMS) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 215 | |
| 216 | /* RIRB int mask: overrun[2], response[0] */ |
| 217 | #define RIRB_INT_RESPONSE 0x01 |
| 218 | #define RIRB_INT_OVERRUN 0x04 |
| 219 | #define RIRB_INT_MASK 0x05 |
| 220 | |
| 221 | /* STATESTS int mask: SD2,SD1,SD0 */ |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 222 | #define AZX_MAX_CODECS 3 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | #define STATESTS_INT_MASK 0x07 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | |
| 225 | /* SD_CTL bits */ |
| 226 | #define SD_CTL_STREAM_RESET 0x01 /* stream reset bit */ |
| 227 | #define SD_CTL_DMA_START 0x02 /* stream DMA start bit */ |
| 228 | #define SD_CTL_STREAM_TAG_MASK (0xf << 20) |
| 229 | #define SD_CTL_STREAM_TAG_SHIFT 20 |
| 230 | |
| 231 | /* SD_CTL and SD_STS */ |
| 232 | #define SD_INT_DESC_ERR 0x10 /* descriptor error interrupt */ |
| 233 | #define SD_INT_FIFO_ERR 0x08 /* FIFO error interrupt */ |
| 234 | #define SD_INT_COMPLETE 0x04 /* completion interrupt */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 235 | #define SD_INT_MASK (SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\ |
| 236 | SD_INT_COMPLETE) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | |
| 238 | /* SD_STS */ |
| 239 | #define SD_STS_FIFO_READY 0x20 /* FIFO ready */ |
| 240 | |
| 241 | /* INTCTL and INTSTS */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 242 | #define ICH6_INT_ALL_STREAM 0xff /* all stream interrupts */ |
| 243 | #define ICH6_INT_CTRL_EN 0x40000000 /* controller interrupt enable bit */ |
| 244 | #define ICH6_INT_GLOBAL_EN 0x80000000 /* global interrupt enable bit */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 245 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 246 | /* GCTL unsolicited response enable bit */ |
| 247 | #define ICH6_GCTL_UREN (1<<8) |
| 248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | /* GCTL reset bit */ |
| 250 | #define ICH6_GCTL_RESET (1<<0) |
| 251 | |
| 252 | /* CORB/RIRB control, read/write pointer */ |
| 253 | #define ICH6_RBCTL_DMA_EN 0x02 /* enable DMA */ |
| 254 | #define ICH6_RBCTL_IRQ_EN 0x01 /* enable IRQ */ |
| 255 | #define ICH6_RBRWP_CLR 0x8000 /* read/write pointer clear */ |
| 256 | /* below are so far hardcoded - should read registers in future */ |
| 257 | #define ICH6_MAX_CORB_ENTRIES 256 |
| 258 | #define ICH6_MAX_RIRB_ENTRIES 256 |
| 259 | |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 260 | /* position fix mode */ |
| 261 | enum { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 262 | POS_FIX_AUTO, |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 263 | POS_FIX_NONE, |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 264 | POS_FIX_POSBUF, |
| 265 | POS_FIX_FIFO, |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 266 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 268 | /* Defines for ATI HD Audio support in SB450 south bridge */ |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 269 | #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR 0x42 |
| 270 | #define ATI_SB450_HDAUDIO_ENABLE_SNOOP 0x02 |
| 271 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 272 | /* Defines for Nvidia HDA support */ |
| 273 | #define NVIDIA_HDA_TRANSREG_ADDR 0x4e |
| 274 | #define NVIDIA_HDA_ENABLE_COHBITS 0x0f |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 275 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 276 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | */ |
| 278 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 279 | struct azx_dev { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 280 | u32 *bdl; /* virtual address of the BDL */ |
| 281 | dma_addr_t bdl_addr; /* physical address of the BDL */ |
| 282 | u32 *posbuf; /* position buffer pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 284 | unsigned int bufsize; /* size of the play buffer in bytes */ |
| 285 | unsigned int fragsize; /* size of each period in bytes */ |
| 286 | unsigned int frags; /* number for period in the play buffer */ |
| 287 | unsigned int fifo_size; /* FIFO size */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 289 | void __iomem *sd_addr; /* stream descriptor pointer */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 290 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 291 | u32 sd_int_sta_mask; /* stream int status mask */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | |
| 293 | /* pcm support */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 294 | struct snd_pcm_substream *substream; /* assigned substream, |
| 295 | * set in PCM open |
| 296 | */ |
| 297 | unsigned int format_val; /* format value to be set in the |
| 298 | * controller and the codec |
| 299 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | unsigned char stream_tag; /* assigned stream */ |
| 301 | unsigned char index; /* stream index */ |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 302 | /* for sanity check of position buffer */ |
| 303 | unsigned int period_intr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 305 | unsigned int opened :1; |
| 306 | unsigned int running :1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | }; |
| 308 | |
| 309 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 310 | struct azx_rb { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | u32 *buf; /* CORB/RIRB buffer |
| 312 | * Each CORB entry is 4byte, RIRB is 8byte |
| 313 | */ |
| 314 | dma_addr_t addr; /* physical address of CORB/RIRB buffer */ |
| 315 | /* for RIRB */ |
| 316 | unsigned short rp, wp; /* read/write pointers */ |
| 317 | int cmds; /* number of pending requests */ |
| 318 | u32 res; /* last read value */ |
| 319 | }; |
| 320 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 321 | struct azx { |
| 322 | struct snd_card *card; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | struct pci_dev *pci; |
| 324 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 325 | /* chip type specific */ |
| 326 | int driver_type; |
| 327 | int playback_streams; |
| 328 | int playback_index_offset; |
| 329 | int capture_streams; |
| 330 | int capture_index_offset; |
| 331 | int num_streams; |
| 332 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | /* pci resources */ |
| 334 | unsigned long addr; |
| 335 | void __iomem *remap_addr; |
| 336 | int irq; |
| 337 | |
| 338 | /* locks */ |
| 339 | spinlock_t reg_lock; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 340 | struct mutex open_mutex; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 342 | /* streams (x num_streams) */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 343 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | |
| 345 | /* PCM */ |
| 346 | unsigned int pcm_devs; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 347 | struct snd_pcm *pcm[AZX_MAX_PCMS]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | |
| 349 | /* HD codec */ |
| 350 | unsigned short codec_mask; |
| 351 | struct hda_bus *bus; |
| 352 | |
| 353 | /* CORB/RIRB */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 354 | struct azx_rb corb; |
| 355 | struct azx_rb rirb; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
| 357 | /* BDL, CORB/RIRB and position buffers */ |
| 358 | struct snd_dma_buffer bdl; |
| 359 | struct snd_dma_buffer rb; |
| 360 | struct snd_dma_buffer posbuf; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 361 | |
| 362 | /* flags */ |
| 363 | int position_fix; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 364 | unsigned int running :1; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 365 | unsigned int initialized :1; |
| 366 | unsigned int single_cmd :1; |
| 367 | unsigned int polling_mode :1; |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 368 | unsigned int msi :1; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 369 | |
| 370 | /* for debugging */ |
| 371 | unsigned int last_cmd; /* last issued command (to sync) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | }; |
| 373 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 374 | /* driver types */ |
| 375 | enum { |
| 376 | AZX_DRIVER_ICH, |
| 377 | AZX_DRIVER_ATI, |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 378 | AZX_DRIVER_ATIHDMI, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 379 | AZX_DRIVER_VIA, |
| 380 | AZX_DRIVER_SIS, |
| 381 | AZX_DRIVER_ULI, |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 382 | AZX_DRIVER_NVIDIA, |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 383 | }; |
| 384 | |
| 385 | static char *driver_short_names[] __devinitdata = { |
| 386 | [AZX_DRIVER_ICH] = "HDA Intel", |
| 387 | [AZX_DRIVER_ATI] = "HDA ATI SB", |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 388 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 389 | [AZX_DRIVER_VIA] = "HDA VIA VT82xx", |
| 390 | [AZX_DRIVER_SIS] = "HDA SIS966", |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 391 | [AZX_DRIVER_ULI] = "HDA ULI M5461", |
| 392 | [AZX_DRIVER_NVIDIA] = "HDA NVidia", |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 393 | }; |
| 394 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 395 | /* |
| 396 | * macros for easy use |
| 397 | */ |
| 398 | #define azx_writel(chip,reg,value) \ |
| 399 | writel(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 400 | #define azx_readl(chip,reg) \ |
| 401 | readl((chip)->remap_addr + ICH6_REG_##reg) |
| 402 | #define azx_writew(chip,reg,value) \ |
| 403 | writew(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 404 | #define azx_readw(chip,reg) \ |
| 405 | readw((chip)->remap_addr + ICH6_REG_##reg) |
| 406 | #define azx_writeb(chip,reg,value) \ |
| 407 | writeb(value, (chip)->remap_addr + ICH6_REG_##reg) |
| 408 | #define azx_readb(chip,reg) \ |
| 409 | readb((chip)->remap_addr + ICH6_REG_##reg) |
| 410 | |
| 411 | #define azx_sd_writel(dev,reg,value) \ |
| 412 | writel(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 413 | #define azx_sd_readl(dev,reg) \ |
| 414 | readl((dev)->sd_addr + ICH6_REG_##reg) |
| 415 | #define azx_sd_writew(dev,reg,value) \ |
| 416 | writew(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 417 | #define azx_sd_readw(dev,reg) \ |
| 418 | readw((dev)->sd_addr + ICH6_REG_##reg) |
| 419 | #define azx_sd_writeb(dev,reg,value) \ |
| 420 | writeb(value, (dev)->sd_addr + ICH6_REG_##reg) |
| 421 | #define azx_sd_readb(dev,reg) \ |
| 422 | readb((dev)->sd_addr + ICH6_REG_##reg) |
| 423 | |
| 424 | /* for pcm support */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 425 | #define get_azx_dev(substream) (substream->runtime->private_data) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | |
| 427 | /* Get the upper 32bit of the given dma_addr_t |
| 428 | * Compiler should optimize and eliminate the code if dma_addr_t is 32bit |
| 429 | */ |
| 430 | #define upper_32bit(addr) (sizeof(addr) > 4 ? (u32)((addr) >> 32) : (u32)0) |
| 431 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 432 | static int azx_acquire_irq(struct azx *chip, int do_disconnect); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | |
| 434 | /* |
| 435 | * Interface for HD codec |
| 436 | */ |
| 437 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | /* |
| 439 | * CORB / RIRB interface |
| 440 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 441 | static int azx_alloc_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | { |
| 443 | int err; |
| 444 | |
| 445 | /* single page (at least 4096 bytes) must suffice for both ringbuffes */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 446 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 447 | snd_dma_pci_data(chip->pci), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | PAGE_SIZE, &chip->rb); |
| 449 | if (err < 0) { |
| 450 | snd_printk(KERN_ERR SFX "cannot allocate CORB/RIRB\n"); |
| 451 | return err; |
| 452 | } |
| 453 | return 0; |
| 454 | } |
| 455 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 456 | static void azx_init_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | { |
| 458 | /* CORB set up */ |
| 459 | chip->corb.addr = chip->rb.addr; |
| 460 | chip->corb.buf = (u32 *)chip->rb.area; |
| 461 | azx_writel(chip, CORBLBASE, (u32)chip->corb.addr); |
| 462 | azx_writel(chip, CORBUBASE, upper_32bit(chip->corb.addr)); |
| 463 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 464 | /* set the corb size to 256 entries (ULI requires explicitly) */ |
| 465 | azx_writeb(chip, CORBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 466 | /* set the corb write pointer to 0 */ |
| 467 | azx_writew(chip, CORBWP, 0); |
| 468 | /* reset the corb hw read pointer */ |
| 469 | azx_writew(chip, CORBRP, ICH6_RBRWP_CLR); |
| 470 | /* enable corb dma */ |
| 471 | azx_writeb(chip, CORBCTL, ICH6_RBCTL_DMA_EN); |
| 472 | |
| 473 | /* RIRB set up */ |
| 474 | chip->rirb.addr = chip->rb.addr + 2048; |
| 475 | chip->rirb.buf = (u32 *)(chip->rb.area + 2048); |
| 476 | azx_writel(chip, RIRBLBASE, (u32)chip->rirb.addr); |
| 477 | azx_writel(chip, RIRBUBASE, upper_32bit(chip->rirb.addr)); |
| 478 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 479 | /* set the rirb size to 256 entries (ULI requires explicitly) */ |
| 480 | azx_writeb(chip, RIRBSIZE, 0x02); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | /* reset the rirb hw write pointer */ |
| 482 | azx_writew(chip, RIRBWP, ICH6_RBRWP_CLR); |
| 483 | /* set N=1, get RIRB response interrupt for new entry */ |
| 484 | azx_writew(chip, RINTCNT, 1); |
| 485 | /* enable rirb dma and response irq */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 486 | azx_writeb(chip, RIRBCTL, ICH6_RBCTL_DMA_EN | ICH6_RBCTL_IRQ_EN); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 487 | chip->rirb.rp = chip->rirb.cmds = 0; |
| 488 | } |
| 489 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 490 | static void azx_free_cmd_io(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | { |
| 492 | /* disable ringbuffer DMAs */ |
| 493 | azx_writeb(chip, RIRBCTL, 0); |
| 494 | azx_writeb(chip, CORBCTL, 0); |
| 495 | } |
| 496 | |
| 497 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 498 | static int azx_corb_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 500 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | unsigned int wp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | |
| 503 | /* add command to corb */ |
| 504 | wp = azx_readb(chip, CORBWP); |
| 505 | wp++; |
| 506 | wp %= ICH6_MAX_CORB_ENTRIES; |
| 507 | |
| 508 | spin_lock_irq(&chip->reg_lock); |
| 509 | chip->rirb.cmds++; |
| 510 | chip->corb.buf[wp] = cpu_to_le32(val); |
| 511 | azx_writel(chip, CORBWP, wp); |
| 512 | spin_unlock_irq(&chip->reg_lock); |
| 513 | |
| 514 | return 0; |
| 515 | } |
| 516 | |
| 517 | #define ICH6_RIRB_EX_UNSOL_EV (1<<4) |
| 518 | |
| 519 | /* retrieve RIRB entry - called from interrupt handler */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 520 | static void azx_update_rirb(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | { |
| 522 | unsigned int rp, wp; |
| 523 | u32 res, res_ex; |
| 524 | |
| 525 | wp = azx_readb(chip, RIRBWP); |
| 526 | if (wp == chip->rirb.wp) |
| 527 | return; |
| 528 | chip->rirb.wp = wp; |
| 529 | |
| 530 | while (chip->rirb.rp != wp) { |
| 531 | chip->rirb.rp++; |
| 532 | chip->rirb.rp %= ICH6_MAX_RIRB_ENTRIES; |
| 533 | |
| 534 | rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */ |
| 535 | res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]); |
| 536 | res = le32_to_cpu(chip->rirb.buf[rp]); |
| 537 | if (res_ex & ICH6_RIRB_EX_UNSOL_EV) |
| 538 | snd_hda_queue_unsol_event(chip->bus, res, res_ex); |
| 539 | else if (chip->rirb.cmds) { |
| 540 | chip->rirb.cmds--; |
| 541 | chip->rirb.res = res; |
| 542 | } |
| 543 | } |
| 544 | } |
| 545 | |
| 546 | /* receive a response */ |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 547 | static unsigned int azx_rirb_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 549 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 550 | unsigned long timeout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 551 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 552 | again: |
| 553 | timeout = jiffies + msecs_to_jiffies(1000); |
| 554 | do { |
Takashi Iwai | e96224a | 2006-08-21 17:57:44 +0200 | [diff] [blame] | 555 | if (chip->polling_mode) { |
| 556 | spin_lock_irq(&chip->reg_lock); |
| 557 | azx_update_rirb(chip); |
| 558 | spin_unlock_irq(&chip->reg_lock); |
| 559 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 560 | if (!chip->rirb.cmds) |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 561 | return chip->rirb.res; /* the last value */ |
Ingo Molnar | 9b1fffd | 2007-11-16 15:20:28 +0100 | [diff] [blame] | 562 | udelay(10); |
| 563 | cond_resched(); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 564 | } while (time_after_eq(timeout, jiffies)); |
| 565 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 566 | if (chip->msi) { |
| 567 | snd_printk(KERN_WARNING "hda_intel: No response from codec, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 568 | "disabling MSI: last cmd=0x%08x\n", chip->last_cmd); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 569 | free_irq(chip->irq, chip); |
| 570 | chip->irq = -1; |
| 571 | pci_disable_msi(chip->pci); |
| 572 | chip->msi = 0; |
| 573 | if (azx_acquire_irq(chip, 1) < 0) |
| 574 | return -1; |
| 575 | goto again; |
| 576 | } |
| 577 | |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 578 | if (!chip->polling_mode) { |
| 579 | snd_printk(KERN_WARNING "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 580 | "switching to polling mode: last cmd=0x%08x\n", |
| 581 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 582 | chip->polling_mode = 1; |
| 583 | goto again; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | } |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 585 | |
| 586 | snd_printk(KERN_ERR "hda_intel: azx_get_response timeout, " |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 587 | "switching to single_cmd mode: last cmd=0x%08x\n", |
| 588 | chip->last_cmd); |
Takashi Iwai | 5c79b1f | 2006-09-21 13:34:13 +0200 | [diff] [blame] | 589 | chip->rirb.rp = azx_readb(chip, RIRBWP); |
| 590 | chip->rirb.cmds = 0; |
| 591 | /* switch to single_cmd mode */ |
| 592 | chip->single_cmd = 1; |
| 593 | azx_free_cmd_io(chip); |
| 594 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | } |
| 596 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | /* |
| 598 | * Use the single immediate command instead of CORB/RIRB for simplicity |
| 599 | * |
| 600 | * Note: according to Intel, this is not preferred use. The command was |
| 601 | * intended for the BIOS only, and may get confused with unsolicited |
| 602 | * responses. So, we shouldn't use it for normal operation from the |
| 603 | * driver. |
| 604 | * I left the codes, however, for debugging/testing purposes. |
| 605 | */ |
| 606 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | /* send a command */ |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 608 | static int azx_single_send_cmd(struct hda_codec *codec, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 610 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | int timeout = 50; |
| 612 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | while (timeout--) { |
| 614 | /* check ICB busy bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 615 | if (!((azx_readw(chip, IRS) & ICH6_IRS_BUSY))) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | /* Clear IRV valid bit */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 617 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 618 | ICH6_IRS_VALID); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 619 | azx_writel(chip, IC, val); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 620 | azx_writew(chip, IRS, azx_readw(chip, IRS) | |
| 621 | ICH6_IRS_BUSY); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 622 | return 0; |
| 623 | } |
| 624 | udelay(1); |
| 625 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 626 | snd_printd(SFX "send_cmd timeout: IRS=0x%x, val=0x%x\n", |
| 627 | azx_readw(chip, IRS), val); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | return -EIO; |
| 629 | } |
| 630 | |
| 631 | /* receive a response */ |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 632 | static unsigned int azx_single_get_response(struct hda_codec *codec) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 634 | struct azx *chip = codec->bus->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | int timeout = 50; |
| 636 | |
| 637 | while (timeout--) { |
| 638 | /* check IRV busy bit */ |
| 639 | if (azx_readw(chip, IRS) & ICH6_IRS_VALID) |
| 640 | return azx_readl(chip, IR); |
| 641 | udelay(1); |
| 642 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 643 | snd_printd(SFX "get_response timeout: IRS=0x%x\n", |
| 644 | azx_readw(chip, IRS)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | return (unsigned int)-1; |
| 646 | } |
| 647 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 648 | /* |
| 649 | * The below are the main callbacks from hda_codec. |
| 650 | * |
| 651 | * They are just the skeleton to call sub-callbacks according to the |
| 652 | * current setting of chip->single_cmd. |
| 653 | */ |
| 654 | |
| 655 | /* send a command */ |
| 656 | static int azx_send_cmd(struct hda_codec *codec, hda_nid_t nid, |
| 657 | int direct, unsigned int verb, |
| 658 | unsigned int para) |
| 659 | { |
| 660 | struct azx *chip = codec->bus->private_data; |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 661 | u32 val; |
| 662 | |
| 663 | val = (u32)(codec->addr & 0x0f) << 28; |
| 664 | val |= (u32)direct << 27; |
| 665 | val |= (u32)nid << 20; |
| 666 | val |= verb << 8; |
| 667 | val |= para; |
| 668 | chip->last_cmd = val; |
| 669 | |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 670 | if (chip->single_cmd) |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 671 | return azx_single_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 672 | else |
Takashi Iwai | 43bbb6c | 2007-07-06 20:22:05 +0200 | [diff] [blame] | 673 | return azx_corb_send_cmd(codec, val); |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 674 | } |
| 675 | |
| 676 | /* get a response */ |
| 677 | static unsigned int azx_get_response(struct hda_codec *codec) |
| 678 | { |
| 679 | struct azx *chip = codec->bus->private_data; |
| 680 | if (chip->single_cmd) |
| 681 | return azx_single_get_response(codec); |
| 682 | else |
| 683 | return azx_rirb_get_response(codec); |
| 684 | } |
| 685 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 686 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 687 | static void azx_power_notify(struct hda_codec *codec); |
| 688 | #endif |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 689 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 690 | /* reset codec link */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 691 | static int azx_reset(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | { |
| 693 | int count; |
| 694 | |
Danny Tholen | e8a7f13 | 2007-09-11 21:41:56 +0200 | [diff] [blame] | 695 | /* clear STATESTS */ |
| 696 | azx_writeb(chip, STATESTS, STATESTS_INT_MASK); |
| 697 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | /* reset controller */ |
| 699 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) & ~ICH6_GCTL_RESET); |
| 700 | |
| 701 | count = 50; |
| 702 | while (azx_readb(chip, GCTL) && --count) |
| 703 | msleep(1); |
| 704 | |
| 705 | /* delay for >= 100us for codec PLL to settle per spec |
| 706 | * Rev 0.9 section 5.5.1 |
| 707 | */ |
| 708 | msleep(1); |
| 709 | |
| 710 | /* Bring controller out of reset */ |
| 711 | azx_writeb(chip, GCTL, azx_readb(chip, GCTL) | ICH6_GCTL_RESET); |
| 712 | |
| 713 | count = 50; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 714 | while (!azx_readb(chip, GCTL) && --count) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | msleep(1); |
| 716 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 717 | /* Brent Chartrand said to wait >= 540us for codecs to initialize */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | msleep(1); |
| 719 | |
| 720 | /* check to see if controller is ready */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 721 | if (!azx_readb(chip, GCTL)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | snd_printd("azx_reset: controller not ready!\n"); |
| 723 | return -EBUSY; |
| 724 | } |
| 725 | |
Matt | 41e2fce | 2005-07-04 17:49:55 +0200 | [diff] [blame] | 726 | /* Accept unsolicited responses */ |
| 727 | azx_writel(chip, GCTL, azx_readl(chip, GCTL) | ICH6_GCTL_UREN); |
| 728 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 729 | /* detect codecs */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 730 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 731 | chip->codec_mask = azx_readw(chip, STATESTS); |
| 732 | snd_printdd("codec_mask = 0x%x\n", chip->codec_mask); |
| 733 | } |
| 734 | |
| 735 | return 0; |
| 736 | } |
| 737 | |
| 738 | |
| 739 | /* |
| 740 | * Lowlevel interface |
| 741 | */ |
| 742 | |
| 743 | /* enable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 744 | static void azx_int_enable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | { |
| 746 | /* enable controller CIE and GIE */ |
| 747 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) | |
| 748 | ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN); |
| 749 | } |
| 750 | |
| 751 | /* disable interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 752 | static void azx_int_disable(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | { |
| 754 | int i; |
| 755 | |
| 756 | /* disable interrupts in stream descriptor */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 757 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 758 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | azx_sd_writeb(azx_dev, SD_CTL, |
| 760 | azx_sd_readb(azx_dev, SD_CTL) & ~SD_INT_MASK); |
| 761 | } |
| 762 | |
| 763 | /* disable SIE for all streams */ |
| 764 | azx_writeb(chip, INTCTL, 0); |
| 765 | |
| 766 | /* disable controller CIE and GIE */ |
| 767 | azx_writel(chip, INTCTL, azx_readl(chip, INTCTL) & |
| 768 | ~(ICH6_INT_CTRL_EN | ICH6_INT_GLOBAL_EN)); |
| 769 | } |
| 770 | |
| 771 | /* clear interrupts */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 772 | static void azx_int_clear(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 773 | { |
| 774 | int i; |
| 775 | |
| 776 | /* clear stream status */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 777 | for (i = 0; i < chip->num_streams; i++) { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 778 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 779 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
| 780 | } |
| 781 | |
| 782 | /* clear STATESTS */ |
| 783 | azx_writeb(chip, STATESTS, STATESTS_INT_MASK); |
| 784 | |
| 785 | /* clear rirb status */ |
| 786 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 787 | |
| 788 | /* clear int status */ |
| 789 | azx_writel(chip, INTSTS, ICH6_INT_CTRL_EN | ICH6_INT_ALL_STREAM); |
| 790 | } |
| 791 | |
| 792 | /* start a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 793 | static void azx_stream_start(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | { |
| 795 | /* enable SIE */ |
| 796 | azx_writeb(chip, INTCTL, |
| 797 | azx_readb(chip, INTCTL) | (1 << azx_dev->index)); |
| 798 | /* set DMA start and interrupt mask */ |
| 799 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 800 | SD_CTL_DMA_START | SD_INT_MASK); |
| 801 | } |
| 802 | |
| 803 | /* stop a stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 804 | static void azx_stream_stop(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 805 | { |
| 806 | /* stop DMA */ |
| 807 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 808 | ~(SD_CTL_DMA_START | SD_INT_MASK)); |
| 809 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */ |
| 810 | /* disable SIE */ |
| 811 | azx_writeb(chip, INTCTL, |
| 812 | azx_readb(chip, INTCTL) & ~(1 << azx_dev->index)); |
| 813 | } |
| 814 | |
| 815 | |
| 816 | /* |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 817 | * reset and start the controller registers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 818 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 819 | static void azx_init_chip(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 820 | { |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 821 | if (chip->initialized) |
| 822 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 823 | |
| 824 | /* reset controller */ |
| 825 | azx_reset(chip); |
| 826 | |
| 827 | /* initialize interrupts */ |
| 828 | azx_int_clear(chip); |
| 829 | azx_int_enable(chip); |
| 830 | |
| 831 | /* initialize the codec command I/O */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 832 | if (!chip->single_cmd) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 833 | azx_init_cmd_io(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 834 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 835 | /* program the position buffer */ |
| 836 | azx_writel(chip, DPLBASE, (u32)chip->posbuf.addr); |
| 837 | azx_writel(chip, DPUBASE, upper_32bit(chip->posbuf.addr)); |
Frederick Li | f5d40b3 | 2005-05-12 14:55:20 +0200 | [diff] [blame] | 838 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 839 | chip->initialized = 1; |
| 840 | } |
| 841 | |
| 842 | /* |
| 843 | * initialize the PCI registers |
| 844 | */ |
| 845 | /* update bits in a PCI register byte */ |
| 846 | static void update_pci_byte(struct pci_dev *pci, unsigned int reg, |
| 847 | unsigned char mask, unsigned char val) |
| 848 | { |
| 849 | unsigned char data; |
| 850 | |
| 851 | pci_read_config_byte(pci, reg, &data); |
| 852 | data &= ~mask; |
| 853 | data |= (val & mask); |
| 854 | pci_write_config_byte(pci, reg, data); |
| 855 | } |
| 856 | |
| 857 | static void azx_init_pci(struct azx *chip) |
| 858 | { |
| 859 | /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44) |
| 860 | * TCSEL == Traffic Class Select Register, which sets PCI express QOS |
| 861 | * Ensuring these bits are 0 clears playback static on some HD Audio |
| 862 | * codecs |
| 863 | */ |
| 864 | update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0); |
| 865 | |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 866 | switch (chip->driver_type) { |
| 867 | case AZX_DRIVER_ATI: |
| 868 | /* For ATI SB450 azalia HD audio, we need to enable snoop */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 869 | update_pci_byte(chip->pci, |
| 870 | ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, |
| 871 | 0x07, ATI_SB450_HDAUDIO_ENABLE_SNOOP); |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 872 | break; |
| 873 | case AZX_DRIVER_NVIDIA: |
| 874 | /* For NVIDIA HDA, enable snoop */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 875 | update_pci_byte(chip->pci, |
| 876 | NVIDIA_HDA_TRANSREG_ADDR, |
| 877 | 0x0f, NVIDIA_HDA_ENABLE_COHBITS); |
Vinod G | da3fca2 | 2005-09-13 18:49:12 +0200 | [diff] [blame] | 878 | break; |
| 879 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | } |
| 881 | |
| 882 | |
| 883 | /* |
| 884 | * interrupt handler |
| 885 | */ |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 886 | static irqreturn_t azx_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 887 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 888 | struct azx *chip = dev_id; |
| 889 | struct azx_dev *azx_dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | u32 status; |
| 891 | int i; |
| 892 | |
| 893 | spin_lock(&chip->reg_lock); |
| 894 | |
| 895 | status = azx_readl(chip, INTSTS); |
| 896 | if (status == 0) { |
| 897 | spin_unlock(&chip->reg_lock); |
| 898 | return IRQ_NONE; |
| 899 | } |
| 900 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 901 | for (i = 0; i < chip->num_streams; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 902 | azx_dev = &chip->azx_dev[i]; |
| 903 | if (status & azx_dev->sd_int_sta_mask) { |
| 904 | azx_sd_writeb(azx_dev, SD_STS, SD_INT_MASK); |
| 905 | if (azx_dev->substream && azx_dev->running) { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 906 | azx_dev->period_intr++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 907 | spin_unlock(&chip->reg_lock); |
| 908 | snd_pcm_period_elapsed(azx_dev->substream); |
| 909 | spin_lock(&chip->reg_lock); |
| 910 | } |
| 911 | } |
| 912 | } |
| 913 | |
| 914 | /* clear rirb int */ |
| 915 | status = azx_readb(chip, RIRBSTS); |
| 916 | if (status & RIRB_INT_MASK) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 917 | if (!chip->single_cmd && (status & RIRB_INT_RESPONSE)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 918 | azx_update_rirb(chip); |
| 919 | azx_writeb(chip, RIRBSTS, RIRB_INT_MASK); |
| 920 | } |
| 921 | |
| 922 | #if 0 |
| 923 | /* clear state status int */ |
| 924 | if (azx_readb(chip, STATESTS) & 0x04) |
| 925 | azx_writeb(chip, STATESTS, 0x04); |
| 926 | #endif |
| 927 | spin_unlock(&chip->reg_lock); |
| 928 | |
| 929 | return IRQ_HANDLED; |
| 930 | } |
| 931 | |
| 932 | |
| 933 | /* |
| 934 | * set up BDL entries |
| 935 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 936 | static void azx_setup_periods(struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | { |
| 938 | u32 *bdl = azx_dev->bdl; |
| 939 | dma_addr_t dma_addr = azx_dev->substream->runtime->dma_addr; |
| 940 | int idx; |
| 941 | |
| 942 | /* reset BDL address */ |
| 943 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 944 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 945 | |
| 946 | /* program the initial BDL entries */ |
| 947 | for (idx = 0; idx < azx_dev->frags; idx++) { |
| 948 | unsigned int off = idx << 2; /* 4 dword step */ |
| 949 | dma_addr_t addr = dma_addr + idx * azx_dev->fragsize; |
| 950 | /* program the address field of the BDL entry */ |
| 951 | bdl[off] = cpu_to_le32((u32)addr); |
| 952 | bdl[off+1] = cpu_to_le32(upper_32bit(addr)); |
| 953 | |
| 954 | /* program the size field of the BDL entry */ |
| 955 | bdl[off+2] = cpu_to_le32(azx_dev->fragsize); |
| 956 | |
| 957 | /* program the IOC to enable interrupt when buffer completes */ |
| 958 | bdl[off+3] = cpu_to_le32(0x01); |
| 959 | } |
| 960 | } |
| 961 | |
| 962 | /* |
| 963 | * set up the SD for streaming |
| 964 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 965 | static int azx_setup_controller(struct azx *chip, struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | { |
| 967 | unsigned char val; |
| 968 | int timeout; |
| 969 | |
| 970 | /* make sure the run bit is zero for SD */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 971 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) & |
| 972 | ~SD_CTL_DMA_START); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | /* reset stream */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 974 | azx_sd_writeb(azx_dev, SD_CTL, azx_sd_readb(azx_dev, SD_CTL) | |
| 975 | SD_CTL_STREAM_RESET); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 976 | udelay(3); |
| 977 | timeout = 300; |
| 978 | while (!((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 979 | --timeout) |
| 980 | ; |
| 981 | val &= ~SD_CTL_STREAM_RESET; |
| 982 | azx_sd_writeb(azx_dev, SD_CTL, val); |
| 983 | udelay(3); |
| 984 | |
| 985 | timeout = 300; |
| 986 | /* waiting for hardware to report that the stream is out of reset */ |
| 987 | while (((val = azx_sd_readb(azx_dev, SD_CTL)) & SD_CTL_STREAM_RESET) && |
| 988 | --timeout) |
| 989 | ; |
| 990 | |
| 991 | /* program the stream_tag */ |
| 992 | azx_sd_writel(azx_dev, SD_CTL, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 993 | (azx_sd_readl(azx_dev, SD_CTL) & ~SD_CTL_STREAM_TAG_MASK)| |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 994 | (azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT)); |
| 995 | |
| 996 | /* program the length of samples in cyclic buffer */ |
| 997 | azx_sd_writel(azx_dev, SD_CBL, azx_dev->bufsize); |
| 998 | |
| 999 | /* program the stream format */ |
| 1000 | /* this value needs to be the same as the one programmed */ |
| 1001 | azx_sd_writew(azx_dev, SD_FORMAT, azx_dev->format_val); |
| 1002 | |
| 1003 | /* program the stream LVI (last valid index) of the BDL */ |
| 1004 | azx_sd_writew(azx_dev, SD_LVI, azx_dev->frags - 1); |
| 1005 | |
| 1006 | /* program the BDL address */ |
| 1007 | /* lower BDL address */ |
| 1008 | azx_sd_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl_addr); |
| 1009 | /* upper BDL address */ |
| 1010 | azx_sd_writel(azx_dev, SD_BDLPU, upper_32bit(azx_dev->bdl_addr)); |
| 1011 | |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1012 | /* enable the position buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1013 | if (!(azx_readl(chip, DPLBASE) & ICH6_DPLBASE_ENABLE)) |
| 1014 | azx_writel(chip, DPLBASE, |
| 1015 | (u32)chip->posbuf.addr |ICH6_DPLBASE_ENABLE); |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1016 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1017 | /* set the interrupt enable bits in the descriptor control register */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1018 | azx_sd_writel(azx_dev, SD_CTL, |
| 1019 | azx_sd_readl(azx_dev, SD_CTL) | SD_INT_MASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1020 | |
| 1021 | return 0; |
| 1022 | } |
| 1023 | |
| 1024 | |
| 1025 | /* |
| 1026 | * Codec initialization |
| 1027 | */ |
| 1028 | |
Takashi Iwai | a9995a3 | 2007-03-12 21:30:46 +0100 | [diff] [blame] | 1029 | static unsigned int azx_max_codecs[] __devinitdata = { |
| 1030 | [AZX_DRIVER_ICH] = 3, |
| 1031 | [AZX_DRIVER_ATI] = 4, |
| 1032 | [AZX_DRIVER_ATIHDMI] = 4, |
| 1033 | [AZX_DRIVER_VIA] = 3, /* FIXME: correct? */ |
| 1034 | [AZX_DRIVER_SIS] = 3, /* FIXME: correct? */ |
| 1035 | [AZX_DRIVER_ULI] = 3, /* FIXME: correct? */ |
| 1036 | [AZX_DRIVER_NVIDIA] = 3, /* FIXME: correct? */ |
| 1037 | }; |
| 1038 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1039 | static int __devinit azx_codec_create(struct azx *chip, const char *model, |
| 1040 | unsigned int codec_probe_mask) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1041 | { |
| 1042 | struct hda_bus_template bus_temp; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1043 | int c, codecs, audio_codecs, err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1044 | |
| 1045 | memset(&bus_temp, 0, sizeof(bus_temp)); |
| 1046 | bus_temp.private_data = chip; |
| 1047 | bus_temp.modelname = model; |
| 1048 | bus_temp.pci = chip->pci; |
Takashi Iwai | 111d3af | 2006-02-16 18:17:58 +0100 | [diff] [blame] | 1049 | bus_temp.ops.command = azx_send_cmd; |
| 1050 | bus_temp.ops.get_response = azx_get_response; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1051 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 1052 | bus_temp.ops.pm_notify = azx_power_notify; |
| 1053 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1054 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1055 | err = snd_hda_bus_new(chip->card, &bus_temp, &chip->bus); |
| 1056 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | return err; |
| 1058 | |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1059 | codecs = audio_codecs = 0; |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1060 | for (c = 0; c < AZX_MAX_CODECS; c++) { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1061 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1062 | struct hda_codec *codec; |
| 1063 | err = snd_hda_codec_new(chip->bus, c, &codec); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | if (err < 0) |
| 1065 | continue; |
| 1066 | codecs++; |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1067 | if (codec->afg) |
| 1068 | audio_codecs++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1069 | } |
| 1070 | } |
Takashi Iwai | bccad14 | 2007-04-24 12:23:53 +0200 | [diff] [blame] | 1071 | if (!audio_codecs) { |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1072 | /* probe additional slots if no codec is found */ |
| 1073 | for (; c < azx_max_codecs[chip->driver_type]; c++) { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1074 | if ((chip->codec_mask & (1 << c)) & codec_probe_mask) { |
Takashi Iwai | 19a982b | 2007-03-21 15:14:35 +0100 | [diff] [blame] | 1075 | err = snd_hda_codec_new(chip->bus, c, NULL); |
| 1076 | if (err < 0) |
| 1077 | continue; |
| 1078 | codecs++; |
| 1079 | } |
| 1080 | } |
| 1081 | } |
| 1082 | if (!codecs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1083 | snd_printk(KERN_ERR SFX "no codecs initialized\n"); |
| 1084 | return -ENXIO; |
| 1085 | } |
| 1086 | |
| 1087 | return 0; |
| 1088 | } |
| 1089 | |
| 1090 | |
| 1091 | /* |
| 1092 | * PCM support |
| 1093 | */ |
| 1094 | |
| 1095 | /* assign a stream for the PCM */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1096 | static inline struct azx_dev *azx_assign_device(struct azx *chip, int stream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1097 | { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1098 | int dev, i, nums; |
| 1099 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 1100 | dev = chip->playback_index_offset; |
| 1101 | nums = chip->playback_streams; |
| 1102 | } else { |
| 1103 | dev = chip->capture_index_offset; |
| 1104 | nums = chip->capture_streams; |
| 1105 | } |
| 1106 | for (i = 0; i < nums; i++, dev++) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1107 | if (!chip->azx_dev[dev].opened) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1108 | chip->azx_dev[dev].opened = 1; |
| 1109 | return &chip->azx_dev[dev]; |
| 1110 | } |
| 1111 | return NULL; |
| 1112 | } |
| 1113 | |
| 1114 | /* release the assigned stream */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1115 | static inline void azx_release_device(struct azx_dev *azx_dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1116 | { |
| 1117 | azx_dev->opened = 0; |
| 1118 | } |
| 1119 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1120 | static struct snd_pcm_hardware azx_pcm_hw = { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1121 | .info = (SNDRV_PCM_INFO_MMAP | |
| 1122 | SNDRV_PCM_INFO_INTERLEAVED | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1123 | SNDRV_PCM_INFO_BLOCK_TRANSFER | |
| 1124 | SNDRV_PCM_INFO_MMAP_VALID | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1125 | /* No full-resume yet implemented */ |
| 1126 | /* SNDRV_PCM_INFO_RESUME |*/ |
| 1127 | SNDRV_PCM_INFO_PAUSE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1128 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
| 1129 | .rates = SNDRV_PCM_RATE_48000, |
| 1130 | .rate_min = 48000, |
| 1131 | .rate_max = 48000, |
| 1132 | .channels_min = 2, |
| 1133 | .channels_max = 2, |
| 1134 | .buffer_bytes_max = AZX_MAX_BUF_SIZE, |
| 1135 | .period_bytes_min = 128, |
| 1136 | .period_bytes_max = AZX_MAX_BUF_SIZE / 2, |
| 1137 | .periods_min = 2, |
| 1138 | .periods_max = AZX_MAX_FRAG, |
| 1139 | .fifo_size = 0, |
| 1140 | }; |
| 1141 | |
| 1142 | struct azx_pcm { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1143 | struct azx *chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1144 | struct hda_codec *codec; |
| 1145 | struct hda_pcm_stream *hinfo[2]; |
| 1146 | }; |
| 1147 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1148 | static int azx_pcm_open(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1149 | { |
| 1150 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1151 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1152 | struct azx *chip = apcm->chip; |
| 1153 | struct azx_dev *azx_dev; |
| 1154 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1155 | unsigned long flags; |
| 1156 | int err; |
| 1157 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1158 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1159 | azx_dev = azx_assign_device(chip, substream->stream); |
| 1160 | if (azx_dev == NULL) { |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1161 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1162 | return -EBUSY; |
| 1163 | } |
| 1164 | runtime->hw = azx_pcm_hw; |
| 1165 | runtime->hw.channels_min = hinfo->channels_min; |
| 1166 | runtime->hw.channels_max = hinfo->channels_max; |
| 1167 | runtime->hw.formats = hinfo->formats; |
| 1168 | runtime->hw.rates = hinfo->rates; |
| 1169 | snd_pcm_limit_hw_rates(runtime); |
| 1170 | snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); |
Joachim Deguara | 5f1545b | 2007-03-16 15:01:36 +0100 | [diff] [blame] | 1171 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, |
| 1172 | 128); |
| 1173 | snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, |
| 1174 | 128); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1175 | snd_hda_power_up(apcm->codec); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1176 | err = hinfo->ops.open(hinfo, apcm->codec, substream); |
| 1177 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1178 | azx_release_device(azx_dev); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1179 | snd_hda_power_down(apcm->codec); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1180 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1181 | return err; |
| 1182 | } |
| 1183 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1184 | azx_dev->substream = substream; |
| 1185 | azx_dev->running = 0; |
| 1186 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1187 | |
| 1188 | runtime->private_data = azx_dev; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1189 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1190 | return 0; |
| 1191 | } |
| 1192 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1193 | static int azx_pcm_close(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1194 | { |
| 1195 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
| 1196 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1197 | struct azx *chip = apcm->chip; |
| 1198 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1199 | unsigned long flags; |
| 1200 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1201 | mutex_lock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1202 | spin_lock_irqsave(&chip->reg_lock, flags); |
| 1203 | azx_dev->substream = NULL; |
| 1204 | azx_dev->running = 0; |
| 1205 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
| 1206 | azx_release_device(azx_dev); |
| 1207 | hinfo->ops.close(hinfo, apcm->codec, substream); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1208 | snd_hda_power_down(apcm->codec); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1209 | mutex_unlock(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1210 | return 0; |
| 1211 | } |
| 1212 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1213 | static int azx_pcm_hw_params(struct snd_pcm_substream *substream, |
| 1214 | struct snd_pcm_hw_params *hw_params) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1215 | { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1216 | return snd_pcm_lib_malloc_pages(substream, |
| 1217 | params_buffer_bytes(hw_params)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1218 | } |
| 1219 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1220 | static int azx_pcm_hw_free(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1221 | { |
| 1222 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1223 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1224 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
| 1225 | |
| 1226 | /* reset BDL address */ |
| 1227 | azx_sd_writel(azx_dev, SD_BDLPL, 0); |
| 1228 | azx_sd_writel(azx_dev, SD_BDLPU, 0); |
| 1229 | azx_sd_writel(azx_dev, SD_CTL, 0); |
| 1230 | |
| 1231 | hinfo->ops.cleanup(hinfo, apcm->codec, substream); |
| 1232 | |
| 1233 | return snd_pcm_lib_free_pages(substream); |
| 1234 | } |
| 1235 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1236 | static int azx_pcm_prepare(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | { |
| 1238 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1239 | struct azx *chip = apcm->chip; |
| 1240 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1241 | struct hda_pcm_stream *hinfo = apcm->hinfo[substream->stream]; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1242 | struct snd_pcm_runtime *runtime = substream->runtime; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | |
| 1244 | azx_dev->bufsize = snd_pcm_lib_buffer_bytes(substream); |
| 1245 | azx_dev->fragsize = snd_pcm_lib_period_bytes(substream); |
| 1246 | azx_dev->frags = azx_dev->bufsize / azx_dev->fragsize; |
| 1247 | azx_dev->format_val = snd_hda_calc_stream_format(runtime->rate, |
| 1248 | runtime->channels, |
| 1249 | runtime->format, |
| 1250 | hinfo->maxbps); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1251 | if (!azx_dev->format_val) { |
| 1252 | snd_printk(KERN_ERR SFX |
| 1253 | "invalid format_val, rate=%d, ch=%d, format=%d\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1254 | runtime->rate, runtime->channels, runtime->format); |
| 1255 | return -EINVAL; |
| 1256 | } |
| 1257 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1258 | snd_printdd("azx_pcm_prepare: bufsize=0x%x, fragsize=0x%x, " |
| 1259 | "format=0x%x\n", |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1260 | azx_dev->bufsize, azx_dev->fragsize, azx_dev->format_val); |
| 1261 | azx_setup_periods(azx_dev); |
| 1262 | azx_setup_controller(chip, azx_dev); |
| 1263 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 1264 | azx_dev->fifo_size = azx_sd_readw(azx_dev, SD_FIFOSIZE) + 1; |
| 1265 | else |
| 1266 | azx_dev->fifo_size = 0; |
| 1267 | |
| 1268 | return hinfo->ops.prepare(hinfo, apcm->codec, azx_dev->stream_tag, |
| 1269 | azx_dev->format_val, substream); |
| 1270 | } |
| 1271 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1272 | static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1273 | { |
| 1274 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1275 | struct azx_dev *azx_dev = get_azx_dev(substream); |
| 1276 | struct azx *chip = apcm->chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1277 | int err = 0; |
| 1278 | |
| 1279 | spin_lock(&chip->reg_lock); |
| 1280 | switch (cmd) { |
| 1281 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 1282 | case SNDRV_PCM_TRIGGER_RESUME: |
| 1283 | case SNDRV_PCM_TRIGGER_START: |
| 1284 | azx_stream_start(chip, azx_dev); |
| 1285 | azx_dev->running = 1; |
| 1286 | break; |
| 1287 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
Jaroslav Kysela | 4712319 | 2005-08-15 20:53:07 +0200 | [diff] [blame] | 1288 | case SNDRV_PCM_TRIGGER_SUSPEND: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1289 | case SNDRV_PCM_TRIGGER_STOP: |
| 1290 | azx_stream_stop(chip, azx_dev); |
| 1291 | azx_dev->running = 0; |
| 1292 | break; |
| 1293 | default: |
| 1294 | err = -EINVAL; |
| 1295 | } |
| 1296 | spin_unlock(&chip->reg_lock); |
| 1297 | if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH || |
Jaroslav Kysela | 4712319 | 2005-08-15 20:53:07 +0200 | [diff] [blame] | 1298 | cmd == SNDRV_PCM_TRIGGER_SUSPEND || |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | cmd == SNDRV_PCM_TRIGGER_STOP) { |
| 1300 | int timeout = 5000; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1301 | while ((azx_sd_readb(azx_dev, SD_CTL) & SD_CTL_DMA_START) && |
| 1302 | --timeout) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1303 | ; |
| 1304 | } |
| 1305 | return err; |
| 1306 | } |
| 1307 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1308 | static snd_pcm_uframes_t azx_pcm_pointer(struct snd_pcm_substream *substream) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1309 | { |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1310 | struct azx_pcm *apcm = snd_pcm_substream_chip(substream); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1311 | struct azx *chip = apcm->chip; |
| 1312 | struct azx_dev *azx_dev = get_azx_dev(substream); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1313 | unsigned int pos; |
| 1314 | |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1315 | if (chip->position_fix == POS_FIX_POSBUF || |
| 1316 | chip->position_fix == POS_FIX_AUTO) { |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1317 | /* use the position buffer */ |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1318 | pos = le32_to_cpu(*azx_dev->posbuf); |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1319 | if (chip->position_fix == POS_FIX_AUTO && |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1320 | azx_dev->period_intr == 1 && !pos) { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1321 | printk(KERN_WARNING |
| 1322 | "hda-intel: Invalid position buffer, " |
| 1323 | "using LPIB read method instead.\n"); |
| 1324 | chip->position_fix = POS_FIX_NONE; |
| 1325 | goto read_lpib; |
| 1326 | } |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1327 | } else { |
Takashi Iwai | 1a56f8d | 2006-02-16 19:51:10 +0100 | [diff] [blame] | 1328 | read_lpib: |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1329 | /* read LPIB */ |
| 1330 | pos = azx_sd_readl(azx_dev, SD_LPIB); |
| 1331 | if (chip->position_fix == POS_FIX_FIFO) |
| 1332 | pos += azx_dev->fifo_size; |
| 1333 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1334 | if (pos >= azx_dev->bufsize) |
| 1335 | pos = 0; |
| 1336 | return bytes_to_frames(substream->runtime, pos); |
| 1337 | } |
| 1338 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1339 | static struct snd_pcm_ops azx_pcm_ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1340 | .open = azx_pcm_open, |
| 1341 | .close = azx_pcm_close, |
| 1342 | .ioctl = snd_pcm_lib_ioctl, |
| 1343 | .hw_params = azx_pcm_hw_params, |
| 1344 | .hw_free = azx_pcm_hw_free, |
| 1345 | .prepare = azx_pcm_prepare, |
| 1346 | .trigger = azx_pcm_trigger, |
| 1347 | .pointer = azx_pcm_pointer, |
| 1348 | }; |
| 1349 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1350 | static void azx_pcm_free(struct snd_pcm *pcm) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1351 | { |
| 1352 | kfree(pcm->private_data); |
| 1353 | } |
| 1354 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1355 | static int __devinit create_codec_pcm(struct azx *chip, struct hda_codec *codec, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1356 | struct hda_pcm *cpcm, int pcm_dev) |
| 1357 | { |
| 1358 | int err; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1359 | struct snd_pcm *pcm; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1360 | struct azx_pcm *apcm; |
| 1361 | |
Takashi Iwai | e08a007 | 2006-09-07 17:52:14 +0200 | [diff] [blame] | 1362 | /* if no substreams are defined for both playback and capture, |
| 1363 | * it's just a placeholder. ignore it. |
| 1364 | */ |
| 1365 | if (!cpcm->stream[0].substreams && !cpcm->stream[1].substreams) |
| 1366 | return 0; |
| 1367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1368 | snd_assert(cpcm->name, return -EINVAL); |
| 1369 | |
| 1370 | err = snd_pcm_new(chip->card, cpcm->name, pcm_dev, |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1371 | cpcm->stream[0].substreams, |
| 1372 | cpcm->stream[1].substreams, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1373 | &pcm); |
| 1374 | if (err < 0) |
| 1375 | return err; |
| 1376 | strcpy(pcm->name, cpcm->name); |
| 1377 | apcm = kmalloc(sizeof(*apcm), GFP_KERNEL); |
| 1378 | if (apcm == NULL) |
| 1379 | return -ENOMEM; |
| 1380 | apcm->chip = chip; |
| 1381 | apcm->codec = codec; |
| 1382 | apcm->hinfo[0] = &cpcm->stream[0]; |
| 1383 | apcm->hinfo[1] = &cpcm->stream[1]; |
| 1384 | pcm->private_data = apcm; |
| 1385 | pcm->private_free = azx_pcm_free; |
| 1386 | if (cpcm->stream[0].substreams) |
| 1387 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &azx_pcm_ops); |
| 1388 | if (cpcm->stream[1].substreams) |
| 1389 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &azx_pcm_ops); |
| 1390 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, |
| 1391 | snd_dma_pci_data(chip->pci), |
Jaroslav Kysela | b66b3cf | 2006-10-06 09:34:20 +0200 | [diff] [blame] | 1392 | 1024 * 64, 1024 * 1024); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1393 | chip->pcm[pcm_dev] = pcm; |
Takashi Iwai | e08a007 | 2006-09-07 17:52:14 +0200 | [diff] [blame] | 1394 | if (chip->pcm_devs < pcm_dev + 1) |
| 1395 | chip->pcm_devs = pcm_dev + 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1396 | |
| 1397 | return 0; |
| 1398 | } |
| 1399 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1400 | static int __devinit azx_pcm_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1401 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1402 | struct hda_codec *codec; |
| 1403 | int c, err; |
| 1404 | int pcm_dev; |
| 1405 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1406 | err = snd_hda_build_pcms(chip->bus); |
| 1407 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1408 | return err; |
| 1409 | |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1410 | /* create audio PCMs */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1411 | pcm_dev = 0; |
Matthias Kaehlcke | 33206e8 | 2007-09-17 14:40:04 +0200 | [diff] [blame] | 1412 | list_for_each_entry(codec, &chip->bus->codec_list, list) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1413 | for (c = 0; c < codec->num_pcms; c++) { |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1414 | if (codec->pcm_info[c].is_modem) |
| 1415 | continue; /* create later */ |
| 1416 | if (pcm_dev >= AZX_MAX_AUDIO_PCMS) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1417 | snd_printk(KERN_ERR SFX |
| 1418 | "Too many audio PCMs\n"); |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1419 | return -EINVAL; |
| 1420 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1421 | err = create_codec_pcm(chip, codec, |
| 1422 | &codec->pcm_info[c], pcm_dev); |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1423 | if (err < 0) |
| 1424 | return err; |
| 1425 | pcm_dev++; |
| 1426 | } |
| 1427 | } |
| 1428 | |
| 1429 | /* create modem PCMs */ |
| 1430 | pcm_dev = AZX_MAX_AUDIO_PCMS; |
Matthias Kaehlcke | 33206e8 | 2007-09-17 14:40:04 +0200 | [diff] [blame] | 1431 | list_for_each_entry(codec, &chip->bus->codec_list, list) { |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1432 | for (c = 0; c < codec->num_pcms; c++) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1433 | if (!codec->pcm_info[c].is_modem) |
Takashi Iwai | ec9e1c5 | 2005-09-07 13:29:22 +0200 | [diff] [blame] | 1434 | continue; /* already created */ |
Takashi Iwai | a28f1cd | 2005-09-07 15:26:56 +0200 | [diff] [blame] | 1435 | if (pcm_dev >= AZX_MAX_PCMS) { |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1436 | snd_printk(KERN_ERR SFX |
| 1437 | "Too many modem PCMs\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1438 | return -EINVAL; |
| 1439 | } |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1440 | err = create_codec_pcm(chip, codec, |
| 1441 | &codec->pcm_info[c], pcm_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1442 | if (err < 0) |
| 1443 | return err; |
Sasha Khapyorsky | 6632d19 | 2005-09-29 11:48:17 +0200 | [diff] [blame] | 1444 | chip->pcm[pcm_dev]->dev_class = SNDRV_PCM_CLASS_MODEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1445 | pcm_dev++; |
| 1446 | } |
| 1447 | } |
| 1448 | return 0; |
| 1449 | } |
| 1450 | |
| 1451 | /* |
| 1452 | * mixer creation - all stuff is implemented in hda module |
| 1453 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1454 | static int __devinit azx_mixer_create(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1455 | { |
| 1456 | return snd_hda_build_controls(chip->bus); |
| 1457 | } |
| 1458 | |
| 1459 | |
| 1460 | /* |
| 1461 | * initialize SD streams |
| 1462 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1463 | static int __devinit azx_init_stream(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1464 | { |
| 1465 | int i; |
| 1466 | |
| 1467 | /* initialize each stream (aka device) |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1468 | * assign the starting bdl address to each stream (device) |
| 1469 | * and initialize |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1470 | */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1471 | for (i = 0; i < chip->num_streams; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1472 | unsigned int off = sizeof(u32) * (i * AZX_MAX_FRAG * 4); |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1473 | struct azx_dev *azx_dev = &chip->azx_dev[i]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1474 | azx_dev->bdl = (u32 *)(chip->bdl.area + off); |
| 1475 | azx_dev->bdl_addr = chip->bdl.addr + off; |
Takashi Iwai | 929861c | 2006-08-31 16:55:40 +0200 | [diff] [blame] | 1476 | azx_dev->posbuf = (u32 __iomem *)(chip->posbuf.area + i * 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1477 | /* offset: SDI0=0x80, SDI1=0xa0, ... SDO3=0x160 */ |
| 1478 | azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80); |
| 1479 | /* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */ |
| 1480 | azx_dev->sd_int_sta_mask = 1 << i; |
| 1481 | /* stream tag: must be non-zero and unique */ |
| 1482 | azx_dev->index = i; |
| 1483 | azx_dev->stream_tag = i + 1; |
| 1484 | } |
| 1485 | |
| 1486 | return 0; |
| 1487 | } |
| 1488 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1489 | static int azx_acquire_irq(struct azx *chip, int do_disconnect) |
| 1490 | { |
Takashi Iwai | 437a5a4 | 2006-11-21 12:14:23 +0100 | [diff] [blame] | 1491 | if (request_irq(chip->pci->irq, azx_interrupt, |
| 1492 | chip->msi ? 0 : IRQF_SHARED, |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1493 | "HDA Intel", chip)) { |
| 1494 | printk(KERN_ERR "hda-intel: unable to grab IRQ %d, " |
| 1495 | "disabling device\n", chip->pci->irq); |
| 1496 | if (do_disconnect) |
| 1497 | snd_card_disconnect(chip->card); |
| 1498 | return -1; |
| 1499 | } |
| 1500 | chip->irq = chip->pci->irq; |
Takashi Iwai | 69e1341 | 2006-11-21 12:10:55 +0100 | [diff] [blame] | 1501 | pci_intx(chip->pci, !chip->msi); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1502 | return 0; |
| 1503 | } |
| 1504 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1505 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1506 | static void azx_stop_chip(struct azx *chip) |
| 1507 | { |
Takashi Iwai | 95e99fd | 2007-08-13 15:29:04 +0200 | [diff] [blame] | 1508 | if (!chip->initialized) |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1509 | return; |
| 1510 | |
| 1511 | /* disable interrupts */ |
| 1512 | azx_int_disable(chip); |
| 1513 | azx_int_clear(chip); |
| 1514 | |
| 1515 | /* disable CORB/RIRB */ |
| 1516 | azx_free_cmd_io(chip); |
| 1517 | |
| 1518 | /* disable position buffer */ |
| 1519 | azx_writel(chip, DPLBASE, 0); |
| 1520 | azx_writel(chip, DPUBASE, 0); |
| 1521 | |
| 1522 | chip->initialized = 0; |
| 1523 | } |
| 1524 | |
| 1525 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 1526 | /* power-up/down the controller */ |
| 1527 | static void azx_power_notify(struct hda_codec *codec) |
| 1528 | { |
| 1529 | struct azx *chip = codec->bus->private_data; |
| 1530 | struct hda_codec *c; |
| 1531 | int power_on = 0; |
| 1532 | |
| 1533 | list_for_each_entry(c, &codec->bus->codec_list, list) { |
| 1534 | if (c->power_on) { |
| 1535 | power_on = 1; |
| 1536 | break; |
| 1537 | } |
| 1538 | } |
| 1539 | if (power_on) |
| 1540 | azx_init_chip(chip); |
Takashi Iwai | dee1b66 | 2007-08-13 16:10:30 +0200 | [diff] [blame] | 1541 | else if (chip->running && power_save_controller) |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1542 | azx_stop_chip(chip); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1543 | } |
| 1544 | #endif /* CONFIG_SND_HDA_POWER_SAVE */ |
| 1545 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1546 | #ifdef CONFIG_PM |
| 1547 | /* |
| 1548 | * power management |
| 1549 | */ |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1550 | static int azx_suspend(struct pci_dev *pci, pm_message_t state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1551 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1552 | struct snd_card *card = pci_get_drvdata(pci); |
| 1553 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1554 | int i; |
| 1555 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1556 | snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1557 | for (i = 0; i < chip->pcm_devs; i++) |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1558 | snd_pcm_suspend_all(chip->pcm[i]); |
Takashi Iwai | 0b7a2e9 | 2007-08-14 15:18:26 +0200 | [diff] [blame] | 1559 | if (chip->initialized) |
| 1560 | snd_hda_suspend(chip->bus, state); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1561 | azx_stop_chip(chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1562 | if (chip->irq >= 0) { |
| 1563 | synchronize_irq(chip->irq); |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1564 | free_irq(chip->irq, chip); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1565 | chip->irq = -1; |
| 1566 | } |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1567 | if (chip->msi) |
Takashi Iwai | 43001c9 | 2006-09-08 12:30:03 +0200 | [diff] [blame] | 1568 | pci_disable_msi(chip->pci); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1569 | pci_disable_device(pci); |
| 1570 | pci_save_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1571 | pci_set_power_state(pci, pci_choose_state(pci, state)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1572 | return 0; |
| 1573 | } |
| 1574 | |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1575 | static int azx_resume(struct pci_dev *pci) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1576 | { |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1577 | struct snd_card *card = pci_get_drvdata(pci); |
| 1578 | struct azx *chip = card->private_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1580 | pci_set_power_state(pci, PCI_D0); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1581 | pci_restore_state(pci); |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1582 | if (pci_enable_device(pci) < 0) { |
| 1583 | printk(KERN_ERR "hda-intel: pci_enable_device failed, " |
| 1584 | "disabling device\n"); |
| 1585 | snd_card_disconnect(card); |
| 1586 | return -EIO; |
| 1587 | } |
| 1588 | pci_set_master(pci); |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1589 | if (chip->msi) |
| 1590 | if (pci_enable_msi(pci) < 0) |
| 1591 | chip->msi = 0; |
| 1592 | if (azx_acquire_irq(chip, 1) < 0) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1593 | return -EIO; |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1594 | azx_init_pci(chip); |
Maxim Levitsky | d804ad9 | 2007-09-03 15:28:04 +0200 | [diff] [blame] | 1595 | |
| 1596 | if (snd_hda_codecs_inuse(chip->bus)) |
| 1597 | azx_init_chip(chip); |
| 1598 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1599 | snd_hda_resume(chip->bus); |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1600 | snd_power_change_state(card, SNDRV_CTL_POWER_D0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1601 | return 0; |
| 1602 | } |
| 1603 | #endif /* CONFIG_PM */ |
| 1604 | |
| 1605 | |
| 1606 | /* |
| 1607 | * destructor |
| 1608 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1609 | static int azx_free(struct azx *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1610 | { |
Takashi Iwai | ce43fba | 2005-05-30 20:33:44 +0200 | [diff] [blame] | 1611 | if (chip->initialized) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1612 | int i; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1613 | for (i = 0; i < chip->num_streams; i++) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1614 | azx_stream_stop(chip, &chip->azx_dev[i]); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1615 | azx_stop_chip(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | } |
| 1617 | |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1618 | if (chip->irq >= 0) { |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1619 | synchronize_irq(chip->irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1620 | free_irq(chip->irq, (void*)chip); |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1621 | } |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1622 | if (chip->msi) |
Takashi Iwai | 30b3539 | 2006-10-11 18:52:53 +0200 | [diff] [blame] | 1623 | pci_disable_msi(chip->pci); |
Takashi Iwai | f079c25 | 2006-06-01 11:42:14 +0200 | [diff] [blame] | 1624 | if (chip->remap_addr) |
| 1625 | iounmap(chip->remap_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | |
| 1627 | if (chip->bdl.area) |
| 1628 | snd_dma_free_pages(&chip->bdl); |
| 1629 | if (chip->rb.area) |
| 1630 | snd_dma_free_pages(&chip->rb); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1631 | if (chip->posbuf.area) |
| 1632 | snd_dma_free_pages(&chip->posbuf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1633 | pci_release_regions(chip->pci); |
| 1634 | pci_disable_device(chip->pci); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1635 | kfree(chip->azx_dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | kfree(chip); |
| 1637 | |
| 1638 | return 0; |
| 1639 | } |
| 1640 | |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1641 | static int azx_dev_free(struct snd_device *device) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1642 | { |
| 1643 | return azx_free(device->device_data); |
| 1644 | } |
| 1645 | |
| 1646 | /* |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1647 | * white/black-listing for position_fix |
| 1648 | */ |
Ralf Baechle | 623ec04 | 2007-03-13 15:29:47 +0100 | [diff] [blame] | 1649 | static struct snd_pci_quirk position_fix_list[] __devinitdata = { |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1650 | SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_NONE), |
Takashi Iwai | 0cb65f2 | 2007-08-16 12:32:45 +0200 | [diff] [blame] | 1651 | SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_NONE), |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1652 | {} |
| 1653 | }; |
| 1654 | |
| 1655 | static int __devinit check_position_fix(struct azx *chip, int fix) |
| 1656 | { |
| 1657 | const struct snd_pci_quirk *q; |
| 1658 | |
| 1659 | if (fix == POS_FIX_AUTO) { |
| 1660 | q = snd_pci_quirk_lookup(chip->pci, position_fix_list); |
| 1661 | if (q) { |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1662 | printk(KERN_INFO |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1663 | "hda_intel: position_fix set to %d " |
| 1664 | "for device %04x:%04x\n", |
| 1665 | q->value, q->subvendor, q->subdevice); |
| 1666 | return q->value; |
| 1667 | } |
| 1668 | } |
| 1669 | return fix; |
| 1670 | } |
| 1671 | |
| 1672 | /* |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1673 | * black-lists for probe_mask |
| 1674 | */ |
| 1675 | static struct snd_pci_quirk probe_mask_list[] __devinitdata = { |
| 1676 | /* Thinkpad often breaks the controller communication when accessing |
| 1677 | * to the non-working (or non-existing) modem codec slot. |
| 1678 | */ |
| 1679 | SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01), |
| 1680 | SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01), |
| 1681 | SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01), |
| 1682 | {} |
| 1683 | }; |
| 1684 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1685 | static void __devinit check_probe_mask(struct azx *chip, int dev) |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1686 | { |
| 1687 | const struct snd_pci_quirk *q; |
| 1688 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1689 | if (probe_mask[dev] == -1) { |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1690 | q = snd_pci_quirk_lookup(chip->pci, probe_mask_list); |
| 1691 | if (q) { |
| 1692 | printk(KERN_INFO |
| 1693 | "hda_intel: probe_mask set to 0x%x " |
| 1694 | "for device %04x:%04x\n", |
| 1695 | q->value, q->subvendor, q->subdevice); |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1696 | probe_mask[dev] = q->value; |
Takashi Iwai | 669ba27 | 2007-08-17 09:17:36 +0200 | [diff] [blame] | 1697 | } |
| 1698 | } |
| 1699 | } |
| 1700 | |
| 1701 | |
| 1702 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1703 | * constructor |
| 1704 | */ |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1705 | static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci, |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1706 | int dev, int driver_type, |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1707 | struct azx **rchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1708 | { |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1709 | struct azx *chip; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1710 | int err; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1711 | static struct snd_device_ops ops = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1712 | .dev_free = azx_dev_free, |
| 1713 | }; |
| 1714 | |
| 1715 | *rchip = NULL; |
| 1716 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1717 | err = pci_enable_device(pci); |
| 1718 | if (err < 0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1719 | return err; |
| 1720 | |
Takashi Iwai | e560d8d | 2005-09-09 14:21:46 +0200 | [diff] [blame] | 1721 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1722 | if (!chip) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1723 | snd_printk(KERN_ERR SFX "cannot allocate chip\n"); |
| 1724 | pci_disable_device(pci); |
| 1725 | return -ENOMEM; |
| 1726 | } |
| 1727 | |
| 1728 | spin_lock_init(&chip->reg_lock); |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 1729 | mutex_init(&chip->open_mutex); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1730 | chip->card = card; |
| 1731 | chip->pci = pci; |
| 1732 | chip->irq = -1; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1733 | chip->driver_type = driver_type; |
Takashi Iwai | 134a11f | 2006-11-10 12:08:37 +0100 | [diff] [blame] | 1734 | chip->msi = enable_msi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1735 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1736 | chip->position_fix = check_position_fix(chip, position_fix[dev]); |
| 1737 | check_probe_mask(chip, dev); |
Takashi Iwai | 3372a15 | 2007-02-01 15:46:50 +0100 | [diff] [blame] | 1738 | |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 1739 | chip->single_cmd = single_cmd; |
Takashi Iwai | c74db86 | 2005-05-12 14:26:27 +0200 | [diff] [blame] | 1740 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1741 | #if BITS_PER_LONG != 64 |
| 1742 | /* Fix up base address on ULI M5461 */ |
| 1743 | if (chip->driver_type == AZX_DRIVER_ULI) { |
| 1744 | u16 tmp3; |
| 1745 | pci_read_config_word(pci, 0x40, &tmp3); |
| 1746 | pci_write_config_word(pci, 0x40, tmp3 | 0x10); |
| 1747 | pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0); |
| 1748 | } |
| 1749 | #endif |
| 1750 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1751 | err = pci_request_regions(pci, "ICH HD audio"); |
| 1752 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1753 | kfree(chip); |
| 1754 | pci_disable_device(pci); |
| 1755 | return err; |
| 1756 | } |
| 1757 | |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1758 | chip->addr = pci_resource_start(pci, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1759 | chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci,0)); |
| 1760 | if (chip->remap_addr == NULL) { |
| 1761 | snd_printk(KERN_ERR SFX "ioremap error\n"); |
| 1762 | err = -ENXIO; |
| 1763 | goto errout; |
| 1764 | } |
| 1765 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1766 | if (chip->msi) |
| 1767 | if (pci_enable_msi(pci) < 0) |
| 1768 | chip->msi = 0; |
Stephen Hemminger | 7376d01 | 2006-08-21 19:17:46 +0200 | [diff] [blame] | 1769 | |
Takashi Iwai | 68e7fff | 2006-10-23 13:40:59 +0200 | [diff] [blame] | 1770 | if (azx_acquire_irq(chip, 0) < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1771 | err = -EBUSY; |
| 1772 | goto errout; |
| 1773 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1774 | |
| 1775 | pci_set_master(pci); |
| 1776 | synchronize_irq(chip->irq); |
| 1777 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1778 | switch (chip->driver_type) { |
| 1779 | case AZX_DRIVER_ULI: |
| 1780 | chip->playback_streams = ULI_NUM_PLAYBACK; |
| 1781 | chip->capture_streams = ULI_NUM_CAPTURE; |
| 1782 | chip->playback_index_offset = ULI_PLAYBACK_INDEX; |
| 1783 | chip->capture_index_offset = ULI_CAPTURE_INDEX; |
| 1784 | break; |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 1785 | case AZX_DRIVER_ATIHDMI: |
| 1786 | chip->playback_streams = ATIHDMI_NUM_PLAYBACK; |
| 1787 | chip->capture_streams = ATIHDMI_NUM_CAPTURE; |
| 1788 | chip->playback_index_offset = ATIHDMI_PLAYBACK_INDEX; |
| 1789 | chip->capture_index_offset = ATIHDMI_CAPTURE_INDEX; |
| 1790 | break; |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1791 | default: |
| 1792 | chip->playback_streams = ICH6_NUM_PLAYBACK; |
| 1793 | chip->capture_streams = ICH6_NUM_CAPTURE; |
| 1794 | chip->playback_index_offset = ICH6_PLAYBACK_INDEX; |
| 1795 | chip->capture_index_offset = ICH6_CAPTURE_INDEX; |
| 1796 | break; |
| 1797 | } |
| 1798 | chip->num_streams = chip->playback_streams + chip->capture_streams; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1799 | chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev), |
| 1800 | GFP_KERNEL); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1801 | if (!chip->azx_dev) { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1802 | snd_printk(KERN_ERR "cannot malloc azx_dev\n"); |
| 1803 | goto errout; |
| 1804 | } |
| 1805 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1806 | /* allocate memory for the BDL for each stream */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1807 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 1808 | snd_dma_pci_data(chip->pci), |
| 1809 | BDL_SIZE, &chip->bdl); |
| 1810 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1811 | snd_printk(KERN_ERR SFX "cannot allocate BDL\n"); |
| 1812 | goto errout; |
| 1813 | } |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1814 | /* allocate memory for the position buffer */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1815 | err = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
| 1816 | snd_dma_pci_data(chip->pci), |
| 1817 | chip->num_streams * 8, &chip->posbuf); |
| 1818 | if (err < 0) { |
Takashi Iwai | 0be3b5d | 2005-09-05 17:11:40 +0200 | [diff] [blame] | 1819 | snd_printk(KERN_ERR SFX "cannot allocate posbuf\n"); |
| 1820 | goto errout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1821 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1822 | /* allocate CORB/RIRB */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1823 | if (!chip->single_cmd) { |
| 1824 | err = azx_alloc_cmd_io(chip); |
| 1825 | if (err < 0) |
Takashi Iwai | 2734616 | 2006-01-12 18:28:44 +0100 | [diff] [blame] | 1826 | goto errout; |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1827 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1828 | |
| 1829 | /* initialize streams */ |
| 1830 | azx_init_stream(chip); |
| 1831 | |
| 1832 | /* initialize chip */ |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1833 | azx_init_pci(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1834 | azx_init_chip(chip); |
| 1835 | |
| 1836 | /* codec detection */ |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1837 | if (!chip->codec_mask) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | snd_printk(KERN_ERR SFX "no codecs found!\n"); |
| 1839 | err = -ENODEV; |
| 1840 | goto errout; |
| 1841 | } |
| 1842 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1843 | err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); |
| 1844 | if (err <0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1845 | snd_printk(KERN_ERR SFX "Error creating device [card]!\n"); |
| 1846 | goto errout; |
| 1847 | } |
| 1848 | |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1849 | strcpy(card->driver, "HDA-Intel"); |
| 1850 | strcpy(card->shortname, driver_short_names[chip->driver_type]); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1851 | sprintf(card->longname, "%s at 0x%lx irq %i", |
| 1852 | card->shortname, chip->addr, chip->irq); |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1853 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | *rchip = chip; |
| 1855 | return 0; |
| 1856 | |
| 1857 | errout: |
| 1858 | azx_free(chip); |
| 1859 | return err; |
| 1860 | } |
| 1861 | |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1862 | static void power_down_all_codecs(struct azx *chip) |
| 1863 | { |
| 1864 | #ifdef CONFIG_SND_HDA_POWER_SAVE |
| 1865 | /* The codecs were powered up in snd_hda_codec_new(). |
| 1866 | * Now all initialization done, so turn them down if possible |
| 1867 | */ |
| 1868 | struct hda_codec *codec; |
| 1869 | list_for_each_entry(codec, &chip->bus->codec_list, list) { |
| 1870 | snd_hda_power_down(codec); |
| 1871 | } |
| 1872 | #endif |
| 1873 | } |
| 1874 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1875 | static int __devinit azx_probe(struct pci_dev *pci, |
| 1876 | const struct pci_device_id *pci_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1877 | { |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1878 | static int dev; |
Takashi Iwai | a98f90f | 2005-11-17 14:59:02 +0100 | [diff] [blame] | 1879 | struct snd_card *card; |
| 1880 | struct azx *chip; |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1881 | int err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1882 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1883 | if (dev >= SNDRV_CARDS) |
| 1884 | return -ENODEV; |
| 1885 | if (!enable[dev]) { |
| 1886 | dev++; |
| 1887 | return -ENOENT; |
| 1888 | } |
| 1889 | |
| 1890 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1891 | if (!card) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1892 | snd_printk(KERN_ERR SFX "Error creating card!\n"); |
| 1893 | return -ENOMEM; |
| 1894 | } |
| 1895 | |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1896 | err = azx_create(card, pci, dev, pci_id->driver_data, &chip); |
Pavel Machek | 927fc86 | 2006-08-31 17:03:43 +0200 | [diff] [blame] | 1897 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1898 | snd_card_free(card); |
| 1899 | return err; |
| 1900 | } |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1901 | card->private_data = chip; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1902 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1903 | /* create codec instances */ |
Takashi Iwai | 5aba4f8 | 2008-01-07 15:16:37 +0100 | [diff] [blame] | 1904 | err = azx_codec_create(chip, model[dev], probe_mask[dev]); |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1905 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | snd_card_free(card); |
| 1907 | return err; |
| 1908 | } |
| 1909 | |
| 1910 | /* create PCM streams */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1911 | err = azx_pcm_create(chip); |
| 1912 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1913 | snd_card_free(card); |
| 1914 | return err; |
| 1915 | } |
| 1916 | |
| 1917 | /* create mixer controls */ |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1918 | err = azx_mixer_create(chip); |
| 1919 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1920 | snd_card_free(card); |
| 1921 | return err; |
| 1922 | } |
| 1923 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1924 | snd_card_set_dev(card, &pci->dev); |
| 1925 | |
Takashi Iwai | d01ce99 | 2007-07-27 16:52:19 +0200 | [diff] [blame] | 1926 | err = snd_card_register(card); |
| 1927 | if (err < 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1928 | snd_card_free(card); |
| 1929 | return err; |
| 1930 | } |
| 1931 | |
| 1932 | pci_set_drvdata(pci, card); |
Takashi Iwai | cb53c62 | 2007-08-10 17:21:45 +0200 | [diff] [blame] | 1933 | chip->running = 1; |
| 1934 | power_down_all_codecs(chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1935 | |
Andrew Paprocki | e25bcdb | 2008-01-13 11:57:17 +0100 | [diff] [blame^] | 1936 | dev++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1937 | return err; |
| 1938 | } |
| 1939 | |
| 1940 | static void __devexit azx_remove(struct pci_dev *pci) |
| 1941 | { |
| 1942 | snd_card_free(pci_get_drvdata(pci)); |
| 1943 | pci_set_drvdata(pci, NULL); |
| 1944 | } |
| 1945 | |
| 1946 | /* PCI IDs */ |
Takashi Iwai | f40b689 | 2006-07-05 16:51:05 +0200 | [diff] [blame] | 1947 | static struct pci_device_id azx_ids[] = { |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1948 | { 0x8086, 0x2668, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH6 */ |
| 1949 | { 0x8086, 0x27d8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH7 */ |
| 1950 | { 0x8086, 0x269a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ESB2 */ |
Jason Gaston | d298139 | 2006-01-10 11:07:37 +0100 | [diff] [blame] | 1951 | { 0x8086, 0x284b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH8 */ |
Jason Gaston | f9cc8a8 | 2006-11-22 11:53:52 +0100 | [diff] [blame] | 1952 | { 0x8086, 0x293e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH9 */ |
| 1953 | { 0x8086, 0x293f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ICH }, /* ICH9 */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1954 | { 0x1002, 0x437b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATI }, /* ATI SB450 */ |
Felix Kuehling | 89be83f | 2006-03-31 12:33:59 +0200 | [diff] [blame] | 1955 | { 0x1002, 0x4383, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATI }, /* ATI SB600 */ |
Felix Kuehling | 778b6e1 | 2006-05-17 11:22:21 +0200 | [diff] [blame] | 1956 | { 0x1002, 0x793b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS600 HDMI */ |
Felix Kuehling | 5b15c95 | 2006-10-16 12:49:47 +0200 | [diff] [blame] | 1957 | { 0x1002, 0x7919, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS690 HDMI */ |
Wolke Liu | 27da183 | 2007-11-16 11:06:30 +0100 | [diff] [blame] | 1958 | { 0x1002, 0x960f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RS780 HDMI */ |
Wolke Liu | e6db111 | 2007-04-27 12:20:57 +0200 | [diff] [blame] | 1959 | { 0x1002, 0xaa00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI R600 HDMI */ |
Herton Ronaldo Krzesinski | 2797f72 | 2007-11-05 18:21:56 +0100 | [diff] [blame] | 1960 | { 0x1002, 0xaa08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV630 HDMI */ |
| 1961 | { 0x1002, 0xaa10, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV610 HDMI */ |
Wolke Liu | 27da183 | 2007-11-16 11:06:30 +0100 | [diff] [blame] | 1962 | { 0x1002, 0xaa18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV670 HDMI */ |
| 1963 | { 0x1002, 0xaa20, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV635 HDMI */ |
| 1964 | { 0x1002, 0xaa28, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV620 HDMI */ |
| 1965 | { 0x1002, 0xaa30, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ATIHDMI }, /* ATI RV770 HDMI */ |
Takashi Iwai | 07e4ca5 | 2005-08-24 14:14:57 +0200 | [diff] [blame] | 1966 | { 0x1106, 0x3288, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_VIA }, /* VIA VT8251/VT8237A */ |
| 1967 | { 0x1039, 0x7502, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_SIS }, /* SIS966 */ |
| 1968 | { 0x10b9, 0x5461, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_ULI }, /* ULI M5461 */ |
Peer Chen | 5b005a0 | 2006-10-31 15:33:42 +0100 | [diff] [blame] | 1969 | { 0x10de, 0x026c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP51 */ |
| 1970 | { 0x10de, 0x0371, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP55 */ |
| 1971 | { 0x10de, 0x03e4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP61 */ |
| 1972 | { 0x10de, 0x03f0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP61 */ |
| 1973 | { 0x10de, 0x044a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP65 */ |
| 1974 | { 0x10de, 0x044b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP65 */ |
| 1975 | { 0x10de, 0x055c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP67 */ |
| 1976 | { 0x10de, 0x055d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP67 */ |
Peer Chen | 15cc445 | 2007-06-08 13:55:10 +0200 | [diff] [blame] | 1977 | { 0x10de, 0x07fc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP73 */ |
| 1978 | { 0x10de, 0x07fd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP73 */ |
| 1979 | { 0x10de, 0x0774, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1980 | { 0x10de, 0x0775, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1981 | { 0x10de, 0x0776, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
| 1982 | { 0x10de, 0x0777, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP77 */ |
Peer Chen | c107106 | 2007-09-21 18:20:25 +0200 | [diff] [blame] | 1983 | { 0x10de, 0x0ac0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */ |
| 1984 | { 0x10de, 0x0ac1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */ |
| 1985 | { 0x10de, 0x0ac2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */ |
| 1986 | { 0x10de, 0x0ac3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, AZX_DRIVER_NVIDIA }, /* NVIDIA MCP79 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1987 | { 0, } |
| 1988 | }; |
| 1989 | MODULE_DEVICE_TABLE(pci, azx_ids); |
| 1990 | |
| 1991 | /* pci_driver definition */ |
| 1992 | static struct pci_driver driver = { |
| 1993 | .name = "HDA Intel", |
| 1994 | .id_table = azx_ids, |
| 1995 | .probe = azx_probe, |
| 1996 | .remove = __devexit_p(azx_remove), |
Takashi Iwai | 421a125 | 2005-11-17 16:11:09 +0100 | [diff] [blame] | 1997 | #ifdef CONFIG_PM |
| 1998 | .suspend = azx_suspend, |
| 1999 | .resume = azx_resume, |
| 2000 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2001 | }; |
| 2002 | |
| 2003 | static int __init alsa_card_azx_init(void) |
| 2004 | { |
Takashi Iwai | 01d25d4 | 2005-04-11 16:58:24 +0200 | [diff] [blame] | 2005 | return pci_register_driver(&driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2006 | } |
| 2007 | |
| 2008 | static void __exit alsa_card_azx_exit(void) |
| 2009 | { |
| 2010 | pci_unregister_driver(&driver); |
| 2011 | } |
| 2012 | |
| 2013 | module_init(alsa_card_azx_init) |
| 2014 | module_exit(alsa_card_azx_exit) |