Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 1 | /* ehci-msm-hsic.c - HSUSB Host Controller Driver Implementation |
| 2 | * |
| 3 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 4 | * |
| 5 | * Partly derived from ehci-fsl.c and ehci-hcd.c |
| 6 | * Copyright (c) 2000-2004 by David Brownell |
| 7 | * Copyright (c) 2005 MontaVista Software |
| 8 | * |
| 9 | * All source code in this file is licensed under the following license except |
| 10 | * where indicated. |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms of the GNU General Public License version 2 as published |
| 14 | * by the Free Software Foundation. |
| 15 | * |
| 16 | * This program is distributed in the hope that it will be useful, |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. |
| 19 | * |
| 20 | * See the GNU General Public License for more details. |
| 21 | * You should have received a copy of the GNU General Public License |
| 22 | * along with this program; if not, you can find it at http://www.fsf.org |
| 23 | */ |
| 24 | |
| 25 | #include <linux/platform_device.h> |
| 26 | #include <linux/clk.h> |
| 27 | #include <linux/err.h> |
| 28 | #include <linux/wakelock.h> |
| 29 | #include <linux/pm_runtime.h> |
| 30 | #include <linux/regulator/consumer.h> |
| 31 | |
| 32 | #include <linux/usb/msm_hsusb_hw.h> |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 33 | #include <linux/usb/msm_hsusb.h> |
| 34 | #include <linux/gpio.h> |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 35 | #include <mach/clk.h> |
| 36 | #include <mach/msm_iomap.h> |
| 37 | |
| 38 | #define MSM_USB_BASE (hcd->regs) |
| 39 | |
| 40 | struct msm_hsic_hcd { |
| 41 | struct ehci_hcd ehci; |
| 42 | struct device *dev; |
| 43 | struct clk *ahb_clk; |
| 44 | struct clk *sys_clk; |
| 45 | struct clk *fs_xcvr_clk; |
| 46 | struct clk *hsic_clk; |
| 47 | struct clk *cal_clk; |
| 48 | struct regulator *hsic_vddcx; |
| 49 | bool async_int; |
| 50 | atomic_t in_lpm; |
| 51 | struct wake_lock wlock; |
| 52 | }; |
| 53 | |
| 54 | static inline struct msm_hsic_hcd *hcd_to_hsic(struct usb_hcd *hcd) |
| 55 | { |
| 56 | return (struct msm_hsic_hcd *) (hcd->hcd_priv); |
| 57 | } |
| 58 | |
| 59 | static inline struct usb_hcd *hsic_to_hcd(struct msm_hsic_hcd *mehci) |
| 60 | { |
| 61 | return container_of((void *) mehci, struct usb_hcd, hcd_priv); |
| 62 | } |
| 63 | |
| 64 | #define ULPI_IO_TIMEOUT_USEC (10 * 1000) |
| 65 | |
| 66 | #define USB_PHY_VDD_DIG_VOL_MIN 1000000 /* uV */ |
| 67 | #define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */ |
| 68 | #define USB_PHY_VDD_DIG_LOAD 49360 /* uA */ |
| 69 | |
| 70 | static int msm_hsic_init_vddcx(struct msm_hsic_hcd *mehci, int init) |
| 71 | { |
| 72 | int ret = 0; |
| 73 | |
| 74 | if (!init) |
| 75 | goto disable_reg; |
| 76 | |
| 77 | mehci->hsic_vddcx = regulator_get(mehci->dev, "HSIC_VDDCX"); |
| 78 | if (IS_ERR(mehci->hsic_vddcx)) { |
| 79 | dev_err(mehci->dev, "unable to get hsic vddcx\n"); |
| 80 | return PTR_ERR(mehci->hsic_vddcx); |
| 81 | } |
| 82 | |
| 83 | ret = regulator_set_voltage(mehci->hsic_vddcx, |
| 84 | USB_PHY_VDD_DIG_VOL_MIN, |
| 85 | USB_PHY_VDD_DIG_VOL_MAX); |
| 86 | if (ret) { |
| 87 | dev_err(mehci->dev, "unable to set the voltage" |
| 88 | "for hsic vddcx\n"); |
| 89 | goto reg_set_voltage_err; |
| 90 | } |
| 91 | |
| 92 | ret = regulator_set_optimum_mode(mehci->hsic_vddcx, |
| 93 | USB_PHY_VDD_DIG_LOAD); |
| 94 | if (ret < 0) { |
| 95 | pr_err("%s: Unable to set optimum mode of the regulator:" |
| 96 | "VDDCX\n", __func__); |
| 97 | goto reg_optimum_mode_err; |
| 98 | } |
| 99 | |
| 100 | ret = regulator_enable(mehci->hsic_vddcx); |
| 101 | if (ret) { |
| 102 | dev_err(mehci->dev, "unable to enable hsic vddcx\n"); |
| 103 | goto reg_enable_err; |
| 104 | } |
| 105 | |
| 106 | return 0; |
| 107 | |
| 108 | disable_reg: |
| 109 | regulator_disable(mehci->hsic_vddcx); |
| 110 | reg_enable_err: |
| 111 | regulator_set_optimum_mode(mehci->hsic_vddcx, 0); |
| 112 | reg_optimum_mode_err: |
| 113 | regulator_set_voltage(mehci->hsic_vddcx, 0, |
| 114 | USB_PHY_VDD_DIG_VOL_MIN); |
| 115 | reg_set_voltage_err: |
| 116 | regulator_put(mehci->hsic_vddcx); |
| 117 | |
| 118 | return ret; |
| 119 | |
| 120 | } |
| 121 | |
| 122 | static int ulpi_write(struct msm_hsic_hcd *mehci, u32 val, u32 reg) |
| 123 | { |
| 124 | struct usb_hcd *hcd = hsic_to_hcd(mehci); |
| 125 | int cnt = 0; |
| 126 | |
| 127 | /* initiate write operation */ |
| 128 | writel_relaxed(ULPI_RUN | ULPI_WRITE | |
| 129 | ULPI_ADDR(reg) | ULPI_DATA(val), |
| 130 | USB_ULPI_VIEWPORT); |
| 131 | |
| 132 | /* wait for completion */ |
| 133 | while (cnt < ULPI_IO_TIMEOUT_USEC) { |
| 134 | if (!(readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_RUN)) |
| 135 | break; |
| 136 | udelay(1); |
| 137 | cnt++; |
| 138 | } |
| 139 | |
| 140 | if (cnt >= ULPI_IO_TIMEOUT_USEC) { |
| 141 | dev_err(mehci->dev, "ulpi_write: timeout\n"); |
| 142 | return -ETIMEDOUT; |
| 143 | } |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 148 | static int msm_hsic_config_gpios(struct msm_hsic_hcd *mehci, int gpio_en) |
| 149 | { |
| 150 | int rc = 0; |
| 151 | struct msm_hsic_host_platform_data *pdata; |
| 152 | |
| 153 | pdata = mehci->dev->platform_data; |
| 154 | /* |
| 155 | * In future versions, dedicated lines might be used for HSIC |
| 156 | * strobe and data instead of gpios. Hence returning zero value. |
| 157 | */ |
| 158 | if (!pdata->strobe || !pdata->data) |
| 159 | return rc; |
| 160 | |
| 161 | if (!gpio_en) |
| 162 | goto free_gpio; |
| 163 | |
| 164 | rc = gpio_request(pdata->strobe, "HSIC_STROBE_GPIO"); |
| 165 | if (rc < 0) { |
| 166 | dev_err(mehci->dev, "gpio request failed for HSIC STROBE\n"); |
| 167 | return rc; |
| 168 | } |
| 169 | |
| 170 | rc = gpio_request(pdata->data, "HSIC_DATA_GPIO"); |
| 171 | if (rc < 0) { |
| 172 | dev_err(mehci->dev, "gpio request failed for HSIC DATA\n"); |
| 173 | goto free_strobe; |
| 174 | } |
| 175 | |
| 176 | return 0; |
| 177 | |
| 178 | free_gpio: |
| 179 | gpio_free(pdata->data); |
| 180 | free_strobe: |
| 181 | gpio_free(pdata->strobe); |
| 182 | |
| 183 | return rc; |
| 184 | } |
| 185 | |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 186 | static int msm_hsic_phy_clk_reset(struct msm_hsic_hcd *mehci) |
| 187 | { |
| 188 | int ret; |
| 189 | |
| 190 | clk_enable(mehci->fs_xcvr_clk); |
| 191 | |
| 192 | ret = clk_reset(mehci->sys_clk, CLK_RESET_ASSERT); |
| 193 | if (ret) { |
| 194 | clk_disable(mehci->fs_xcvr_clk); |
| 195 | dev_err(mehci->dev, "usb phy clk assert failed\n"); |
| 196 | return ret; |
| 197 | } |
| 198 | usleep_range(10000, 12000); |
| 199 | clk_disable(mehci->fs_xcvr_clk); |
| 200 | |
| 201 | ret = clk_reset(mehci->sys_clk, CLK_RESET_DEASSERT); |
| 202 | if (ret) |
| 203 | dev_err(mehci->dev, "usb phy clk deassert failed\n"); |
| 204 | |
| 205 | return ret; |
| 206 | } |
| 207 | |
| 208 | static int msm_hsic_phy_reset(struct msm_hsic_hcd *mehci) |
| 209 | { |
| 210 | struct usb_hcd *hcd = hsic_to_hcd(mehci); |
| 211 | u32 val; |
| 212 | int ret; |
| 213 | |
| 214 | ret = msm_hsic_phy_clk_reset(mehci); |
| 215 | if (ret) |
| 216 | return ret; |
| 217 | |
| 218 | val = readl_relaxed(USB_PORTSC) & ~PORTSC_PTS_MASK; |
| 219 | writel_relaxed(val | PORTSC_PTS_ULPI, USB_PORTSC); |
| 220 | |
| 221 | /* Ensure that RESET operation is completed before turning off clock */ |
| 222 | mb(); |
| 223 | dev_dbg(mehci->dev, "phy_reset: success\n"); |
| 224 | |
| 225 | return 0; |
| 226 | } |
| 227 | |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 228 | #define HSIC_GPIO150_PAD_CTL (MSM_TLMM_BASE+0x20C0) |
| 229 | #define HSIC_GPIO151_PAD_CTL (MSM_TLMM_BASE+0x20C4) |
| 230 | #define HSIC_CAL_PAD_CTL (MSM_TLMM_BASE+0x20C8) |
| 231 | #define HSIC_LV_MODE 0x04 |
| 232 | #define HSIC_PAD_CALIBRATION 0xA8 |
| 233 | #define HSIC_GPIO_PAD_VAL 0x0A0AAA10 |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 234 | #define LINK_RESET_TIMEOUT_USEC (250 * 1000) |
| 235 | static int msm_hsic_reset(struct msm_hsic_hcd *mehci) |
| 236 | { |
| 237 | struct usb_hcd *hcd = hsic_to_hcd(mehci); |
| 238 | int cnt = 0; |
| 239 | int ret; |
| 240 | |
| 241 | ret = msm_hsic_phy_reset(mehci); |
| 242 | if (ret) { |
| 243 | dev_err(mehci->dev, "phy_reset failed\n"); |
| 244 | return ret; |
| 245 | } |
| 246 | |
| 247 | writel_relaxed(USBCMD_RESET, USB_USBCMD); |
| 248 | while (cnt < LINK_RESET_TIMEOUT_USEC) { |
| 249 | if (!(readl_relaxed(USB_USBCMD) & USBCMD_RESET)) |
| 250 | break; |
| 251 | udelay(1); |
| 252 | cnt++; |
| 253 | } |
| 254 | if (cnt >= LINK_RESET_TIMEOUT_USEC) |
| 255 | return -ETIMEDOUT; |
| 256 | |
| 257 | /* select ULPI phy */ |
| 258 | writel_relaxed(0x80000000, USB_PORTSC); |
| 259 | |
| 260 | /* TODO: Need to confirm if HSIC PHY also requires delay after RESET */ |
| 261 | msleep(100); |
| 262 | |
| 263 | /* HSIC PHY Initialization */ |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 264 | /* Enable LV_MODE in HSIC_CAL_PAD_CTL register */ |
| 265 | writel_relaxed(HSIC_LV_MODE, HSIC_CAL_PAD_CTL); |
| 266 | |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 267 | /*set periodic calibration interval to ~2.048sec in HSIC_IO_CAL_REG */ |
| 268 | ulpi_write(mehci, 0xFF, 0x33); |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 269 | |
| 270 | /* Enable periodic IO calibration in HSIC_CFG register */ |
| 271 | ulpi_write(mehci, HSIC_PAD_CALIBRATION, 0x30); |
| 272 | |
| 273 | /* Configure GPIO 150/151 pins for HSIC functionality mode */ |
| 274 | ret = msm_hsic_config_gpios(mehci, 1); |
| 275 | if (ret) { |
| 276 | dev_err(mehci->dev, " gpio configuarion failed\n"); |
| 277 | return ret; |
| 278 | } |
| 279 | |
| 280 | /* Set LV_MODE=0x1 and DCC=0x2 in HSIC_GPIO150/151_PAD_CTL register */ |
| 281 | writel_relaxed(HSIC_GPIO_PAD_VAL, HSIC_GPIO150_PAD_CTL); |
| 282 | writel_relaxed(HSIC_GPIO_PAD_VAL, HSIC_GPIO151_PAD_CTL); |
| 283 | |
| 284 | /* Enable HSIC mode in HSIC_CFG register */ |
| 285 | ulpi_write(mehci, 0x01, 0x31); |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 286 | |
| 287 | return 0; |
| 288 | } |
| 289 | |
| 290 | #define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000) |
| 291 | #define PHY_RESUME_TIMEOUT_USEC (100 * 1000) |
| 292 | |
| 293 | #ifdef CONFIG_PM_SLEEP |
| 294 | static int msm_hsic_suspend(struct msm_hsic_hcd *mehci) |
| 295 | { |
| 296 | struct usb_hcd *hcd = hsic_to_hcd(mehci); |
| 297 | int cnt = 0; |
| 298 | u32 val; |
| 299 | |
| 300 | if (atomic_read(&mehci->in_lpm)) { |
| 301 | dev_dbg(mehci->dev, "%s called in lpm\n", __func__); |
| 302 | return 0; |
| 303 | } |
| 304 | |
| 305 | disable_irq(hcd->irq); |
| 306 | /* |
| 307 | * PHY may take some time or even fail to enter into low power |
| 308 | * mode (LPM). Hence poll for 500 msec and reset the PHY and link |
| 309 | * in failure case. |
| 310 | */ |
| 311 | val = readl_relaxed(USB_PORTSC) | PORTSC_PHCD; |
| 312 | writel_relaxed(val, USB_PORTSC); |
| 313 | while (cnt < PHY_SUSPEND_TIMEOUT_USEC) { |
| 314 | if (readl_relaxed(USB_PORTSC) & PORTSC_PHCD) |
| 315 | break; |
| 316 | udelay(1); |
| 317 | cnt++; |
| 318 | } |
| 319 | |
| 320 | if (cnt >= PHY_SUSPEND_TIMEOUT_USEC) { |
| 321 | dev_err(mehci->dev, "Unable to suspend PHY\n"); |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 322 | msm_hsic_config_gpios(mehci, 0); |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 323 | msm_hsic_reset(mehci); |
| 324 | enable_irq(hcd->irq); |
| 325 | return -ETIMEDOUT; |
| 326 | } |
| 327 | |
| 328 | /* |
| 329 | * PHY has capability to generate interrupt asynchronously in low |
| 330 | * power mode (LPM). This interrupt is level triggered. So USB IRQ |
| 331 | * line must be disabled till async interrupt enable bit is cleared |
| 332 | * in USBCMD register. Assert STP (ULPI interface STOP signal) to |
| 333 | * block data communication from PHY. |
| 334 | */ |
| 335 | writel_relaxed(readl_relaxed(USB_USBCMD) | ASYNC_INTR_CTRL | |
| 336 | ULPI_STP_CTRL, USB_USBCMD); |
| 337 | |
| 338 | /* |
| 339 | * Ensure that hardware is put in low power mode before |
| 340 | * clocks are turned OFF and VDD is allowed to minimize. |
| 341 | */ |
| 342 | mb(); |
| 343 | |
| 344 | clk_disable(mehci->sys_clk); |
| 345 | clk_disable(mehci->hsic_clk); |
| 346 | clk_disable(mehci->cal_clk); |
| 347 | clk_disable(mehci->ahb_clk); |
| 348 | |
| 349 | atomic_set(&mehci->in_lpm, 1); |
| 350 | enable_irq(hcd->irq); |
| 351 | wake_unlock(&mehci->wlock); |
| 352 | |
| 353 | dev_info(mehci->dev, "HSIC-USB in low power mode\n"); |
| 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | |
| 358 | static int msm_hsic_resume(struct msm_hsic_hcd *mehci) |
| 359 | { |
| 360 | struct usb_hcd *hcd = hsic_to_hcd(mehci); |
| 361 | int cnt = 0; |
| 362 | unsigned temp; |
| 363 | |
| 364 | if (!atomic_read(&mehci->in_lpm)) { |
| 365 | dev_dbg(mehci->dev, "%s called in !in_lpm\n", __func__); |
| 366 | return 0; |
| 367 | } |
| 368 | |
| 369 | wake_lock(&mehci->wlock); |
| 370 | |
| 371 | clk_enable(mehci->sys_clk); |
| 372 | clk_enable(mehci->hsic_clk); |
| 373 | clk_enable(mehci->cal_clk); |
| 374 | clk_enable(mehci->ahb_clk); |
| 375 | |
| 376 | temp = readl_relaxed(USB_USBCMD); |
| 377 | temp &= ~ASYNC_INTR_CTRL; |
| 378 | temp &= ~ULPI_STP_CTRL; |
| 379 | writel_relaxed(temp, USB_USBCMD); |
| 380 | |
| 381 | if (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD)) |
| 382 | goto skip_phy_resume; |
| 383 | |
| 384 | temp = readl_relaxed(USB_PORTSC) & ~PORTSC_PHCD; |
| 385 | writel_relaxed(temp, USB_PORTSC); |
| 386 | while (cnt < PHY_RESUME_TIMEOUT_USEC) { |
| 387 | if (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD) && |
| 388 | (readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_SYNC_STATE)) |
| 389 | break; |
| 390 | udelay(1); |
| 391 | cnt++; |
| 392 | } |
| 393 | |
| 394 | if (cnt >= PHY_RESUME_TIMEOUT_USEC) { |
| 395 | /* |
| 396 | * This is a fatal error. Reset the link and |
| 397 | * PHY to make hsic working. |
| 398 | */ |
| 399 | dev_err(mehci->dev, "Unable to resume USB. Reset the hsic\n"); |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 400 | msm_hsic_config_gpios(mehci, 0); |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 401 | msm_hsic_reset(mehci); |
| 402 | } |
| 403 | |
| 404 | skip_phy_resume: |
| 405 | |
| 406 | atomic_set(&mehci->in_lpm, 0); |
| 407 | |
| 408 | if (mehci->async_int) { |
| 409 | mehci->async_int = false; |
| 410 | pm_runtime_put_noidle(mehci->dev); |
| 411 | enable_irq(hcd->irq); |
| 412 | } |
| 413 | |
| 414 | dev_info(mehci->dev, "HSIC-USB exited from low power mode\n"); |
| 415 | |
| 416 | return 0; |
| 417 | } |
| 418 | #endif |
| 419 | |
| 420 | static irqreturn_t msm_hsic_irq(struct usb_hcd *hcd) |
| 421 | { |
| 422 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 423 | |
| 424 | if (atomic_read(&mehci->in_lpm)) { |
| 425 | disable_irq_nosync(hcd->irq); |
| 426 | mehci->async_int = true; |
| 427 | pm_runtime_get(mehci->dev); |
| 428 | return IRQ_HANDLED; |
| 429 | } |
| 430 | |
| 431 | return ehci_irq(hcd); |
| 432 | } |
| 433 | |
| 434 | static int ehci_hsic_reset(struct usb_hcd *hcd) |
| 435 | { |
| 436 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 437 | int retval; |
| 438 | |
| 439 | ehci->caps = USB_CAPLENGTH; |
| 440 | ehci->regs = USB_CAPLENGTH + |
| 441 | HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); |
| 442 | dbg_hcs_params(ehci, "reset"); |
| 443 | dbg_hcc_params(ehci, "reset"); |
| 444 | |
| 445 | /* cache the data to minimize the chip reads*/ |
| 446 | ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); |
| 447 | |
| 448 | hcd->has_tt = 1; |
| 449 | ehci->sbrn = HCD_USB2; |
| 450 | |
| 451 | retval = ehci_halt(ehci); |
| 452 | if (retval) |
| 453 | return retval; |
| 454 | |
| 455 | /* data structure init */ |
| 456 | retval = ehci_init(hcd); |
| 457 | if (retval) |
| 458 | return retval; |
| 459 | |
| 460 | retval = ehci_reset(ehci); |
| 461 | if (retval) |
| 462 | return retval; |
| 463 | |
| 464 | /* bursts of unspecified length. */ |
| 465 | writel_relaxed(0, USB_AHBBURST); |
| 466 | /* Use the AHB transactor */ |
| 467 | writel_relaxed(0, USB_AHBMODE); |
| 468 | /* Disable streaming mode and select host mode */ |
| 469 | writel_relaxed(0x13, USB_USBMODE); |
| 470 | |
| 471 | ehci_port_power(ehci, 1); |
| 472 | return 0; |
| 473 | } |
| 474 | |
| 475 | static struct hc_driver msm_hsic_driver = { |
| 476 | .description = hcd_name, |
| 477 | .product_desc = "Qualcomm EHCI Host Controller using HSIC", |
| 478 | .hcd_priv_size = sizeof(struct msm_hsic_hcd), |
| 479 | |
| 480 | /* |
| 481 | * generic hardware linkage |
| 482 | */ |
| 483 | .irq = msm_hsic_irq, |
| 484 | .flags = HCD_USB2 | HCD_MEMORY, |
| 485 | |
| 486 | .reset = ehci_hsic_reset, |
| 487 | .start = ehci_run, |
| 488 | |
| 489 | .stop = ehci_stop, |
| 490 | .shutdown = ehci_shutdown, |
| 491 | |
| 492 | /* |
| 493 | * managing i/o requests and associated device resources |
| 494 | */ |
| 495 | .urb_enqueue = ehci_urb_enqueue, |
| 496 | .urb_dequeue = ehci_urb_dequeue, |
| 497 | .endpoint_disable = ehci_endpoint_disable, |
| 498 | .endpoint_reset = ehci_endpoint_reset, |
| 499 | .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, |
| 500 | |
| 501 | /* |
| 502 | * scheduling support |
| 503 | */ |
| 504 | .get_frame_number = ehci_get_frame, |
| 505 | |
| 506 | /* |
| 507 | * root hub support |
| 508 | */ |
| 509 | .hub_status_data = ehci_hub_status_data, |
| 510 | .hub_control = ehci_hub_control, |
| 511 | .relinquish_port = ehci_relinquish_port, |
| 512 | .port_handed_over = ehci_port_handed_over, |
| 513 | |
| 514 | /* |
| 515 | * PM support |
| 516 | */ |
| 517 | .bus_suspend = ehci_bus_suspend, |
| 518 | .bus_resume = ehci_bus_resume, |
| 519 | }; |
| 520 | |
| 521 | static int msm_hsic_init_clocks(struct msm_hsic_hcd *mehci, u32 init) |
| 522 | { |
| 523 | int ret = 0; |
| 524 | |
| 525 | if (!init) |
| 526 | goto put_clocks; |
| 527 | |
| 528 | /*sys_clk is required for LINK protocol engine,it should be at 60MHz */ |
| 529 | mehci->sys_clk = clk_get(mehci->dev, "usb_hsic_system_clk"); |
| 530 | if (IS_ERR(mehci->sys_clk)) { |
| 531 | dev_err(mehci->dev, "failed to get hsic_sys_clk\n"); |
| 532 | ret = PTR_ERR(mehci->sys_clk); |
| 533 | return ret; |
| 534 | } |
| 535 | clk_set_rate(mehci->sys_clk, 60000000); |
| 536 | |
| 537 | /* 60MHz fs_xcvr_clk is for LINK to be used during PHY RESET */ |
| 538 | mehci->fs_xcvr_clk = clk_get(mehci->dev, "usb_hsic_xcvr_fs_clk"); |
| 539 | if (IS_ERR(mehci->fs_xcvr_clk)) { |
| 540 | dev_err(mehci->dev, "failed to get fs_xcvr_clk\n"); |
| 541 | ret = PTR_ERR(mehci->fs_xcvr_clk); |
| 542 | goto put_sys_clk; |
| 543 | } |
| 544 | clk_set_rate(mehci->fs_xcvr_clk, 60000000); |
| 545 | |
| 546 | /* 480MHz hsic_clk is required for HSIC PHY operation */ |
| 547 | mehci->hsic_clk = clk_get(mehci->dev, "usb_hsic_hsic_clk"); |
| 548 | if (IS_ERR(mehci->hsic_clk)) { |
| 549 | dev_err(mehci->dev, "failed to get hsic_clk\n"); |
| 550 | ret = PTR_ERR(mehci->hsic_clk); |
| 551 | goto put_fs_xcvr_clk; |
| 552 | } |
| 553 | clk_set_rate(mehci->hsic_clk, 480000000); |
| 554 | |
| 555 | /* 10MHz cal_clk is required for calibration of I/O pads */ |
| 556 | mehci->cal_clk = clk_get(mehci->dev, "usb_hsic_hsio_cal_clk"); |
| 557 | if (IS_ERR(mehci->cal_clk)) { |
| 558 | dev_err(mehci->dev, "failed to get hsic_cal_clk\n"); |
| 559 | ret = PTR_ERR(mehci->cal_clk); |
| 560 | goto put_hsic_clk; |
| 561 | } |
| 562 | clk_set_rate(mehci->cal_clk, 10000000); |
| 563 | |
| 564 | /* ahb_clk is required for data transfers */ |
| 565 | mehci->ahb_clk = clk_get(mehci->dev, "usb_hsic_p_clk"); |
| 566 | if (IS_ERR(mehci->ahb_clk)) { |
| 567 | dev_err(mehci->dev, "failed to get hsic_ahb_clk\n"); |
| 568 | ret = PTR_ERR(mehci->ahb_clk); |
| 569 | goto put_cal_clk; |
| 570 | } |
| 571 | |
| 572 | clk_enable(mehci->sys_clk); |
| 573 | clk_enable(mehci->hsic_clk); |
| 574 | clk_enable(mehci->cal_clk); |
| 575 | clk_enable(mehci->ahb_clk); |
| 576 | |
| 577 | return 0; |
| 578 | |
| 579 | put_clocks: |
| 580 | clk_disable(mehci->sys_clk); |
| 581 | clk_disable(mehci->hsic_clk); |
| 582 | clk_disable(mehci->cal_clk); |
| 583 | clk_disable(mehci->ahb_clk); |
| 584 | clk_put(mehci->ahb_clk); |
| 585 | put_cal_clk: |
| 586 | clk_put(mehci->cal_clk); |
| 587 | put_hsic_clk: |
| 588 | clk_put(mehci->hsic_clk); |
| 589 | put_fs_xcvr_clk: |
| 590 | clk_put(mehci->fs_xcvr_clk); |
| 591 | put_sys_clk: |
| 592 | clk_put(mehci->sys_clk); |
| 593 | |
| 594 | return ret; |
| 595 | } |
| 596 | static int __devinit ehci_hsic_msm_probe(struct platform_device *pdev) |
| 597 | { |
| 598 | struct usb_hcd *hcd; |
| 599 | struct resource *res; |
| 600 | struct msm_hsic_hcd *mehci; |
| 601 | int ret; |
| 602 | |
| 603 | dev_dbg(&pdev->dev, "ehci_msm-hsic probe\n"); |
| 604 | |
| 605 | hcd = usb_create_hcd(&msm_hsic_driver, &pdev->dev, |
| 606 | dev_name(&pdev->dev)); |
| 607 | if (!hcd) { |
| 608 | dev_err(&pdev->dev, "Unable to create HCD\n"); |
| 609 | return -ENOMEM; |
| 610 | } |
| 611 | |
| 612 | hcd->irq = platform_get_irq(pdev, 0); |
| 613 | if (hcd->irq < 0) { |
| 614 | dev_err(&pdev->dev, "Unable to get IRQ resource\n"); |
| 615 | ret = hcd->irq; |
| 616 | goto put_hcd; |
| 617 | } |
| 618 | |
| 619 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 620 | if (!res) { |
| 621 | dev_err(&pdev->dev, "Unable to get memory resource\n"); |
| 622 | ret = -ENODEV; |
| 623 | goto put_hcd; |
| 624 | } |
| 625 | |
| 626 | hcd->rsrc_start = res->start; |
| 627 | hcd->rsrc_len = resource_size(res); |
| 628 | hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
| 629 | if (!hcd->regs) { |
| 630 | dev_err(&pdev->dev, "ioremap failed\n"); |
| 631 | ret = -ENOMEM; |
| 632 | goto put_hcd; |
| 633 | } |
| 634 | |
| 635 | mehci = hcd_to_hsic(hcd); |
| 636 | mehci->dev = &pdev->dev; |
| 637 | |
| 638 | ret = msm_hsic_init_clocks(mehci, 1); |
| 639 | if (ret) { |
| 640 | dev_err(&pdev->dev, "unable to initialize clocks\n"); |
| 641 | ret = -ENODEV; |
| 642 | goto unmap; |
| 643 | } |
| 644 | |
| 645 | ret = msm_hsic_init_vddcx(mehci, 1); |
| 646 | if (ret) { |
| 647 | dev_err(&pdev->dev, "unable to initialize VDDCX\n"); |
| 648 | ret = -ENODEV; |
| 649 | goto deinit_clocks; |
| 650 | } |
| 651 | |
| 652 | ret = msm_hsic_reset(mehci); |
| 653 | if (ret) { |
| 654 | dev_err(&pdev->dev, "unable to initialize PHY\n"); |
| 655 | goto deinit_vddcx; |
| 656 | } |
| 657 | |
| 658 | ret = usb_add_hcd(hcd, hcd->irq, IRQF_SHARED); |
| 659 | if (ret) { |
| 660 | dev_err(&pdev->dev, "unable to register HCD\n"); |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 661 | goto unconfig_gpio; |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 662 | } |
| 663 | |
| 664 | device_init_wakeup(&pdev->dev, 1); |
| 665 | wake_lock_init(&mehci->wlock, WAKE_LOCK_SUSPEND, dev_name(&pdev->dev)); |
| 666 | wake_lock(&mehci->wlock); |
| 667 | /* |
| 668 | * This pdev->dev is assigned parent of root-hub by USB core, |
| 669 | * hence, runtime framework automatically calls this driver's |
| 670 | * runtime APIs based on root-hub's state. |
| 671 | */ |
| 672 | pm_runtime_set_active(&pdev->dev); |
| 673 | pm_runtime_enable(&pdev->dev); |
| 674 | |
| 675 | return 0; |
| 676 | |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 677 | unconfig_gpio: |
| 678 | msm_hsic_config_gpios(mehci, 0); |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 679 | deinit_vddcx: |
| 680 | msm_hsic_init_vddcx(mehci, 0); |
| 681 | deinit_clocks: |
| 682 | msm_hsic_init_clocks(mehci, 0); |
| 683 | unmap: |
| 684 | iounmap(hcd->regs); |
| 685 | put_hcd: |
| 686 | usb_put_hcd(hcd); |
| 687 | |
| 688 | return ret; |
| 689 | } |
| 690 | |
| 691 | static int __devexit ehci_hsic_msm_remove(struct platform_device *pdev) |
| 692 | { |
| 693 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
| 694 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 695 | |
| 696 | device_init_wakeup(&pdev->dev, 0); |
| 697 | pm_runtime_disable(&pdev->dev); |
| 698 | pm_runtime_set_suspended(&pdev->dev); |
| 699 | |
| 700 | usb_remove_hcd(hcd); |
Vijayavardhan Vennapusa | e3316a1 | 2011-10-15 06:05:17 +0530 | [diff] [blame^] | 701 | msm_hsic_config_gpios(mehci, 0); |
Vijayavardhan Vennapusa | 39025fe | 2011-10-15 05:55:10 +0530 | [diff] [blame] | 702 | msm_hsic_init_vddcx(mehci, 0); |
| 703 | |
| 704 | msm_hsic_init_clocks(mehci, 0); |
| 705 | wake_lock_destroy(&mehci->wlock); |
| 706 | iounmap(hcd->regs); |
| 707 | usb_put_hcd(hcd); |
| 708 | |
| 709 | return 0; |
| 710 | } |
| 711 | |
| 712 | #ifdef CONFIG_PM_SLEEP |
| 713 | static int msm_hsic_pm_suspend(struct device *dev) |
| 714 | { |
| 715 | struct usb_hcd *hcd = dev_get_drvdata(dev); |
| 716 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 717 | |
| 718 | dev_dbg(dev, "ehci-msm-hsic PM suspend\n"); |
| 719 | |
| 720 | if (device_may_wakeup(dev)) |
| 721 | enable_irq_wake(hcd->irq); |
| 722 | |
| 723 | return msm_hsic_suspend(mehci); |
| 724 | |
| 725 | } |
| 726 | |
| 727 | static int msm_hsic_pm_resume(struct device *dev) |
| 728 | { |
| 729 | int ret; |
| 730 | struct usb_hcd *hcd = dev_get_drvdata(dev); |
| 731 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 732 | |
| 733 | dev_dbg(dev, "ehci-msm-hsic PM resume\n"); |
| 734 | |
| 735 | if (device_may_wakeup(dev)) |
| 736 | disable_irq_wake(hcd->irq); |
| 737 | |
| 738 | ret = msm_hsic_resume(mehci); |
| 739 | if (ret) |
| 740 | return ret; |
| 741 | |
| 742 | /* Bring the device to full powered state upon system resume */ |
| 743 | pm_runtime_disable(dev); |
| 744 | pm_runtime_set_active(dev); |
| 745 | pm_runtime_enable(dev); |
| 746 | |
| 747 | return 0; |
| 748 | } |
| 749 | #endif |
| 750 | |
| 751 | #ifdef CONFIG_PM_RUNTIME |
| 752 | static int msm_hsic_runtime_idle(struct device *dev) |
| 753 | { |
| 754 | dev_dbg(dev, "EHCI runtime idle\n"); |
| 755 | |
| 756 | return 0; |
| 757 | } |
| 758 | |
| 759 | static int msm_hsic_runtime_suspend(struct device *dev) |
| 760 | { |
| 761 | struct usb_hcd *hcd = dev_get_drvdata(dev); |
| 762 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 763 | |
| 764 | dev_dbg(dev, "EHCI runtime suspend\n"); |
| 765 | return msm_hsic_suspend(mehci); |
| 766 | } |
| 767 | |
| 768 | static int msm_hsic_runtime_resume(struct device *dev) |
| 769 | { |
| 770 | struct usb_hcd *hcd = dev_get_drvdata(dev); |
| 771 | struct msm_hsic_hcd *mehci = hcd_to_hsic(hcd); |
| 772 | |
| 773 | dev_dbg(dev, "EHCI runtime resume\n"); |
| 774 | return msm_hsic_resume(mehci); |
| 775 | } |
| 776 | #endif |
| 777 | |
| 778 | #ifdef CONFIG_PM |
| 779 | static const struct dev_pm_ops msm_hsic_dev_pm_ops = { |
| 780 | SET_SYSTEM_SLEEP_PM_OPS(msm_hsic_pm_suspend, msm_hsic_pm_resume) |
| 781 | SET_RUNTIME_PM_OPS(msm_hsic_runtime_suspend, msm_hsic_runtime_resume, |
| 782 | msm_hsic_runtime_idle) |
| 783 | }; |
| 784 | #endif |
| 785 | |
| 786 | static struct platform_driver ehci_msm_hsic_driver = { |
| 787 | .probe = ehci_hsic_msm_probe, |
| 788 | .remove = __devexit_p(ehci_hsic_msm_remove), |
| 789 | .driver = { |
| 790 | .name = "msm_hsic_host", |
| 791 | #ifdef CONFIG_PM |
| 792 | .pm = &msm_hsic_dev_pm_ops, |
| 793 | #endif |
| 794 | }, |
| 795 | }; |