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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/edb7312.c
3 *
4 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
5 *
6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
8 *
9 * $Id: edb7312.c,v 1.11 2004/11/04 12:53:10 gleixner Exp $
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 * Overview:
16 * This is a device driver for the NAND flash device found on the
17 * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
18 * a 64Mibit (8MiB x 8 bits) NAND flash device.
19 */
20
21#include <linux/slab.h>
22#include <linux/module.h>
23#include <linux/init.h>
24#include <linux/mtd/mtd.h>
25#include <linux/mtd/nand.h>
26#include <linux/mtd/partitions.h>
27#include <asm/io.h>
28#include <asm/arch/hardware.h> /* for CLPS7111_VIRT_BASE */
29#include <asm/sizes.h>
30#include <asm/hardware/clps7111.h>
31
32/*
33 * MTD structure for EDB7312 board
34 */
35static struct mtd_info *ep7312_mtd = NULL;
36
37/*
38 * Values specific to the EDB7312 board (used with EP7312 processor)
39 */
40#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
41#define EP7312_PXDR 0x0001 /*
42 * IO offset to Port B data register
43 * where the CLE, ALE and NCE pins
44 * are wired to.
45 */
46#define EP7312_PXDDR 0x0041 /*
47 * IO offset to Port B data direction
48 * register so we can control the IO
49 * lines.
50 */
51
52/*
53 * Module stuff
54 */
55
56static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
57static void __iomem * ep7312_pxdr = (void __iomem *) EP7312_PXDR;
58static void __iomem * ep7312_pxddr = (void __iomem *) EP7312_PXDDR;
59
60#ifdef CONFIG_MTD_PARTITIONS
61/*
62 * Define static partitions for flash device
63 */
64static struct mtd_partition partition_info[] = {
65 { .name = "EP7312 Nand Flash",
66 .offset = 0,
67 .size = 8*1024*1024 }
68};
69#define NUM_PARTITIONS 1
70
71#endif
72
73
74/*
75 * hardware specific access to control-lines
76 */
77static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd)
78{
79 switch(cmd) {
80
81 case NAND_CTL_SETCLE:
82 clps_writeb(clps_readb(ep7312_pxdr) | 0x10, ep7312_pxdr);
83 break;
84 case NAND_CTL_CLRCLE:
85 clps_writeb(clps_readb(ep7312_pxdr) & ~0x10, ep7312_pxdr);
86 break;
87
88 case NAND_CTL_SETALE:
89 clps_writeb(clps_readb(ep7312_pxdr) | 0x20, ep7312_pxdr);
90 break;
91 case NAND_CTL_CLRALE:
92 clps_writeb(clps_readb(ep7312_pxdr) & ~0x20, ep7312_pxdr);
93 break;
94
95 case NAND_CTL_SETNCE:
96 clps_writeb((clps_readb(ep7312_pxdr) | 0x80) & ~0x40, ep7312_pxdr);
97 break;
98 case NAND_CTL_CLRNCE:
99 clps_writeb((clps_readb(ep7312_pxdr) | 0x80) | 0x40, ep7312_pxdr);
100 break;
101 }
102}
103
104/*
105 * read device ready pin
106 */
107static int ep7312_device_ready(struct mtd_info *mtd)
108{
109 return 1;
110}
111#ifdef CONFIG_MTD_PARTITIONS
112const char *part_probes[] = { "cmdlinepart", NULL };
113#endif
114
115/*
116 * Main initialization routine
117 */
118static int __init ep7312_init (void)
119{
120 struct nand_chip *this;
121 const char *part_type = 0;
122 int mtd_parts_nb = 0;
123 struct mtd_partition *mtd_parts = 0;
124 void __iomem * ep7312_fio_base;
125
126 /* Allocate memory for MTD device structure and private data */
127 ep7312_mtd = kmalloc(sizeof(struct mtd_info) +
128 sizeof(struct nand_chip),
129 GFP_KERNEL);
130 if (!ep7312_mtd) {
131 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
132 return -ENOMEM;
133 }
134
135 /* map physical adress */
136 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
137 if(!ep7312_fio_base) {
138 printk("ioremap EDB7312 NAND flash failed\n");
139 kfree(ep7312_mtd);
140 return -EIO;
141 }
142
143 /* Get pointer to private data */
144 this = (struct nand_chip *) (&ep7312_mtd[1]);
145
146 /* Initialize structures */
147 memset((char *) ep7312_mtd, 0, sizeof(struct mtd_info));
148 memset((char *) this, 0, sizeof(struct nand_chip));
149
150 /* Link the private data with the MTD structure */
151 ep7312_mtd->priv = this;
152
153 /*
154 * Set GPIO Port B control register so that the pins are configured
155 * to be outputs for controlling the NAND flash.
156 */
157 clps_writeb(0xf0, ep7312_pxddr);
158
159 /* insert callbacks */
160 this->IO_ADDR_R = ep7312_fio_base;
161 this->IO_ADDR_W = ep7312_fio_base;
162 this->hwcontrol = ep7312_hwcontrol;
163 this->dev_ready = ep7312_device_ready;
164 /* 15 us command delay time */
165 this->chip_delay = 15;
166
167 /* Scan to find existence of the device */
168 if (nand_scan (ep7312_mtd, 1)) {
169 iounmap((void *)ep7312_fio_base);
170 kfree (ep7312_mtd);
171 return -ENXIO;
172 }
173
174#ifdef CONFIG_MTD_PARTITIONS
175 ep7312_mtd->name = "edb7312-nand";
176 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes,
177 &mtd_parts, 0);
178 if (mtd_parts_nb > 0)
179 part_type = "command line";
180 else
181 mtd_parts_nb = 0;
182#endif
183 if (mtd_parts_nb == 0) {
184 mtd_parts = partition_info;
185 mtd_parts_nb = NUM_PARTITIONS;
186 part_type = "static";
187 }
188
189 /* Register the partitions */
190 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
191 add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb);
192
193 /* Return happy */
194 return 0;
195}
196module_init(ep7312_init);
197
198/*
199 * Clean up routine
200 */
201static void __exit ep7312_cleanup (void)
202{
203 struct nand_chip *this = (struct nand_chip *) &ep7312_mtd[1];
204
205 /* Release resources, unregister device */
206 nand_release (ap7312_mtd);
207
208 /* Free internal data buffer */
209 kfree (this->data_buf);
210
211 /* Free the MTD device structure */
212 kfree (ep7312_mtd);
213}
214module_exit(ep7312_cleanup);
215
216MODULE_LICENSE("GPL");
217MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
218MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");