blob: 579a0b51696ac560b1768ae445bb8f2084172f8c [file] [log] [blame]
Avi Kivity6aa8b732006-12-10 02:21:36 -08001/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
Nicolas Kaiser9611c182010-10-06 14:23:22 +02008 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
Avi Kivity6aa8b732006-12-10 02:21:36 -08009 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 *
14 * This work is licensed under the terms of the GNU GPL, version 2. See
15 * the COPYING file in the top-level directory.
16 *
17 */
18
Eddie Dong85f455f2007-07-06 12:20:49 +030019#include "irq.h"
Zhang Xiantao1d737c82007-12-14 09:35:10 +080020#include "mmu.h"
Avi Kivitye4956062007-06-28 14:15:57 -040021
Avi Kivityedf88412007-12-16 11:02:48 +020022#include <linux/kvm_host.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080023#include <linux/module.h>
Ahmed S. Darwish9d8f5492007-02-19 14:37:46 +020024#include <linux/kernel.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080025#include <linux/mm.h>
26#include <linux/highmem.h>
Alexey Dobriyane8edc6e2007-05-21 01:22:52 +040027#include <linux/sched.h>
Avi Kivityc7addb92007-09-16 18:58:32 +020028#include <linux/moduleparam.h>
Marcelo Tosatti229456f2009-06-17 09:22:14 -030029#include <linux/ftrace_event.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090030#include <linux/slab.h>
Shane Wangcafd6652010-04-29 12:09:01 -040031#include <linux/tboot.h>
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -030032#include "kvm_cache_regs.h"
Avi Kivity35920a32008-07-03 14:50:12 +030033#include "x86.h"
Avi Kivitye4956062007-06-28 14:15:57 -040034
Avi Kivity6aa8b732006-12-10 02:21:36 -080035#include <asm/io.h>
Anthony Liguori3b3be0d2006-12-13 00:33:43 -080036#include <asm/desc.h>
Eduardo Habkost13673a92008-11-17 19:03:13 -020037#include <asm/vmx.h>
Eduardo Habkost6210e372008-11-17 19:03:16 -020038#include <asm/virtext.h>
Andi Kleena0861c02009-06-08 17:37:09 +080039#include <asm/mce.h>
Dexuan Cui2acf9232010-06-10 11:27:12 +080040#include <asm/i387.h>
41#include <asm/xcr.h>
Gleb Natapovd7cd9792011-10-05 14:01:23 +020042#include <asm/perf_event.h>
Avi Kivity6aa8b732006-12-10 02:21:36 -080043
Marcelo Tosatti229456f2009-06-17 09:22:14 -030044#include "trace.h"
45
Avi Kivity4ecac3f2008-05-13 13:23:38 +030046#define __ex(x) __kvm_handle_fault_on_reboot(x)
Avi Kivity5e520e62011-05-15 10:13:12 -040047#define __ex_clear(x, reg) \
48 ____kvm_handle_fault_on_reboot(x, "xor " reg " , " reg)
Avi Kivity4ecac3f2008-05-13 13:23:38 +030049
Avi Kivity6aa8b732006-12-10 02:21:36 -080050MODULE_AUTHOR("Qumranet");
51MODULE_LICENSE("GPL");
52
Avi Kivity4462d212009-03-23 17:53:37 +020053static int __read_mostly enable_vpid = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020054module_param_named(vpid, enable_vpid, bool, 0444);
Sheng Yang2384d2b2008-01-17 15:14:33 +080055
Avi Kivity4462d212009-03-23 17:53:37 +020056static int __read_mostly flexpriority_enabled = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020057module_param_named(flexpriority, flexpriority_enabled, bool, S_IRUGO);
Avi Kivity4c9fc8e2008-03-24 18:15:14 +020058
Avi Kivity4462d212009-03-23 17:53:37 +020059static int __read_mostly enable_ept = 1;
Avi Kivity736caef2009-03-23 17:39:48 +020060module_param_named(ept, enable_ept, bool, S_IRUGO);
Sheng Yangd56f5462008-04-25 10:13:16 +080061
Nitin A Kamble3a624e22009-06-08 11:34:16 -070062static int __read_mostly enable_unrestricted_guest = 1;
63module_param_named(unrestricted_guest,
64 enable_unrestricted_guest, bool, S_IRUGO);
65
Avi Kivity4462d212009-03-23 17:53:37 +020066static int __read_mostly emulate_invalid_guest_state = 0;
Avi Kivityc1f8bc02009-03-23 15:41:17 +020067module_param(emulate_invalid_guest_state, bool, S_IRUGO);
Mohammed Gamal04fa4d32008-08-17 16:39:48 +030068
Dongxiao Xub923e622010-05-11 18:29:45 +080069static int __read_mostly vmm_exclusive = 1;
70module_param(vmm_exclusive, bool, S_IRUGO);
71
Anthony Liguori443381a2010-12-06 10:53:38 -060072static int __read_mostly yield_on_hlt = 1;
73module_param(yield_on_hlt, bool, S_IRUGO);
74
Kevin Tian58fbbf22011-08-30 13:56:17 +030075static int __read_mostly fasteoi = 1;
76module_param(fasteoi, bool, S_IRUGO);
77
Nadav Har'El801d3422011-05-25 23:02:23 +030078/*
79 * If nested=1, nested virtualization is supported, i.e., guests may use
80 * VMX and be a hypervisor for its own guests. If nested=0, guests may not
81 * use VMX instructions.
82 */
83static int __read_mostly nested = 0;
84module_param(nested, bool, S_IRUGO);
85
Avi Kivitycdc0e242009-12-06 17:21:14 +020086#define KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST \
87 (X86_CR0_WP | X86_CR0_NE | X86_CR0_NW | X86_CR0_CD)
88#define KVM_GUEST_CR0_MASK \
89 (KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
90#define KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST \
Avi Kivity81231c62010-01-24 16:26:40 +020091 (X86_CR0_WP | X86_CR0_NE)
Avi Kivitycdc0e242009-12-06 17:21:14 +020092#define KVM_VM_CR0_ALWAYS_ON \
93 (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | X86_CR0_PG | X86_CR0_PE)
Avi Kivity4c386092009-12-07 12:26:18 +020094#define KVM_CR4_GUEST_OWNED_BITS \
95 (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \
96 | X86_CR4_OSXMMEXCPT)
97
Avi Kivitycdc0e242009-12-06 17:21:14 +020098#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
99#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
100
Avi Kivity78ac8b42010-04-08 18:19:35 +0300101#define RMODE_GUEST_OWNED_EFLAGS_BITS (~(X86_EFLAGS_IOPL | X86_EFLAGS_VM))
102
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800103/*
104 * These 2 parameters are used to config the controls for Pause-Loop Exiting:
105 * ple_gap: upper bound on the amount of time between two successive
106 * executions of PAUSE in a loop. Also indicate if ple enabled.
Rik van Riel00c25bc2011-01-04 09:51:33 -0500107 * According to test, this time is usually smaller than 128 cycles.
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800108 * ple_window: upper bound on the amount of time a guest is allowed to execute
109 * in a PAUSE loop. Tests indicate that most spinlocks are held for
110 * less than 2^12 cycles
111 * Time is measured based on a counter that runs at the same rate as the TSC,
112 * refer SDM volume 3b section 21.6.13 & 22.1.3.
113 */
Rik van Riel00c25bc2011-01-04 09:51:33 -0500114#define KVM_VMX_DEFAULT_PLE_GAP 128
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800115#define KVM_VMX_DEFAULT_PLE_WINDOW 4096
116static int ple_gap = KVM_VMX_DEFAULT_PLE_GAP;
117module_param(ple_gap, int, S_IRUGO);
118
119static int ple_window = KVM_VMX_DEFAULT_PLE_WINDOW;
120module_param(ple_window, int, S_IRUGO);
121
Gleb Natapov8bf00a52011-10-05 14:01:22 +0200122#define NR_AUTOLOAD_MSRS 8
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300123#define VMCS02_POOL_SIZE 1
Avi Kivity61d2ef22010-04-28 16:40:38 +0300124
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400125struct vmcs {
126 u32 revision_id;
127 u32 abort;
128 char data[0];
129};
130
Nadav Har'Eld462b812011-05-24 15:26:10 +0300131/*
132 * Track a VMCS that may be loaded on a certain CPU. If it is (cpu!=-1), also
133 * remember whether it was VMLAUNCHed, and maintain a linked list of all VMCSs
134 * loaded on this CPU (so we can clear them if the CPU goes down).
135 */
136struct loaded_vmcs {
137 struct vmcs *vmcs;
138 int cpu;
139 int launched;
140 struct list_head loaded_vmcss_on_cpu_link;
141};
142
Avi Kivity26bb0982009-09-07 11:14:12 +0300143struct shared_msr_entry {
144 unsigned index;
145 u64 data;
Avi Kivityd5696722009-12-02 12:28:47 +0200146 u64 mask;
Avi Kivity26bb0982009-09-07 11:14:12 +0300147};
148
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300149/*
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300150 * struct vmcs12 describes the state that our guest hypervisor (L1) keeps for a
151 * single nested guest (L2), hence the name vmcs12. Any VMX implementation has
152 * a VMCS structure, and vmcs12 is our emulated VMX's VMCS. This structure is
153 * stored in guest memory specified by VMPTRLD, but is opaque to the guest,
154 * which must access it using VMREAD/VMWRITE/VMCLEAR instructions.
155 * More than one of these structures may exist, if L1 runs multiple L2 guests.
156 * nested_vmx_run() will use the data here to build a vmcs02: a VMCS for the
157 * underlying hardware which will be used to run L2.
158 * This structure is packed to ensure that its layout is identical across
159 * machines (necessary for live migration).
160 * If there are changes in this struct, VMCS12_REVISION must be changed.
161 */
Nadav Har'El22bd0352011-05-25 23:05:57 +0300162typedef u64 natural_width;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300163struct __packed vmcs12 {
164 /* According to the Intel spec, a VMCS region must start with the
165 * following two fields. Then follow implementation-specific data.
166 */
167 u32 revision_id;
168 u32 abort;
Nadav Har'El22bd0352011-05-25 23:05:57 +0300169
Nadav Har'El27d6c862011-05-25 23:06:59 +0300170 u32 launch_state; /* set to 0 by VMCLEAR, to 1 by VMLAUNCH */
171 u32 padding[7]; /* room for future expansion */
172
Nadav Har'El22bd0352011-05-25 23:05:57 +0300173 u64 io_bitmap_a;
174 u64 io_bitmap_b;
175 u64 msr_bitmap;
176 u64 vm_exit_msr_store_addr;
177 u64 vm_exit_msr_load_addr;
178 u64 vm_entry_msr_load_addr;
179 u64 tsc_offset;
180 u64 virtual_apic_page_addr;
181 u64 apic_access_addr;
182 u64 ept_pointer;
183 u64 guest_physical_address;
184 u64 vmcs_link_pointer;
185 u64 guest_ia32_debugctl;
186 u64 guest_ia32_pat;
187 u64 guest_ia32_efer;
188 u64 guest_ia32_perf_global_ctrl;
189 u64 guest_pdptr0;
190 u64 guest_pdptr1;
191 u64 guest_pdptr2;
192 u64 guest_pdptr3;
193 u64 host_ia32_pat;
194 u64 host_ia32_efer;
195 u64 host_ia32_perf_global_ctrl;
196 u64 padding64[8]; /* room for future expansion */
197 /*
198 * To allow migration of L1 (complete with its L2 guests) between
199 * machines of different natural widths (32 or 64 bit), we cannot have
200 * unsigned long fields with no explict size. We use u64 (aliased
201 * natural_width) instead. Luckily, x86 is little-endian.
202 */
203 natural_width cr0_guest_host_mask;
204 natural_width cr4_guest_host_mask;
205 natural_width cr0_read_shadow;
206 natural_width cr4_read_shadow;
207 natural_width cr3_target_value0;
208 natural_width cr3_target_value1;
209 natural_width cr3_target_value2;
210 natural_width cr3_target_value3;
211 natural_width exit_qualification;
212 natural_width guest_linear_address;
213 natural_width guest_cr0;
214 natural_width guest_cr3;
215 natural_width guest_cr4;
216 natural_width guest_es_base;
217 natural_width guest_cs_base;
218 natural_width guest_ss_base;
219 natural_width guest_ds_base;
220 natural_width guest_fs_base;
221 natural_width guest_gs_base;
222 natural_width guest_ldtr_base;
223 natural_width guest_tr_base;
224 natural_width guest_gdtr_base;
225 natural_width guest_idtr_base;
226 natural_width guest_dr7;
227 natural_width guest_rsp;
228 natural_width guest_rip;
229 natural_width guest_rflags;
230 natural_width guest_pending_dbg_exceptions;
231 natural_width guest_sysenter_esp;
232 natural_width guest_sysenter_eip;
233 natural_width host_cr0;
234 natural_width host_cr3;
235 natural_width host_cr4;
236 natural_width host_fs_base;
237 natural_width host_gs_base;
238 natural_width host_tr_base;
239 natural_width host_gdtr_base;
240 natural_width host_idtr_base;
241 natural_width host_ia32_sysenter_esp;
242 natural_width host_ia32_sysenter_eip;
243 natural_width host_rsp;
244 natural_width host_rip;
245 natural_width paddingl[8]; /* room for future expansion */
246 u32 pin_based_vm_exec_control;
247 u32 cpu_based_vm_exec_control;
248 u32 exception_bitmap;
249 u32 page_fault_error_code_mask;
250 u32 page_fault_error_code_match;
251 u32 cr3_target_count;
252 u32 vm_exit_controls;
253 u32 vm_exit_msr_store_count;
254 u32 vm_exit_msr_load_count;
255 u32 vm_entry_controls;
256 u32 vm_entry_msr_load_count;
257 u32 vm_entry_intr_info_field;
258 u32 vm_entry_exception_error_code;
259 u32 vm_entry_instruction_len;
260 u32 tpr_threshold;
261 u32 secondary_vm_exec_control;
262 u32 vm_instruction_error;
263 u32 vm_exit_reason;
264 u32 vm_exit_intr_info;
265 u32 vm_exit_intr_error_code;
266 u32 idt_vectoring_info_field;
267 u32 idt_vectoring_error_code;
268 u32 vm_exit_instruction_len;
269 u32 vmx_instruction_info;
270 u32 guest_es_limit;
271 u32 guest_cs_limit;
272 u32 guest_ss_limit;
273 u32 guest_ds_limit;
274 u32 guest_fs_limit;
275 u32 guest_gs_limit;
276 u32 guest_ldtr_limit;
277 u32 guest_tr_limit;
278 u32 guest_gdtr_limit;
279 u32 guest_idtr_limit;
280 u32 guest_es_ar_bytes;
281 u32 guest_cs_ar_bytes;
282 u32 guest_ss_ar_bytes;
283 u32 guest_ds_ar_bytes;
284 u32 guest_fs_ar_bytes;
285 u32 guest_gs_ar_bytes;
286 u32 guest_ldtr_ar_bytes;
287 u32 guest_tr_ar_bytes;
288 u32 guest_interruptibility_info;
289 u32 guest_activity_state;
290 u32 guest_sysenter_cs;
291 u32 host_ia32_sysenter_cs;
292 u32 padding32[8]; /* room for future expansion */
293 u16 virtual_processor_id;
294 u16 guest_es_selector;
295 u16 guest_cs_selector;
296 u16 guest_ss_selector;
297 u16 guest_ds_selector;
298 u16 guest_fs_selector;
299 u16 guest_gs_selector;
300 u16 guest_ldtr_selector;
301 u16 guest_tr_selector;
302 u16 host_es_selector;
303 u16 host_cs_selector;
304 u16 host_ss_selector;
305 u16 host_ds_selector;
306 u16 host_fs_selector;
307 u16 host_gs_selector;
308 u16 host_tr_selector;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300309};
310
311/*
312 * VMCS12_REVISION is an arbitrary id that should be changed if the content or
313 * layout of struct vmcs12 is changed. MSR_IA32_VMX_BASIC returns this id, and
314 * VMPTRLD verifies that the VMCS region that L1 is loading contains this id.
315 */
316#define VMCS12_REVISION 0x11e57ed0
317
318/*
319 * VMCS12_SIZE is the number of bytes L1 should allocate for the VMXON region
320 * and any VMCS region. Although only sizeof(struct vmcs12) are used by the
321 * current implementation, 4K are reserved to avoid future complications.
322 */
323#define VMCS12_SIZE 0x1000
324
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300325/* Used to remember the last vmcs02 used for some recently used vmcs12s */
326struct vmcs02_list {
327 struct list_head list;
328 gpa_t vmptr;
329 struct loaded_vmcs vmcs02;
330};
331
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300332/*
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300333 * The nested_vmx structure is part of vcpu_vmx, and holds information we need
334 * for correct emulation of VMX (i.e., nested VMX) on this vcpu.
335 */
336struct nested_vmx {
337 /* Has the level1 guest done vmxon? */
338 bool vmxon;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300339
340 /* The guest-physical address of the current VMCS L1 keeps for L2 */
341 gpa_t current_vmptr;
342 /* The host-usable pointer to the above */
343 struct page *current_vmcs12_page;
344 struct vmcs12 *current_vmcs12;
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +0300345
346 /* vmcs02_list cache of VMCSs recently used to run L2 guests */
347 struct list_head vmcs02_pool;
348 int vmcs02_num;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300349 u64 vmcs01_tsc_offset;
Nadav Har'El644d7112011-05-25 23:12:35 +0300350 /* L2 must run next, and mustn't decide to exit to L1. */
351 bool nested_run_pending;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300352 /*
353 * Guest pages referred to in vmcs02 with host-physical pointers, so
354 * we must keep them pinned while L2 runs.
355 */
356 struct page *apic_access_page;
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300357};
358
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400359struct vcpu_vmx {
Rusty Russellfb3f0f52007-07-27 17:16:56 +1000360 struct kvm_vcpu vcpu;
Avi Kivity313dbd42008-07-17 18:04:30 +0300361 unsigned long host_rsp;
Avi Kivity29bd8a72007-09-10 17:27:03 +0300362 u8 fail;
Avi Kivity69c73022011-03-07 15:26:44 +0200363 u8 cpl;
Avi Kivity9d58b932011-03-07 16:52:07 +0200364 bool nmi_known_unmasked;
Avi Kivity51aa01d2010-07-20 14:31:20 +0300365 u32 exit_intr_info;
Avi Kivity1155f762007-11-22 11:30:47 +0200366 u32 idt_vectoring_info;
Avi Kivity6de12732011-03-07 12:51:22 +0200367 ulong rflags;
Avi Kivity26bb0982009-09-07 11:14:12 +0300368 struct shared_msr_entry *guest_msrs;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400369 int nmsrs;
370 int save_nmsrs;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400371#ifdef CONFIG_X86_64
Avi Kivity44ea2b12009-09-06 15:55:37 +0300372 u64 msr_host_kernel_gs_base;
373 u64 msr_guest_kernel_gs_base;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400374#endif
Nadav Har'Eld462b812011-05-24 15:26:10 +0300375 /*
376 * loaded_vmcs points to the VMCS currently used in this vcpu. For a
377 * non-nested (L1) guest, it always points to vmcs01. For a nested
378 * guest (L2), it points to a different VMCS.
379 */
380 struct loaded_vmcs vmcs01;
381 struct loaded_vmcs *loaded_vmcs;
382 bool __launched; /* temporary, used in vmx_vcpu_run */
Avi Kivity61d2ef22010-04-28 16:40:38 +0300383 struct msr_autoload {
384 unsigned nr;
385 struct vmx_msr_entry guest[NR_AUTOLOAD_MSRS];
386 struct vmx_msr_entry host[NR_AUTOLOAD_MSRS];
387 } msr_autoload;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400388 struct {
389 int loaded;
390 u16 fs_sel, gs_sel, ldt_sel;
Laurent Vivier152d3f22007-08-23 16:33:11 +0200391 int gs_ldt_reload_needed;
392 int fs_reload_needed;
Mike Dayd77c26f2007-10-08 09:02:08 -0400393 } host_state;
Avi Kivity9c8cba32007-11-22 11:42:59 +0200394 struct {
Avi Kivity7ffd92c2009-06-09 14:10:45 +0300395 int vm86_active;
Avi Kivity78ac8b42010-04-08 18:19:35 +0300396 ulong save_rflags;
Avi Kivity7ffd92c2009-06-09 14:10:45 +0300397 struct kvm_save_segment {
398 u16 selector;
399 unsigned long base;
400 u32 limit;
401 u32 ar;
402 } tr, es, ds, fs, gs;
Avi Kivity9c8cba32007-11-22 11:42:59 +0200403 } rmode;
Avi Kivity2fb92db2011-04-27 19:42:18 +0300404 struct {
405 u32 bitmask; /* 4 bits per segment (1 bit per field) */
406 struct kvm_save_segment seg[8];
407 } segment_cache;
Sheng Yang2384d2b2008-01-17 15:14:33 +0800408 int vpid;
Mohammed Gamal04fa4d32008-08-17 16:39:48 +0300409 bool emulation_required;
Jan Kiszka3b86cd92008-09-26 09:30:57 +0200410
411 /* Support for vnmi-less CPUs */
412 int soft_vnmi_blocked;
413 ktime_t entry_time;
414 s64 vnmi_blocked_time;
Andi Kleena0861c02009-06-08 17:37:09 +0800415 u32 exit_reason;
Sheng Yang4e47c7a2009-12-18 16:48:47 +0800416
417 bool rdtscp_enabled;
Nadav Har'Elec378ae2011-05-25 23:02:54 +0300418
419 /* Support for a guest hypervisor (nested VMX) */
420 struct nested_vmx nested;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400421};
422
Avi Kivity2fb92db2011-04-27 19:42:18 +0300423enum segment_cache_field {
424 SEG_FIELD_SEL = 0,
425 SEG_FIELD_BASE = 1,
426 SEG_FIELD_LIMIT = 2,
427 SEG_FIELD_AR = 3,
428
429 SEG_FIELD_NR = 4
430};
431
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400432static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
433{
Rusty Russellfb3f0f52007-07-27 17:16:56 +1000434 return container_of(vcpu, struct vcpu_vmx, vcpu);
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400435}
436
Nadav Har'El22bd0352011-05-25 23:05:57 +0300437#define VMCS12_OFFSET(x) offsetof(struct vmcs12, x)
438#define FIELD(number, name) [number] = VMCS12_OFFSET(name)
439#define FIELD64(number, name) [number] = VMCS12_OFFSET(name), \
440 [number##_HIGH] = VMCS12_OFFSET(name)+4
441
442static unsigned short vmcs_field_to_offset_table[] = {
443 FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
444 FIELD(GUEST_ES_SELECTOR, guest_es_selector),
445 FIELD(GUEST_CS_SELECTOR, guest_cs_selector),
446 FIELD(GUEST_SS_SELECTOR, guest_ss_selector),
447 FIELD(GUEST_DS_SELECTOR, guest_ds_selector),
448 FIELD(GUEST_FS_SELECTOR, guest_fs_selector),
449 FIELD(GUEST_GS_SELECTOR, guest_gs_selector),
450 FIELD(GUEST_LDTR_SELECTOR, guest_ldtr_selector),
451 FIELD(GUEST_TR_SELECTOR, guest_tr_selector),
452 FIELD(HOST_ES_SELECTOR, host_es_selector),
453 FIELD(HOST_CS_SELECTOR, host_cs_selector),
454 FIELD(HOST_SS_SELECTOR, host_ss_selector),
455 FIELD(HOST_DS_SELECTOR, host_ds_selector),
456 FIELD(HOST_FS_SELECTOR, host_fs_selector),
457 FIELD(HOST_GS_SELECTOR, host_gs_selector),
458 FIELD(HOST_TR_SELECTOR, host_tr_selector),
459 FIELD64(IO_BITMAP_A, io_bitmap_a),
460 FIELD64(IO_BITMAP_B, io_bitmap_b),
461 FIELD64(MSR_BITMAP, msr_bitmap),
462 FIELD64(VM_EXIT_MSR_STORE_ADDR, vm_exit_msr_store_addr),
463 FIELD64(VM_EXIT_MSR_LOAD_ADDR, vm_exit_msr_load_addr),
464 FIELD64(VM_ENTRY_MSR_LOAD_ADDR, vm_entry_msr_load_addr),
465 FIELD64(TSC_OFFSET, tsc_offset),
466 FIELD64(VIRTUAL_APIC_PAGE_ADDR, virtual_apic_page_addr),
467 FIELD64(APIC_ACCESS_ADDR, apic_access_addr),
468 FIELD64(EPT_POINTER, ept_pointer),
469 FIELD64(GUEST_PHYSICAL_ADDRESS, guest_physical_address),
470 FIELD64(VMCS_LINK_POINTER, vmcs_link_pointer),
471 FIELD64(GUEST_IA32_DEBUGCTL, guest_ia32_debugctl),
472 FIELD64(GUEST_IA32_PAT, guest_ia32_pat),
473 FIELD64(GUEST_IA32_EFER, guest_ia32_efer),
474 FIELD64(GUEST_IA32_PERF_GLOBAL_CTRL, guest_ia32_perf_global_ctrl),
475 FIELD64(GUEST_PDPTR0, guest_pdptr0),
476 FIELD64(GUEST_PDPTR1, guest_pdptr1),
477 FIELD64(GUEST_PDPTR2, guest_pdptr2),
478 FIELD64(GUEST_PDPTR3, guest_pdptr3),
479 FIELD64(HOST_IA32_PAT, host_ia32_pat),
480 FIELD64(HOST_IA32_EFER, host_ia32_efer),
481 FIELD64(HOST_IA32_PERF_GLOBAL_CTRL, host_ia32_perf_global_ctrl),
482 FIELD(PIN_BASED_VM_EXEC_CONTROL, pin_based_vm_exec_control),
483 FIELD(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control),
484 FIELD(EXCEPTION_BITMAP, exception_bitmap),
485 FIELD(PAGE_FAULT_ERROR_CODE_MASK, page_fault_error_code_mask),
486 FIELD(PAGE_FAULT_ERROR_CODE_MATCH, page_fault_error_code_match),
487 FIELD(CR3_TARGET_COUNT, cr3_target_count),
488 FIELD(VM_EXIT_CONTROLS, vm_exit_controls),
489 FIELD(VM_EXIT_MSR_STORE_COUNT, vm_exit_msr_store_count),
490 FIELD(VM_EXIT_MSR_LOAD_COUNT, vm_exit_msr_load_count),
491 FIELD(VM_ENTRY_CONTROLS, vm_entry_controls),
492 FIELD(VM_ENTRY_MSR_LOAD_COUNT, vm_entry_msr_load_count),
493 FIELD(VM_ENTRY_INTR_INFO_FIELD, vm_entry_intr_info_field),
494 FIELD(VM_ENTRY_EXCEPTION_ERROR_CODE, vm_entry_exception_error_code),
495 FIELD(VM_ENTRY_INSTRUCTION_LEN, vm_entry_instruction_len),
496 FIELD(TPR_THRESHOLD, tpr_threshold),
497 FIELD(SECONDARY_VM_EXEC_CONTROL, secondary_vm_exec_control),
498 FIELD(VM_INSTRUCTION_ERROR, vm_instruction_error),
499 FIELD(VM_EXIT_REASON, vm_exit_reason),
500 FIELD(VM_EXIT_INTR_INFO, vm_exit_intr_info),
501 FIELD(VM_EXIT_INTR_ERROR_CODE, vm_exit_intr_error_code),
502 FIELD(IDT_VECTORING_INFO_FIELD, idt_vectoring_info_field),
503 FIELD(IDT_VECTORING_ERROR_CODE, idt_vectoring_error_code),
504 FIELD(VM_EXIT_INSTRUCTION_LEN, vm_exit_instruction_len),
505 FIELD(VMX_INSTRUCTION_INFO, vmx_instruction_info),
506 FIELD(GUEST_ES_LIMIT, guest_es_limit),
507 FIELD(GUEST_CS_LIMIT, guest_cs_limit),
508 FIELD(GUEST_SS_LIMIT, guest_ss_limit),
509 FIELD(GUEST_DS_LIMIT, guest_ds_limit),
510 FIELD(GUEST_FS_LIMIT, guest_fs_limit),
511 FIELD(GUEST_GS_LIMIT, guest_gs_limit),
512 FIELD(GUEST_LDTR_LIMIT, guest_ldtr_limit),
513 FIELD(GUEST_TR_LIMIT, guest_tr_limit),
514 FIELD(GUEST_GDTR_LIMIT, guest_gdtr_limit),
515 FIELD(GUEST_IDTR_LIMIT, guest_idtr_limit),
516 FIELD(GUEST_ES_AR_BYTES, guest_es_ar_bytes),
517 FIELD(GUEST_CS_AR_BYTES, guest_cs_ar_bytes),
518 FIELD(GUEST_SS_AR_BYTES, guest_ss_ar_bytes),
519 FIELD(GUEST_DS_AR_BYTES, guest_ds_ar_bytes),
520 FIELD(GUEST_FS_AR_BYTES, guest_fs_ar_bytes),
521 FIELD(GUEST_GS_AR_BYTES, guest_gs_ar_bytes),
522 FIELD(GUEST_LDTR_AR_BYTES, guest_ldtr_ar_bytes),
523 FIELD(GUEST_TR_AR_BYTES, guest_tr_ar_bytes),
524 FIELD(GUEST_INTERRUPTIBILITY_INFO, guest_interruptibility_info),
525 FIELD(GUEST_ACTIVITY_STATE, guest_activity_state),
526 FIELD(GUEST_SYSENTER_CS, guest_sysenter_cs),
527 FIELD(HOST_IA32_SYSENTER_CS, host_ia32_sysenter_cs),
528 FIELD(CR0_GUEST_HOST_MASK, cr0_guest_host_mask),
529 FIELD(CR4_GUEST_HOST_MASK, cr4_guest_host_mask),
530 FIELD(CR0_READ_SHADOW, cr0_read_shadow),
531 FIELD(CR4_READ_SHADOW, cr4_read_shadow),
532 FIELD(CR3_TARGET_VALUE0, cr3_target_value0),
533 FIELD(CR3_TARGET_VALUE1, cr3_target_value1),
534 FIELD(CR3_TARGET_VALUE2, cr3_target_value2),
535 FIELD(CR3_TARGET_VALUE3, cr3_target_value3),
536 FIELD(EXIT_QUALIFICATION, exit_qualification),
537 FIELD(GUEST_LINEAR_ADDRESS, guest_linear_address),
538 FIELD(GUEST_CR0, guest_cr0),
539 FIELD(GUEST_CR3, guest_cr3),
540 FIELD(GUEST_CR4, guest_cr4),
541 FIELD(GUEST_ES_BASE, guest_es_base),
542 FIELD(GUEST_CS_BASE, guest_cs_base),
543 FIELD(GUEST_SS_BASE, guest_ss_base),
544 FIELD(GUEST_DS_BASE, guest_ds_base),
545 FIELD(GUEST_FS_BASE, guest_fs_base),
546 FIELD(GUEST_GS_BASE, guest_gs_base),
547 FIELD(GUEST_LDTR_BASE, guest_ldtr_base),
548 FIELD(GUEST_TR_BASE, guest_tr_base),
549 FIELD(GUEST_GDTR_BASE, guest_gdtr_base),
550 FIELD(GUEST_IDTR_BASE, guest_idtr_base),
551 FIELD(GUEST_DR7, guest_dr7),
552 FIELD(GUEST_RSP, guest_rsp),
553 FIELD(GUEST_RIP, guest_rip),
554 FIELD(GUEST_RFLAGS, guest_rflags),
555 FIELD(GUEST_PENDING_DBG_EXCEPTIONS, guest_pending_dbg_exceptions),
556 FIELD(GUEST_SYSENTER_ESP, guest_sysenter_esp),
557 FIELD(GUEST_SYSENTER_EIP, guest_sysenter_eip),
558 FIELD(HOST_CR0, host_cr0),
559 FIELD(HOST_CR3, host_cr3),
560 FIELD(HOST_CR4, host_cr4),
561 FIELD(HOST_FS_BASE, host_fs_base),
562 FIELD(HOST_GS_BASE, host_gs_base),
563 FIELD(HOST_TR_BASE, host_tr_base),
564 FIELD(HOST_GDTR_BASE, host_gdtr_base),
565 FIELD(HOST_IDTR_BASE, host_idtr_base),
566 FIELD(HOST_IA32_SYSENTER_ESP, host_ia32_sysenter_esp),
567 FIELD(HOST_IA32_SYSENTER_EIP, host_ia32_sysenter_eip),
568 FIELD(HOST_RSP, host_rsp),
569 FIELD(HOST_RIP, host_rip),
570};
571static const int max_vmcs_field = ARRAY_SIZE(vmcs_field_to_offset_table);
572
573static inline short vmcs_field_to_offset(unsigned long field)
574{
575 if (field >= max_vmcs_field || vmcs_field_to_offset_table[field] == 0)
576 return -1;
577 return vmcs_field_to_offset_table[field];
578}
579
Nadav Har'Ela9d30f32011-05-25 23:03:55 +0300580static inline struct vmcs12 *get_vmcs12(struct kvm_vcpu *vcpu)
581{
582 return to_vmx(vcpu)->nested.current_vmcs12;
583}
584
585static struct page *nested_get_page(struct kvm_vcpu *vcpu, gpa_t addr)
586{
587 struct page *page = gfn_to_page(vcpu->kvm, addr >> PAGE_SHIFT);
588 if (is_error_page(page)) {
589 kvm_release_page_clean(page);
590 return NULL;
591 }
592 return page;
593}
594
595static void nested_release_page(struct page *page)
596{
597 kvm_release_page_dirty(page);
598}
599
600static void nested_release_page_clean(struct page *page)
601{
602 kvm_release_page_clean(page);
603}
604
Sheng Yang4e1096d2008-07-06 19:16:51 +0800605static u64 construct_eptp(unsigned long root_hpa);
Dongxiao Xu4610c9c2010-05-11 18:29:48 +0800606static void kvm_cpu_vmxon(u64 addr);
607static void kvm_cpu_vmxoff(void);
Avi Kivityaff48ba2010-12-05 18:56:11 +0200608static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
Gleb Natapov776e58e2011-03-13 12:34:27 +0200609static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr);
Avi Kivity75880a02007-06-20 11:20:04 +0300610
Avi Kivity6aa8b732006-12-10 02:21:36 -0800611static DEFINE_PER_CPU(struct vmcs *, vmxarea);
612static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
Nadav Har'Eld462b812011-05-24 15:26:10 +0300613/*
614 * We maintain a per-CPU linked-list of VMCS loaded on that CPU. This is needed
615 * when a CPU is brought down, and we need to VMCLEAR all VMCSs loaded on it.
616 */
617static DEFINE_PER_CPU(struct list_head, loaded_vmcss_on_cpu);
Avi Kivity3444d7d2010-07-26 18:32:38 +0300618static DEFINE_PER_CPU(struct desc_ptr, host_gdt);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800619
Avi Kivity3e7c73e2009-02-24 21:46:19 +0200620static unsigned long *vmx_io_bitmap_a;
621static unsigned long *vmx_io_bitmap_b;
Avi Kivity58972972009-02-24 22:26:47 +0200622static unsigned long *vmx_msr_bitmap_legacy;
623static unsigned long *vmx_msr_bitmap_longmode;
He, Qingfdef3ad2007-04-30 09:45:24 +0300624
Avi Kivity110312c2010-12-21 12:54:20 +0200625static bool cpu_has_load_ia32_efer;
Gleb Natapov8bf00a52011-10-05 14:01:22 +0200626static bool cpu_has_load_perf_global_ctrl;
Avi Kivity110312c2010-12-21 12:54:20 +0200627
Sheng Yang2384d2b2008-01-17 15:14:33 +0800628static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
629static DEFINE_SPINLOCK(vmx_vpid_lock);
630
Yang, Sheng1c3d14f2007-07-29 11:07:42 +0300631static struct vmcs_config {
Avi Kivity6aa8b732006-12-10 02:21:36 -0800632 int size;
633 int order;
634 u32 revision_id;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +0300635 u32 pin_based_exec_ctrl;
636 u32 cpu_based_exec_ctrl;
Sheng Yangf78e0e22007-10-29 09:40:42 +0800637 u32 cpu_based_2nd_exec_ctrl;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +0300638 u32 vmexit_ctrl;
639 u32 vmentry_ctrl;
640} vmcs_config;
Avi Kivity6aa8b732006-12-10 02:21:36 -0800641
Hannes Ederefff9e52008-11-28 17:02:06 +0100642static struct vmx_capability {
Sheng Yangd56f5462008-04-25 10:13:16 +0800643 u32 ept;
644 u32 vpid;
645} vmx_capability;
646
Avi Kivity6aa8b732006-12-10 02:21:36 -0800647#define VMX_SEGMENT_FIELD(seg) \
648 [VCPU_SREG_##seg] = { \
649 .selector = GUEST_##seg##_SELECTOR, \
650 .base = GUEST_##seg##_BASE, \
651 .limit = GUEST_##seg##_LIMIT, \
652 .ar_bytes = GUEST_##seg##_AR_BYTES, \
653 }
654
655static struct kvm_vmx_segment_field {
656 unsigned selector;
657 unsigned base;
658 unsigned limit;
659 unsigned ar_bytes;
660} kvm_vmx_segment_fields[] = {
661 VMX_SEGMENT_FIELD(CS),
662 VMX_SEGMENT_FIELD(DS),
663 VMX_SEGMENT_FIELD(ES),
664 VMX_SEGMENT_FIELD(FS),
665 VMX_SEGMENT_FIELD(GS),
666 VMX_SEGMENT_FIELD(SS),
667 VMX_SEGMENT_FIELD(TR),
668 VMX_SEGMENT_FIELD(LDTR),
669};
670
Avi Kivity26bb0982009-09-07 11:14:12 +0300671static u64 host_efer;
672
Avi Kivity6de4f3a2009-05-31 22:58:47 +0300673static void ept_save_pdptrs(struct kvm_vcpu *vcpu);
674
Avi Kivity4d56c8a2007-04-19 14:28:44 +0300675/*
Brian Gerst8c065852010-07-17 09:03:26 -0400676 * Keep MSR_STAR at the end, as setup_msrs() will try to optimize it
Avi Kivity4d56c8a2007-04-19 14:28:44 +0300677 * away by decrementing the array size.
678 */
Avi Kivity6aa8b732006-12-10 02:21:36 -0800679static const u32 vmx_msr_index[] = {
Avi Kivity05b3e0c2006-12-13 00:33:45 -0800680#ifdef CONFIG_X86_64
Avi Kivity44ea2b12009-09-06 15:55:37 +0300681 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800682#endif
Brian Gerst8c065852010-07-17 09:03:26 -0400683 MSR_EFER, MSR_TSC_AUX, MSR_STAR,
Avi Kivity6aa8b732006-12-10 02:21:36 -0800684};
Ahmed S. Darwish9d8f5492007-02-19 14:37:46 +0200685#define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800686
Gui Jianfeng31299942010-03-15 17:29:09 +0800687static inline bool is_page_fault(u32 intr_info)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800688{
689 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
690 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100691 (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800692}
693
Gui Jianfeng31299942010-03-15 17:29:09 +0800694static inline bool is_no_device(u32 intr_info)
Anthony Liguori2ab455c2007-04-27 09:29:49 +0300695{
696 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
697 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100698 (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
Anthony Liguori2ab455c2007-04-27 09:29:49 +0300699}
700
Gui Jianfeng31299942010-03-15 17:29:09 +0800701static inline bool is_invalid_opcode(u32 intr_info)
Anthony Liguori7aa81cc2007-09-17 14:57:50 -0500702{
703 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
704 INTR_INFO_VALID_MASK)) ==
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +0100705 (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -0500706}
707
Gui Jianfeng31299942010-03-15 17:29:09 +0800708static inline bool is_external_interrupt(u32 intr_info)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800709{
710 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
711 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
712}
713
Gui Jianfeng31299942010-03-15 17:29:09 +0800714static inline bool is_machine_check(u32 intr_info)
Andi Kleena0861c02009-06-08 17:37:09 +0800715{
716 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
717 INTR_INFO_VALID_MASK)) ==
718 (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
719}
720
Gui Jianfeng31299942010-03-15 17:29:09 +0800721static inline bool cpu_has_vmx_msr_bitmap(void)
Sheng Yang25c5f222008-03-28 13:18:56 +0800722{
Sheng Yang04547152009-04-01 15:52:31 +0800723 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
Sheng Yang25c5f222008-03-28 13:18:56 +0800724}
725
Gui Jianfeng31299942010-03-15 17:29:09 +0800726static inline bool cpu_has_vmx_tpr_shadow(void)
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800727{
Sheng Yang04547152009-04-01 15:52:31 +0800728 return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800729}
730
Gui Jianfeng31299942010-03-15 17:29:09 +0800731static inline bool vm_need_tpr_shadow(struct kvm *kvm)
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800732{
Sheng Yang04547152009-04-01 15:52:31 +0800733 return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm));
Yang, Sheng6e5d8652007-09-12 18:03:11 +0800734}
735
Gui Jianfeng31299942010-03-15 17:29:09 +0800736static inline bool cpu_has_secondary_exec_ctrls(void)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800737{
Sheng Yang04547152009-04-01 15:52:31 +0800738 return vmcs_config.cpu_based_exec_ctrl &
739 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
Sheng Yangf78e0e22007-10-29 09:40:42 +0800740}
741
Avi Kivity774ead32007-12-26 13:57:04 +0200742static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800743{
Sheng Yang04547152009-04-01 15:52:31 +0800744 return vmcs_config.cpu_based_2nd_exec_ctrl &
745 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
746}
747
748static inline bool cpu_has_vmx_flexpriority(void)
749{
750 return cpu_has_vmx_tpr_shadow() &&
751 cpu_has_vmx_virtualize_apic_accesses();
Sheng Yangf78e0e22007-10-29 09:40:42 +0800752}
753
Marcelo Tosattie7997942009-06-11 12:07:40 -0300754static inline bool cpu_has_vmx_ept_execute_only(void)
755{
Gui Jianfeng31299942010-03-15 17:29:09 +0800756 return vmx_capability.ept & VMX_EPT_EXECUTE_ONLY_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300757}
758
759static inline bool cpu_has_vmx_eptp_uncacheable(void)
760{
Gui Jianfeng31299942010-03-15 17:29:09 +0800761 return vmx_capability.ept & VMX_EPTP_UC_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300762}
763
764static inline bool cpu_has_vmx_eptp_writeback(void)
765{
Gui Jianfeng31299942010-03-15 17:29:09 +0800766 return vmx_capability.ept & VMX_EPTP_WB_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300767}
768
769static inline bool cpu_has_vmx_ept_2m_page(void)
770{
Gui Jianfeng31299942010-03-15 17:29:09 +0800771 return vmx_capability.ept & VMX_EPT_2MB_PAGE_BIT;
Marcelo Tosattie7997942009-06-11 12:07:40 -0300772}
773
Sheng Yang878403b2010-01-05 19:02:29 +0800774static inline bool cpu_has_vmx_ept_1g_page(void)
775{
Gui Jianfeng31299942010-03-15 17:29:09 +0800776 return vmx_capability.ept & VMX_EPT_1GB_PAGE_BIT;
Sheng Yang878403b2010-01-05 19:02:29 +0800777}
778
Sheng Yang4bc9b982010-06-02 14:05:24 +0800779static inline bool cpu_has_vmx_ept_4levels(void)
780{
781 return vmx_capability.ept & VMX_EPT_PAGE_WALK_4_BIT;
782}
783
Gui Jianfeng31299942010-03-15 17:29:09 +0800784static inline bool cpu_has_vmx_invept_individual_addr(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800785{
Gui Jianfeng31299942010-03-15 17:29:09 +0800786 return vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800787}
788
Gui Jianfeng31299942010-03-15 17:29:09 +0800789static inline bool cpu_has_vmx_invept_context(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800790{
Gui Jianfeng31299942010-03-15 17:29:09 +0800791 return vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800792}
793
Gui Jianfeng31299942010-03-15 17:29:09 +0800794static inline bool cpu_has_vmx_invept_global(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800795{
Gui Jianfeng31299942010-03-15 17:29:09 +0800796 return vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800797}
798
Gui Jianfeng518c8ae2010-06-04 08:51:39 +0800799static inline bool cpu_has_vmx_invvpid_single(void)
800{
801 return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
802}
803
Gui Jianfengb9d762f2010-06-07 10:32:29 +0800804static inline bool cpu_has_vmx_invvpid_global(void)
805{
806 return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
807}
808
Gui Jianfeng31299942010-03-15 17:29:09 +0800809static inline bool cpu_has_vmx_ept(void)
Sheng Yangd56f5462008-04-25 10:13:16 +0800810{
Sheng Yang04547152009-04-01 15:52:31 +0800811 return vmcs_config.cpu_based_2nd_exec_ctrl &
812 SECONDARY_EXEC_ENABLE_EPT;
Sheng Yangd56f5462008-04-25 10:13:16 +0800813}
814
Gui Jianfeng31299942010-03-15 17:29:09 +0800815static inline bool cpu_has_vmx_unrestricted_guest(void)
Nitin A Kamble3a624e22009-06-08 11:34:16 -0700816{
817 return vmcs_config.cpu_based_2nd_exec_ctrl &
818 SECONDARY_EXEC_UNRESTRICTED_GUEST;
819}
820
Gui Jianfeng31299942010-03-15 17:29:09 +0800821static inline bool cpu_has_vmx_ple(void)
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +0800822{
823 return vmcs_config.cpu_based_2nd_exec_ctrl &
824 SECONDARY_EXEC_PAUSE_LOOP_EXITING;
825}
826
Gui Jianfeng31299942010-03-15 17:29:09 +0800827static inline bool vm_need_virtualize_apic_accesses(struct kvm *kvm)
Sheng Yangf78e0e22007-10-29 09:40:42 +0800828{
Gui Jianfeng6d3e4352010-01-29 15:36:59 +0800829 return flexpriority_enabled && irqchip_in_kernel(kvm);
Sheng Yangf78e0e22007-10-29 09:40:42 +0800830}
831
Gui Jianfeng31299942010-03-15 17:29:09 +0800832static inline bool cpu_has_vmx_vpid(void)
Sheng Yang2384d2b2008-01-17 15:14:33 +0800833{
Sheng Yang04547152009-04-01 15:52:31 +0800834 return vmcs_config.cpu_based_2nd_exec_ctrl &
835 SECONDARY_EXEC_ENABLE_VPID;
Sheng Yang2384d2b2008-01-17 15:14:33 +0800836}
837
Gui Jianfeng31299942010-03-15 17:29:09 +0800838static inline bool cpu_has_vmx_rdtscp(void)
Sheng Yang4e47c7a2009-12-18 16:48:47 +0800839{
840 return vmcs_config.cpu_based_2nd_exec_ctrl &
841 SECONDARY_EXEC_RDTSCP;
842}
843
Gui Jianfeng31299942010-03-15 17:29:09 +0800844static inline bool cpu_has_virtual_nmis(void)
Sheng Yangf08864b2008-05-15 18:23:25 +0800845{
846 return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
847}
848
Sheng Yangf5f48ee2010-06-30 12:25:15 +0800849static inline bool cpu_has_vmx_wbinvd_exit(void)
850{
851 return vmcs_config.cpu_based_2nd_exec_ctrl &
852 SECONDARY_EXEC_WBINVD_EXITING;
853}
854
Sheng Yang04547152009-04-01 15:52:31 +0800855static inline bool report_flexpriority(void)
856{
857 return flexpriority_enabled;
858}
859
Nadav Har'Elfe3ef052011-05-25 23:10:02 +0300860static inline bool nested_cpu_has(struct vmcs12 *vmcs12, u32 bit)
861{
862 return vmcs12->cpu_based_vm_exec_control & bit;
863}
864
865static inline bool nested_cpu_has2(struct vmcs12 *vmcs12, u32 bit)
866{
867 return (vmcs12->cpu_based_vm_exec_control &
868 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) &&
869 (vmcs12->secondary_vm_exec_control & bit);
870}
871
Nadav Har'El644d7112011-05-25 23:12:35 +0300872static inline bool nested_cpu_has_virtual_nmis(struct vmcs12 *vmcs12,
873 struct kvm_vcpu *vcpu)
874{
875 return vmcs12->pin_based_vm_exec_control & PIN_BASED_VIRTUAL_NMIS;
876}
877
878static inline bool is_exception(u32 intr_info)
879{
880 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
881 == (INTR_TYPE_HARD_EXCEPTION | INTR_INFO_VALID_MASK);
882}
883
884static void nested_vmx_vmexit(struct kvm_vcpu *vcpu);
Nadav Har'El7c177932011-05-25 23:12:04 +0300885static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
886 struct vmcs12 *vmcs12,
887 u32 reason, unsigned long qualification);
888
Rusty Russell8b9cf982007-07-30 16:31:43 +1000889static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
Avi Kivity7725f0b2006-12-13 00:34:01 -0800890{
891 int i;
892
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400893 for (i = 0; i < vmx->nmsrs; ++i)
Avi Kivity26bb0982009-09-07 11:14:12 +0300894 if (vmx_msr_index[vmx->guest_msrs[i].index] == msr)
Eddie Donga75beee2007-05-17 18:55:15 +0300895 return i;
896 return -1;
897}
898
Sheng Yang2384d2b2008-01-17 15:14:33 +0800899static inline void __invvpid(int ext, u16 vpid, gva_t gva)
900{
901 struct {
902 u64 vpid : 16;
903 u64 rsvd : 48;
904 u64 gva;
905 } operand = { vpid, 0, gva };
906
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300907 asm volatile (__ex(ASM_VMX_INVVPID)
Sheng Yang2384d2b2008-01-17 15:14:33 +0800908 /* CF==1 or ZF==1 --> rc = -1 */
909 "; ja 1f ; ud2 ; 1:"
910 : : "a"(&operand), "c"(ext) : "cc", "memory");
911}
912
Sheng Yang14394422008-04-28 12:24:45 +0800913static inline void __invept(int ext, u64 eptp, gpa_t gpa)
914{
915 struct {
916 u64 eptp, gpa;
917 } operand = {eptp, gpa};
918
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300919 asm volatile (__ex(ASM_VMX_INVEPT)
Sheng Yang14394422008-04-28 12:24:45 +0800920 /* CF==1 or ZF==1 --> rc = -1 */
921 "; ja 1f ; ud2 ; 1:\n"
922 : : "a" (&operand), "c" (ext) : "cc", "memory");
923}
924
Avi Kivity26bb0982009-09-07 11:14:12 +0300925static struct shared_msr_entry *find_msr_entry(struct vcpu_vmx *vmx, u32 msr)
Eddie Donga75beee2007-05-17 18:55:15 +0300926{
927 int i;
928
Rusty Russell8b9cf982007-07-30 16:31:43 +1000929 i = __find_msr_index(vmx, msr);
Eddie Donga75beee2007-05-17 18:55:15 +0300930 if (i >= 0)
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -0400931 return &vmx->guest_msrs[i];
Al Viro8b6d44c2007-02-09 16:38:40 +0000932 return NULL;
Avi Kivity7725f0b2006-12-13 00:34:01 -0800933}
934
Avi Kivity6aa8b732006-12-10 02:21:36 -0800935static void vmcs_clear(struct vmcs *vmcs)
936{
937 u64 phys_addr = __pa(vmcs);
938 u8 error;
939
Avi Kivity4ecac3f2008-05-13 13:23:38 +0300940 asm volatile (__ex(ASM_VMX_VMCLEAR_RAX) "; setna %0"
Avi Kivity16d8f722010-12-21 16:51:50 +0200941 : "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800942 : "cc", "memory");
943 if (error)
944 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
945 vmcs, phys_addr);
946}
947
Nadav Har'Eld462b812011-05-24 15:26:10 +0300948static inline void loaded_vmcs_init(struct loaded_vmcs *loaded_vmcs)
949{
950 vmcs_clear(loaded_vmcs->vmcs);
951 loaded_vmcs->cpu = -1;
952 loaded_vmcs->launched = 0;
953}
954
Dongxiao Xu7725b892010-05-11 18:29:38 +0800955static void vmcs_load(struct vmcs *vmcs)
956{
957 u64 phys_addr = __pa(vmcs);
958 u8 error;
959
960 asm volatile (__ex(ASM_VMX_VMPTRLD_RAX) "; setna %0"
Avi Kivity16d8f722010-12-21 16:51:50 +0200961 : "=qm"(error) : "a"(&phys_addr), "m"(phys_addr)
Dongxiao Xu7725b892010-05-11 18:29:38 +0800962 : "cc", "memory");
963 if (error)
Nadav Har'El2844d842011-05-25 23:16:40 +0300964 printk(KERN_ERR "kvm: vmptrld %p/%llx failed\n",
Dongxiao Xu7725b892010-05-11 18:29:38 +0800965 vmcs, phys_addr);
966}
967
Nadav Har'Eld462b812011-05-24 15:26:10 +0300968static void __loaded_vmcs_clear(void *arg)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800969{
Nadav Har'Eld462b812011-05-24 15:26:10 +0300970 struct loaded_vmcs *loaded_vmcs = arg;
Ingo Molnard3b2c332007-01-05 16:36:23 -0800971 int cpu = raw_smp_processor_id();
Avi Kivity6aa8b732006-12-10 02:21:36 -0800972
Nadav Har'Eld462b812011-05-24 15:26:10 +0300973 if (loaded_vmcs->cpu != cpu)
974 return; /* vcpu migration can race with cpu offline */
975 if (per_cpu(current_vmcs, cpu) == loaded_vmcs->vmcs)
Avi Kivity6aa8b732006-12-10 02:21:36 -0800976 per_cpu(current_vmcs, cpu) = NULL;
Nadav Har'Eld462b812011-05-24 15:26:10 +0300977 list_del(&loaded_vmcs->loaded_vmcss_on_cpu_link);
978 loaded_vmcs_init(loaded_vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -0800979}
980
Nadav Har'Eld462b812011-05-24 15:26:10 +0300981static void loaded_vmcs_clear(struct loaded_vmcs *loaded_vmcs)
Avi Kivity8d0be2b2007-02-12 00:54:46 -0800982{
Nadav Har'Eld462b812011-05-24 15:26:10 +0300983 if (loaded_vmcs->cpu != -1)
984 smp_call_function_single(
985 loaded_vmcs->cpu, __loaded_vmcs_clear, loaded_vmcs, 1);
Avi Kivity8d0be2b2007-02-12 00:54:46 -0800986}
987
Gui Jianfeng1760dd42010-06-07 10:33:27 +0800988static inline void vpid_sync_vcpu_single(struct vcpu_vmx *vmx)
Sheng Yang2384d2b2008-01-17 15:14:33 +0800989{
990 if (vmx->vpid == 0)
991 return;
992
Gui Jianfeng518c8ae2010-06-04 08:51:39 +0800993 if (cpu_has_vmx_invvpid_single())
994 __invvpid(VMX_VPID_EXTENT_SINGLE_CONTEXT, vmx->vpid, 0);
Sheng Yang2384d2b2008-01-17 15:14:33 +0800995}
996
Gui Jianfengb9d762f2010-06-07 10:32:29 +0800997static inline void vpid_sync_vcpu_global(void)
998{
999 if (cpu_has_vmx_invvpid_global())
1000 __invvpid(VMX_VPID_EXTENT_ALL_CONTEXT, 0, 0);
1001}
1002
1003static inline void vpid_sync_context(struct vcpu_vmx *vmx)
1004{
1005 if (cpu_has_vmx_invvpid_single())
Gui Jianfeng1760dd42010-06-07 10:33:27 +08001006 vpid_sync_vcpu_single(vmx);
Gui Jianfengb9d762f2010-06-07 10:32:29 +08001007 else
1008 vpid_sync_vcpu_global();
1009}
1010
Sheng Yang14394422008-04-28 12:24:45 +08001011static inline void ept_sync_global(void)
1012{
1013 if (cpu_has_vmx_invept_global())
1014 __invept(VMX_EPT_EXTENT_GLOBAL, 0, 0);
1015}
1016
1017static inline void ept_sync_context(u64 eptp)
1018{
Avi Kivity089d0342009-03-23 18:26:32 +02001019 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08001020 if (cpu_has_vmx_invept_context())
1021 __invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
1022 else
1023 ept_sync_global();
1024 }
1025}
1026
1027static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
1028{
Avi Kivity089d0342009-03-23 18:26:32 +02001029 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08001030 if (cpu_has_vmx_invept_individual_addr())
1031 __invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
1032 eptp, gpa);
1033 else
1034 ept_sync_context(eptp);
1035 }
1036}
1037
Avi Kivity96304212011-05-15 10:13:13 -04001038static __always_inline unsigned long vmcs_readl(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001039{
Avi Kivity5e520e62011-05-15 10:13:12 -04001040 unsigned long value;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001041
Avi Kivity5e520e62011-05-15 10:13:12 -04001042 asm volatile (__ex_clear(ASM_VMX_VMREAD_RDX_RAX, "%0")
1043 : "=a"(value) : "d"(field) : "cc");
Avi Kivity6aa8b732006-12-10 02:21:36 -08001044 return value;
1045}
1046
Avi Kivity96304212011-05-15 10:13:13 -04001047static __always_inline u16 vmcs_read16(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001048{
1049 return vmcs_readl(field);
1050}
1051
Avi Kivity96304212011-05-15 10:13:13 -04001052static __always_inline u32 vmcs_read32(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001053{
1054 return vmcs_readl(field);
1055}
1056
Avi Kivity96304212011-05-15 10:13:13 -04001057static __always_inline u64 vmcs_read64(unsigned long field)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001058{
Avi Kivity05b3e0c2006-12-13 00:33:45 -08001059#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08001060 return vmcs_readl(field);
1061#else
1062 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
1063#endif
1064}
1065
Avi Kivitye52de1b2007-01-05 16:36:56 -08001066static noinline void vmwrite_error(unsigned long field, unsigned long value)
1067{
1068 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
1069 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
1070 dump_stack();
1071}
1072
Avi Kivity6aa8b732006-12-10 02:21:36 -08001073static void vmcs_writel(unsigned long field, unsigned long value)
1074{
1075 u8 error;
1076
Avi Kivity4ecac3f2008-05-13 13:23:38 +03001077 asm volatile (__ex(ASM_VMX_VMWRITE_RAX_RDX) "; setna %0"
Mike Dayd77c26f2007-10-08 09:02:08 -04001078 : "=q"(error) : "a"(value), "d"(field) : "cc");
Avi Kivitye52de1b2007-01-05 16:36:56 -08001079 if (unlikely(error))
1080 vmwrite_error(field, value);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001081}
1082
1083static void vmcs_write16(unsigned long field, u16 value)
1084{
1085 vmcs_writel(field, value);
1086}
1087
1088static void vmcs_write32(unsigned long field, u32 value)
1089{
1090 vmcs_writel(field, value);
1091}
1092
1093static void vmcs_write64(unsigned long field, u64 value)
1094{
Avi Kivity6aa8b732006-12-10 02:21:36 -08001095 vmcs_writel(field, value);
Avi Kivity7682f2d2008-05-12 19:25:43 +03001096#ifndef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08001097 asm volatile ("");
1098 vmcs_writel(field+1, value >> 32);
1099#endif
1100}
1101
Anthony Liguori2ab455c2007-04-27 09:29:49 +03001102static void vmcs_clear_bits(unsigned long field, u32 mask)
1103{
1104 vmcs_writel(field, vmcs_readl(field) & ~mask);
1105}
1106
1107static void vmcs_set_bits(unsigned long field, u32 mask)
1108{
1109 vmcs_writel(field, vmcs_readl(field) | mask);
1110}
1111
Avi Kivity2fb92db2011-04-27 19:42:18 +03001112static void vmx_segment_cache_clear(struct vcpu_vmx *vmx)
1113{
1114 vmx->segment_cache.bitmask = 0;
1115}
1116
1117static bool vmx_segment_cache_test_set(struct vcpu_vmx *vmx, unsigned seg,
1118 unsigned field)
1119{
1120 bool ret;
1121 u32 mask = 1 << (seg * SEG_FIELD_NR + field);
1122
1123 if (!(vmx->vcpu.arch.regs_avail & (1 << VCPU_EXREG_SEGMENTS))) {
1124 vmx->vcpu.arch.regs_avail |= (1 << VCPU_EXREG_SEGMENTS);
1125 vmx->segment_cache.bitmask = 0;
1126 }
1127 ret = vmx->segment_cache.bitmask & mask;
1128 vmx->segment_cache.bitmask |= mask;
1129 return ret;
1130}
1131
1132static u16 vmx_read_guest_seg_selector(struct vcpu_vmx *vmx, unsigned seg)
1133{
1134 u16 *p = &vmx->segment_cache.seg[seg].selector;
1135
1136 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_SEL))
1137 *p = vmcs_read16(kvm_vmx_segment_fields[seg].selector);
1138 return *p;
1139}
1140
1141static ulong vmx_read_guest_seg_base(struct vcpu_vmx *vmx, unsigned seg)
1142{
1143 ulong *p = &vmx->segment_cache.seg[seg].base;
1144
1145 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_BASE))
1146 *p = vmcs_readl(kvm_vmx_segment_fields[seg].base);
1147 return *p;
1148}
1149
1150static u32 vmx_read_guest_seg_limit(struct vcpu_vmx *vmx, unsigned seg)
1151{
1152 u32 *p = &vmx->segment_cache.seg[seg].limit;
1153
1154 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_LIMIT))
1155 *p = vmcs_read32(kvm_vmx_segment_fields[seg].limit);
1156 return *p;
1157}
1158
1159static u32 vmx_read_guest_seg_ar(struct vcpu_vmx *vmx, unsigned seg)
1160{
1161 u32 *p = &vmx->segment_cache.seg[seg].ar;
1162
1163 if (!vmx_segment_cache_test_set(vmx, seg, SEG_FIELD_AR))
1164 *p = vmcs_read32(kvm_vmx_segment_fields[seg].ar_bytes);
1165 return *p;
1166}
1167
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001168static void update_exception_bitmap(struct kvm_vcpu *vcpu)
1169{
1170 u32 eb;
1171
Jan Kiszkafd7373c2010-01-20 18:20:20 +01001172 eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR) |
1173 (1u << NM_VECTOR) | (1u << DB_VECTOR);
1174 if ((vcpu->guest_debug &
1175 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)) ==
1176 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP))
1177 eb |= 1u << BP_VECTOR;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03001178 if (to_vmx(vcpu)->rmode.vm86_active)
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001179 eb = ~0;
Avi Kivity089d0342009-03-23 18:26:32 +02001180 if (enable_ept)
Sheng Yang14394422008-04-28 12:24:45 +08001181 eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
Avi Kivity02daab22009-12-30 12:40:26 +02001182 if (vcpu->fpu_active)
1183 eb &= ~(1u << NM_VECTOR);
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001184
1185 /* When we are running a nested L2 guest and L1 specified for it a
1186 * certain exception bitmap, we must trap the same exceptions and pass
1187 * them to L1. When running L2, we will only handle the exceptions
1188 * specified above if L1 did not want them.
1189 */
1190 if (is_guest_mode(vcpu))
1191 eb |= get_vmcs12(vcpu)->exception_bitmap;
1192
Avi Kivityabd3f2d2007-05-02 17:57:40 +03001193 vmcs_write32(EXCEPTION_BITMAP, eb);
1194}
1195
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001196static void clear_atomic_switch_msr_special(unsigned long entry,
1197 unsigned long exit)
1198{
1199 vmcs_clear_bits(VM_ENTRY_CONTROLS, entry);
1200 vmcs_clear_bits(VM_EXIT_CONTROLS, exit);
1201}
1202
Avi Kivity61d2ef22010-04-28 16:40:38 +03001203static void clear_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr)
1204{
1205 unsigned i;
1206 struct msr_autoload *m = &vmx->msr_autoload;
1207
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001208 switch (msr) {
1209 case MSR_EFER:
1210 if (cpu_has_load_ia32_efer) {
1211 clear_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1212 VM_EXIT_LOAD_IA32_EFER);
1213 return;
1214 }
1215 break;
1216 case MSR_CORE_PERF_GLOBAL_CTRL:
1217 if (cpu_has_load_perf_global_ctrl) {
1218 clear_atomic_switch_msr_special(
1219 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1220 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
1221 return;
1222 }
1223 break;
Avi Kivity110312c2010-12-21 12:54:20 +02001224 }
1225
Avi Kivity61d2ef22010-04-28 16:40:38 +03001226 for (i = 0; i < m->nr; ++i)
1227 if (m->guest[i].index == msr)
1228 break;
1229
1230 if (i == m->nr)
1231 return;
1232 --m->nr;
1233 m->guest[i] = m->guest[m->nr];
1234 m->host[i] = m->host[m->nr];
1235 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
1236 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
1237}
1238
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001239static void add_atomic_switch_msr_special(unsigned long entry,
1240 unsigned long exit, unsigned long guest_val_vmcs,
1241 unsigned long host_val_vmcs, u64 guest_val, u64 host_val)
1242{
1243 vmcs_write64(guest_val_vmcs, guest_val);
1244 vmcs_write64(host_val_vmcs, host_val);
1245 vmcs_set_bits(VM_ENTRY_CONTROLS, entry);
1246 vmcs_set_bits(VM_EXIT_CONTROLS, exit);
1247}
1248
Avi Kivity61d2ef22010-04-28 16:40:38 +03001249static void add_atomic_switch_msr(struct vcpu_vmx *vmx, unsigned msr,
1250 u64 guest_val, u64 host_val)
1251{
1252 unsigned i;
1253 struct msr_autoload *m = &vmx->msr_autoload;
1254
Gleb Natapov8bf00a52011-10-05 14:01:22 +02001255 switch (msr) {
1256 case MSR_EFER:
1257 if (cpu_has_load_ia32_efer) {
1258 add_atomic_switch_msr_special(VM_ENTRY_LOAD_IA32_EFER,
1259 VM_EXIT_LOAD_IA32_EFER,
1260 GUEST_IA32_EFER,
1261 HOST_IA32_EFER,
1262 guest_val, host_val);
1263 return;
1264 }
1265 break;
1266 case MSR_CORE_PERF_GLOBAL_CTRL:
1267 if (cpu_has_load_perf_global_ctrl) {
1268 add_atomic_switch_msr_special(
1269 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL,
1270 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL,
1271 GUEST_IA32_PERF_GLOBAL_CTRL,
1272 HOST_IA32_PERF_GLOBAL_CTRL,
1273 guest_val, host_val);
1274 return;
1275 }
1276 break;
Avi Kivity110312c2010-12-21 12:54:20 +02001277 }
1278
Avi Kivity61d2ef22010-04-28 16:40:38 +03001279 for (i = 0; i < m->nr; ++i)
1280 if (m->guest[i].index == msr)
1281 break;
1282
Gleb Natapove7fc6f92011-10-05 14:01:24 +02001283 if (i == NR_AUTOLOAD_MSRS) {
1284 printk_once(KERN_WARNING"Not enough mst switch entries. "
1285 "Can't add msr %x\n", msr);
1286 return;
1287 } else if (i == m->nr) {
Avi Kivity61d2ef22010-04-28 16:40:38 +03001288 ++m->nr;
1289 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, m->nr);
1290 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, m->nr);
1291 }
1292
1293 m->guest[i].index = msr;
1294 m->guest[i].value = guest_val;
1295 m->host[i].index = msr;
1296 m->host[i].value = host_val;
1297}
1298
Avi Kivity33ed6322007-05-02 16:54:03 +03001299static void reload_tss(void)
1300{
Avi Kivity33ed6322007-05-02 16:54:03 +03001301 /*
1302 * VT restores TR but not its size. Useless.
1303 */
Avi Kivityd3591922010-07-26 18:32:39 +03001304 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Avi Kivitya5f61302008-02-20 17:57:21 +02001305 struct desc_struct *descs;
Avi Kivity33ed6322007-05-02 16:54:03 +03001306
Avi Kivityd3591922010-07-26 18:32:39 +03001307 descs = (void *)gdt->address;
Avi Kivity33ed6322007-05-02 16:54:03 +03001308 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
1309 load_TR_desc();
Avi Kivity33ed6322007-05-02 16:54:03 +03001310}
1311
Avi Kivity92c0d902009-10-29 11:00:16 +02001312static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
Eddie Dong2cc51562007-05-21 07:28:09 +03001313{
Roel Kluin3a34a882009-08-04 02:08:45 -07001314 u64 guest_efer;
Avi Kivity51c6cf62007-08-29 03:48:05 +03001315 u64 ignore_bits;
Eddie Dong2cc51562007-05-21 07:28:09 +03001316
Avi Kivityf6801df2010-01-21 15:31:50 +02001317 guest_efer = vmx->vcpu.arch.efer;
Roel Kluin3a34a882009-08-04 02:08:45 -07001318
Avi Kivity51c6cf62007-08-29 03:48:05 +03001319 /*
1320 * NX is emulated; LMA and LME handled by hardware; SCE meaninless
1321 * outside long mode
1322 */
1323 ignore_bits = EFER_NX | EFER_SCE;
1324#ifdef CONFIG_X86_64
1325 ignore_bits |= EFER_LMA | EFER_LME;
1326 /* SCE is meaningful only in long mode on Intel */
1327 if (guest_efer & EFER_LMA)
1328 ignore_bits &= ~(u64)EFER_SCE;
1329#endif
Avi Kivity51c6cf62007-08-29 03:48:05 +03001330 guest_efer &= ~ignore_bits;
1331 guest_efer |= host_efer & ignore_bits;
Avi Kivity26bb0982009-09-07 11:14:12 +03001332 vmx->guest_msrs[efer_offset].data = guest_efer;
Avi Kivityd5696722009-12-02 12:28:47 +02001333 vmx->guest_msrs[efer_offset].mask = ~ignore_bits;
Avi Kivity84ad33e2010-04-28 16:42:29 +03001334
1335 clear_atomic_switch_msr(vmx, MSR_EFER);
1336 /* On ept, can't emulate nx, and must switch nx atomically */
1337 if (enable_ept && ((vmx->vcpu.arch.efer ^ host_efer) & EFER_NX)) {
1338 guest_efer = vmx->vcpu.arch.efer;
1339 if (!(guest_efer & EFER_LMA))
1340 guest_efer &= ~EFER_LME;
1341 add_atomic_switch_msr(vmx, MSR_EFER, guest_efer, host_efer);
1342 return false;
1343 }
1344
Avi Kivity26bb0982009-09-07 11:14:12 +03001345 return true;
Avi Kivity51c6cf62007-08-29 03:48:05 +03001346}
1347
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001348static unsigned long segment_base(u16 selector)
1349{
Avi Kivityd3591922010-07-26 18:32:39 +03001350 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001351 struct desc_struct *d;
1352 unsigned long table_base;
1353 unsigned long v;
1354
1355 if (!(selector & ~3))
1356 return 0;
1357
Avi Kivityd3591922010-07-26 18:32:39 +03001358 table_base = gdt->address;
Gleb Natapov2d49ec72010-02-25 12:43:09 +02001359
1360 if (selector & 4) { /* from ldt */
1361 u16 ldt_selector = kvm_read_ldt();
1362
1363 if (!(ldt_selector & ~3))
1364 return 0;
1365
1366 table_base = segment_base(ldt_selector);
1367 }
1368 d = (struct desc_struct *)(table_base + (selector & ~7));
1369 v = get_desc_base(d);
1370#ifdef CONFIG_X86_64
1371 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
1372 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
1373#endif
1374 return v;
1375}
1376
1377static inline unsigned long kvm_read_tr_base(void)
1378{
1379 u16 tr;
1380 asm("str %0" : "=g"(tr));
1381 return segment_base(tr);
1382}
1383
Avi Kivity04d2cc72007-09-10 18:10:54 +03001384static void vmx_save_host_state(struct kvm_vcpu *vcpu)
Avi Kivity33ed6322007-05-02 16:54:03 +03001385{
Avi Kivity04d2cc72007-09-10 18:10:54 +03001386 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03001387 int i;
Avi Kivity04d2cc72007-09-10 18:10:54 +03001388
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001389 if (vmx->host_state.loaded)
Avi Kivity33ed6322007-05-02 16:54:03 +03001390 return;
1391
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001392 vmx->host_state.loaded = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001393 /*
1394 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1395 * allow segment selectors with cpl > 0 or ti == 1.
1396 */
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001397 vmx->host_state.ldt_sel = kvm_read_ldt();
Laurent Vivier152d3f22007-08-23 16:33:11 +02001398 vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
Avi Kivity9581d442010-10-19 16:46:55 +02001399 savesegment(fs, vmx->host_state.fs_sel);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001400 if (!(vmx->host_state.fs_sel & 7)) {
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001401 vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001402 vmx->host_state.fs_reload_needed = 0;
1403 } else {
Avi Kivity33ed6322007-05-02 16:54:03 +03001404 vmcs_write16(HOST_FS_SELECTOR, 0);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001405 vmx->host_state.fs_reload_needed = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001406 }
Avi Kivity9581d442010-10-19 16:46:55 +02001407 savesegment(gs, vmx->host_state.gs_sel);
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001408 if (!(vmx->host_state.gs_sel & 7))
1409 vmcs_write16(HOST_GS_SELECTOR, vmx->host_state.gs_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001410 else {
1411 vmcs_write16(HOST_GS_SELECTOR, 0);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001412 vmx->host_state.gs_ldt_reload_needed = 1;
Avi Kivity33ed6322007-05-02 16:54:03 +03001413 }
1414
1415#ifdef CONFIG_X86_64
1416 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1417 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1418#else
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001419 vmcs_writel(HOST_FS_BASE, segment_base(vmx->host_state.fs_sel));
1420 vmcs_writel(HOST_GS_BASE, segment_base(vmx->host_state.gs_sel));
Avi Kivity33ed6322007-05-02 16:54:03 +03001421#endif
Avi Kivity707c0872007-05-02 17:33:43 +03001422
1423#ifdef CONFIG_X86_64
Avi Kivityc8770e72010-11-11 12:37:26 +02001424 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
1425 if (is_long_mode(&vmx->vcpu))
Avi Kivity44ea2b12009-09-06 15:55:37 +03001426 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
Avi Kivity707c0872007-05-02 17:33:43 +03001427#endif
Avi Kivity26bb0982009-09-07 11:14:12 +03001428 for (i = 0; i < vmx->save_nmsrs; ++i)
1429 kvm_set_shared_msr(vmx->guest_msrs[i].index,
Avi Kivityd5696722009-12-02 12:28:47 +02001430 vmx->guest_msrs[i].data,
1431 vmx->guest_msrs[i].mask);
Avi Kivity33ed6322007-05-02 16:54:03 +03001432}
1433
Avi Kivitya9b21b62008-06-24 11:48:49 +03001434static void __vmx_load_host_state(struct vcpu_vmx *vmx)
Avi Kivity33ed6322007-05-02 16:54:03 +03001435{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001436 if (!vmx->host_state.loaded)
Avi Kivity33ed6322007-05-02 16:54:03 +03001437 return;
1438
Avi Kivitye1beb1d2007-11-18 13:50:24 +02001439 ++vmx->vcpu.stat.host_state_reload;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001440 vmx->host_state.loaded = 0;
Avi Kivityc8770e72010-11-11 12:37:26 +02001441#ifdef CONFIG_X86_64
1442 if (is_long_mode(&vmx->vcpu))
1443 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
1444#endif
Laurent Vivier152d3f22007-08-23 16:33:11 +02001445 if (vmx->host_state.gs_ldt_reload_needed) {
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001446 kvm_load_ldt(vmx->host_state.ldt_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001447#ifdef CONFIG_X86_64
Avi Kivity9581d442010-10-19 16:46:55 +02001448 load_gs_index(vmx->host_state.gs_sel);
Avi Kivity9581d442010-10-19 16:46:55 +02001449#else
1450 loadsegment(gs, vmx->host_state.gs_sel);
Avi Kivity33ed6322007-05-02 16:54:03 +03001451#endif
Avi Kivity33ed6322007-05-02 16:54:03 +03001452 }
Avi Kivity0a77fe42010-10-19 18:48:35 +02001453 if (vmx->host_state.fs_reload_needed)
1454 loadsegment(fs, vmx->host_state.fs_sel);
Laurent Vivier152d3f22007-08-23 16:33:11 +02001455 reload_tss();
Avi Kivity44ea2b12009-09-06 15:55:37 +03001456#ifdef CONFIG_X86_64
Avi Kivityc8770e72010-11-11 12:37:26 +02001457 wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base);
Avi Kivity44ea2b12009-09-06 15:55:37 +03001458#endif
Avi Kivity1c11e712010-05-03 16:05:44 +03001459 if (current_thread_info()->status & TS_USEDFPU)
1460 clts();
Avi Kivity3444d7d2010-07-26 18:32:38 +03001461 load_gdt(&__get_cpu_var(host_gdt));
Avi Kivity33ed6322007-05-02 16:54:03 +03001462}
1463
Avi Kivitya9b21b62008-06-24 11:48:49 +03001464static void vmx_load_host_state(struct vcpu_vmx *vmx)
1465{
1466 preempt_disable();
1467 __vmx_load_host_state(vmx);
1468 preempt_enable();
1469}
1470
Avi Kivity6aa8b732006-12-10 02:21:36 -08001471/*
1472 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
1473 * vcpu mutex is already taken.
1474 */
Avi Kivity15ad7142007-07-11 18:17:21 +03001475static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001476{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001477 struct vcpu_vmx *vmx = to_vmx(vcpu);
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001478 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
Avi Kivity6aa8b732006-12-10 02:21:36 -08001479
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001480 if (!vmm_exclusive)
1481 kvm_cpu_vmxon(phys_addr);
Nadav Har'Eld462b812011-05-24 15:26:10 +03001482 else if (vmx->loaded_vmcs->cpu != cpu)
1483 loaded_vmcs_clear(vmx->loaded_vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001484
Nadav Har'Eld462b812011-05-24 15:26:10 +03001485 if (per_cpu(current_vmcs, cpu) != vmx->loaded_vmcs->vmcs) {
1486 per_cpu(current_vmcs, cpu) = vmx->loaded_vmcs->vmcs;
1487 vmcs_load(vmx->loaded_vmcs->vmcs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001488 }
1489
Nadav Har'Eld462b812011-05-24 15:26:10 +03001490 if (vmx->loaded_vmcs->cpu != cpu) {
Avi Kivityd3591922010-07-26 18:32:39 +03001491 struct desc_ptr *gdt = &__get_cpu_var(host_gdt);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001492 unsigned long sysenter_esp;
1493
Avi Kivitya8eeb042010-05-10 12:34:53 +03001494 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
Dongxiao Xu92fe13b2010-05-11 18:29:42 +08001495 local_irq_disable();
Nadav Har'Eld462b812011-05-24 15:26:10 +03001496 list_add(&vmx->loaded_vmcs->loaded_vmcss_on_cpu_link,
1497 &per_cpu(loaded_vmcss_on_cpu, cpu));
Dongxiao Xu92fe13b2010-05-11 18:29:42 +08001498 local_irq_enable();
1499
Avi Kivity6aa8b732006-12-10 02:21:36 -08001500 /*
1501 * Linux uses per-cpu TSS and GDT, so set these when switching
1502 * processors.
1503 */
Avi Kivityd6e88ae2008-07-10 16:53:33 +03001504 vmcs_writel(HOST_TR_BASE, kvm_read_tr_base()); /* 22.2.4 */
Avi Kivityd3591922010-07-26 18:32:39 +03001505 vmcs_writel(HOST_GDTR_BASE, gdt->address); /* 22.2.4 */
Avi Kivity6aa8b732006-12-10 02:21:36 -08001506
1507 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
1508 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
Nadav Har'Eld462b812011-05-24 15:26:10 +03001509 vmx->loaded_vmcs->cpu = cpu;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001510 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001511}
1512
1513static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
1514{
Avi Kivitya9b21b62008-06-24 11:48:49 +03001515 __vmx_load_host_state(to_vmx(vcpu));
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001516 if (!vmm_exclusive) {
Nadav Har'Eld462b812011-05-24 15:26:10 +03001517 __loaded_vmcs_clear(to_vmx(vcpu)->loaded_vmcs);
1518 vcpu->cpu = -1;
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08001519 kvm_cpu_vmxoff();
1520 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001521}
1522
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001523static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
1524{
Avi Kivity81231c62010-01-24 16:26:40 +02001525 ulong cr0;
1526
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001527 if (vcpu->fpu_active)
1528 return;
1529 vcpu->fpu_active = 1;
Avi Kivity81231c62010-01-24 16:26:40 +02001530 cr0 = vmcs_readl(GUEST_CR0);
1531 cr0 &= ~(X86_CR0_TS | X86_CR0_MP);
1532 cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP);
1533 vmcs_writel(GUEST_CR0, cr0);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001534 update_exception_bitmap(vcpu);
Avi Kivityedcafe32009-12-30 18:07:40 +02001535 vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS;
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001536 if (is_guest_mode(vcpu))
1537 vcpu->arch.cr0_guest_owned_bits &=
1538 ~get_vmcs12(vcpu)->cr0_guest_host_mask;
Avi Kivityedcafe32009-12-30 18:07:40 +02001539 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001540}
1541
Avi Kivityedcafe32009-12-30 18:07:40 +02001542static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu);
1543
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03001544/*
1545 * Return the cr0 value that a nested guest would read. This is a combination
1546 * of the real cr0 used to run the guest (guest_cr0), and the bits shadowed by
1547 * its hypervisor (cr0_read_shadow).
1548 */
1549static inline unsigned long nested_read_cr0(struct vmcs12 *fields)
1550{
1551 return (fields->guest_cr0 & ~fields->cr0_guest_host_mask) |
1552 (fields->cr0_read_shadow & fields->cr0_guest_host_mask);
1553}
1554static inline unsigned long nested_read_cr4(struct vmcs12 *fields)
1555{
1556 return (fields->guest_cr4 & ~fields->cr4_guest_host_mask) |
1557 (fields->cr4_read_shadow & fields->cr4_guest_host_mask);
1558}
1559
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001560static void vmx_fpu_deactivate(struct kvm_vcpu *vcpu)
1561{
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001562 /* Note that there is no vcpu->fpu_active = 0 here. The caller must
1563 * set this *before* calling this function.
1564 */
Avi Kivityedcafe32009-12-30 18:07:40 +02001565 vmx_decache_cr0_guest_bits(vcpu);
Avi Kivity81231c62010-01-24 16:26:40 +02001566 vmcs_set_bits(GUEST_CR0, X86_CR0_TS | X86_CR0_MP);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001567 update_exception_bitmap(vcpu);
Avi Kivityedcafe32009-12-30 18:07:40 +02001568 vcpu->arch.cr0_guest_owned_bits = 0;
1569 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
Nadav Har'El36cf24e2011-05-25 23:15:08 +03001570 if (is_guest_mode(vcpu)) {
1571 /*
1572 * L1's specified read shadow might not contain the TS bit,
1573 * so now that we turned on shadowing of this bit, we need to
1574 * set this bit of the shadow. Like in nested_vmx_run we need
1575 * nested_read_cr0(vmcs12), but vmcs12->guest_cr0 is not yet
1576 * up-to-date here because we just decached cr0.TS (and we'll
1577 * only update vmcs12->guest_cr0 on nested exit).
1578 */
1579 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
1580 vmcs12->guest_cr0 = (vmcs12->guest_cr0 & ~X86_CR0_TS) |
1581 (vcpu->arch.cr0 & X86_CR0_TS);
1582 vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
1583 } else
1584 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0);
Avi Kivity5fd86fc2007-05-02 20:40:00 +03001585}
1586
Avi Kivity6aa8b732006-12-10 02:21:36 -08001587static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
1588{
Avi Kivity78ac8b42010-04-08 18:19:35 +03001589 unsigned long rflags, save_rflags;
Avi Kivity345dcaa2009-08-12 15:29:37 +03001590
Avi Kivity6de12732011-03-07 12:51:22 +02001591 if (!test_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail)) {
1592 __set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
1593 rflags = vmcs_readl(GUEST_RFLAGS);
1594 if (to_vmx(vcpu)->rmode.vm86_active) {
1595 rflags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
1596 save_rflags = to_vmx(vcpu)->rmode.save_rflags;
1597 rflags |= save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
1598 }
1599 to_vmx(vcpu)->rflags = rflags;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001600 }
Avi Kivity6de12732011-03-07 12:51:22 +02001601 return to_vmx(vcpu)->rflags;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001602}
1603
1604static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
1605{
Avi Kivity6de12732011-03-07 12:51:22 +02001606 __set_bit(VCPU_EXREG_RFLAGS, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity69c73022011-03-07 15:26:44 +02001607 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity6de12732011-03-07 12:51:22 +02001608 to_vmx(vcpu)->rflags = rflags;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001609 if (to_vmx(vcpu)->rmode.vm86_active) {
1610 to_vmx(vcpu)->rmode.save_rflags = rflags;
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01001611 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
Avi Kivity78ac8b42010-04-08 18:19:35 +03001612 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001613 vmcs_writel(GUEST_RFLAGS, rflags);
1614}
1615
Glauber Costa2809f5d2009-05-12 16:21:05 -04001616static u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
1617{
1618 u32 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
1619 int ret = 0;
1620
1621 if (interruptibility & GUEST_INTR_STATE_STI)
Jan Kiszka48005f62010-02-19 19:38:07 +01001622 ret |= KVM_X86_SHADOW_INT_STI;
Glauber Costa2809f5d2009-05-12 16:21:05 -04001623 if (interruptibility & GUEST_INTR_STATE_MOV_SS)
Jan Kiszka48005f62010-02-19 19:38:07 +01001624 ret |= KVM_X86_SHADOW_INT_MOV_SS;
Glauber Costa2809f5d2009-05-12 16:21:05 -04001625
1626 return ret & mask;
1627}
1628
1629static void vmx_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
1630{
1631 u32 interruptibility_old = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
1632 u32 interruptibility = interruptibility_old;
1633
1634 interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS);
1635
Jan Kiszka48005f62010-02-19 19:38:07 +01001636 if (mask & KVM_X86_SHADOW_INT_MOV_SS)
Glauber Costa2809f5d2009-05-12 16:21:05 -04001637 interruptibility |= GUEST_INTR_STATE_MOV_SS;
Jan Kiszka48005f62010-02-19 19:38:07 +01001638 else if (mask & KVM_X86_SHADOW_INT_STI)
Glauber Costa2809f5d2009-05-12 16:21:05 -04001639 interruptibility |= GUEST_INTR_STATE_STI;
1640
1641 if ((interruptibility != interruptibility_old))
1642 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, interruptibility);
1643}
1644
Avi Kivity6aa8b732006-12-10 02:21:36 -08001645static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
1646{
1647 unsigned long rip;
Avi Kivity6aa8b732006-12-10 02:21:36 -08001648
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03001649 rip = kvm_rip_read(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001650 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03001651 kvm_rip_write(vcpu, rip);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001652
Glauber Costa2809f5d2009-05-12 16:21:05 -04001653 /* skipping an emulated instruction also counts */
1654 vmx_set_interrupt_shadow(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08001655}
1656
Anthony Liguori443381a2010-12-06 10:53:38 -06001657static void vmx_clear_hlt(struct kvm_vcpu *vcpu)
1658{
1659 /* Ensure that we clear the HLT state in the VMCS. We don't need to
1660 * explicitly skip the instruction because if the HLT state is set, then
1661 * the instruction is already executing and RIP has already been
1662 * advanced. */
1663 if (!yield_on_hlt &&
1664 vmcs_read32(GUEST_ACTIVITY_STATE) == GUEST_ACTIVITY_HLT)
1665 vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE);
1666}
1667
Nadav Har'El0b6ac342011-05-25 23:13:36 +03001668/*
1669 * KVM wants to inject page-faults which it got to the guest. This function
1670 * checks whether in a nested guest, we need to inject them to L1 or L2.
1671 * This function assumes it is called with the exit reason in vmcs02 being
1672 * a #PF exception (this is the only case in which KVM injects a #PF when L2
1673 * is running).
1674 */
1675static int nested_pf_handled(struct kvm_vcpu *vcpu)
1676{
1677 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
1678
1679 /* TODO: also check PFEC_MATCH/MASK, not just EB.PF. */
1680 if (!(vmcs12->exception_bitmap & PF_VECTOR))
1681 return 0;
1682
1683 nested_vmx_vmexit(vcpu);
1684 return 1;
1685}
1686
Avi Kivity298101d2007-11-25 13:41:11 +02001687static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
Joerg Roedelce7ddec2010-04-22 12:33:13 +02001688 bool has_error_code, u32 error_code,
1689 bool reinject)
Avi Kivity298101d2007-11-25 13:41:11 +02001690{
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001691 struct vcpu_vmx *vmx = to_vmx(vcpu);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001692 u32 intr_info = nr | INTR_INFO_VALID_MASK;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001693
Nadav Har'El0b6ac342011-05-25 23:13:36 +03001694 if (nr == PF_VECTOR && is_guest_mode(vcpu) &&
1695 nested_pf_handled(vcpu))
1696 return;
1697
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001698 if (has_error_code) {
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001699 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001700 intr_info |= INTR_INFO_DELIVER_CODE_MASK;
1701 }
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001702
Avi Kivity7ffd92c2009-06-09 14:10:45 +03001703 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05001704 int inc_eip = 0;
1705 if (kvm_exception_is_soft(nr))
1706 inc_eip = vcpu->arch.event_exit_inst_len;
1707 if (kvm_inject_realmode_interrupt(vcpu, nr, inc_eip) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02001708 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Jan Kiszka77ab6db2008-07-14 12:28:51 +02001709 return;
1710 }
1711
Gleb Natapov66fd3f72009-05-11 13:35:50 +03001712 if (kvm_exception_is_soft(nr)) {
1713 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
1714 vmx->vcpu.arch.event_exit_inst_len);
Jan Kiszka8ab2d2e2008-12-15 13:52:10 +01001715 intr_info |= INTR_TYPE_SOFT_EXCEPTION;
1716 } else
1717 intr_info |= INTR_TYPE_HARD_EXCEPTION;
1718
1719 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
Anthony Liguori443381a2010-12-06 10:53:38 -06001720 vmx_clear_hlt(vcpu);
Avi Kivity298101d2007-11-25 13:41:11 +02001721}
1722
Sheng Yang4e47c7a2009-12-18 16:48:47 +08001723static bool vmx_rdtscp_supported(void)
1724{
1725 return cpu_has_vmx_rdtscp();
1726}
1727
Avi Kivity6aa8b732006-12-10 02:21:36 -08001728/*
Eddie Donga75beee2007-05-17 18:55:15 +03001729 * Swap MSR entry in host/guest MSR entry array.
1730 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10001731static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
Eddie Donga75beee2007-05-17 18:55:15 +03001732{
Avi Kivity26bb0982009-09-07 11:14:12 +03001733 struct shared_msr_entry tmp;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04001734
1735 tmp = vmx->guest_msrs[to];
1736 vmx->guest_msrs[to] = vmx->guest_msrs[from];
1737 vmx->guest_msrs[from] = tmp;
Eddie Donga75beee2007-05-17 18:55:15 +03001738}
1739
1740/*
Avi Kivitye38aea32007-04-19 13:22:48 +03001741 * Set up the vmcs to automatically save and restore system
1742 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
1743 * mode, as fiddling with msrs is very expensive.
1744 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10001745static void setup_msrs(struct vcpu_vmx *vmx)
Avi Kivitye38aea32007-04-19 13:22:48 +03001746{
Avi Kivity26bb0982009-09-07 11:14:12 +03001747 int save_nmsrs, index;
Avi Kivity58972972009-02-24 22:26:47 +02001748 unsigned long *msr_bitmap;
Avi Kivitye38aea32007-04-19 13:22:48 +03001749
Avi Kivity33f9c502008-02-27 16:06:57 +02001750 vmx_load_host_state(vmx);
Eddie Donga75beee2007-05-17 18:55:15 +03001751 save_nmsrs = 0;
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001752#ifdef CONFIG_X86_64
Rusty Russell8b9cf982007-07-30 16:31:43 +10001753 if (is_long_mode(&vmx->vcpu)) {
Rusty Russell8b9cf982007-07-30 16:31:43 +10001754 index = __find_msr_index(vmx, MSR_SYSCALL_MASK);
Eddie Donga75beee2007-05-17 18:55:15 +03001755 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001756 move_msr_up(vmx, index, save_nmsrs++);
1757 index = __find_msr_index(vmx, MSR_LSTAR);
Eddie Donga75beee2007-05-17 18:55:15 +03001758 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001759 move_msr_up(vmx, index, save_nmsrs++);
1760 index = __find_msr_index(vmx, MSR_CSTAR);
Eddie Donga75beee2007-05-17 18:55:15 +03001761 if (index >= 0)
Rusty Russell8b9cf982007-07-30 16:31:43 +10001762 move_msr_up(vmx, index, save_nmsrs++);
Sheng Yang4e47c7a2009-12-18 16:48:47 +08001763 index = __find_msr_index(vmx, MSR_TSC_AUX);
1764 if (index >= 0 && vmx->rdtscp_enabled)
1765 move_msr_up(vmx, index, save_nmsrs++);
Eddie Donga75beee2007-05-17 18:55:15 +03001766 /*
Brian Gerst8c065852010-07-17 09:03:26 -04001767 * MSR_STAR is only needed on long mode guests, and only
Eddie Donga75beee2007-05-17 18:55:15 +03001768 * if efer.sce is enabled.
1769 */
Brian Gerst8c065852010-07-17 09:03:26 -04001770 index = __find_msr_index(vmx, MSR_STAR);
Avi Kivityf6801df2010-01-21 15:31:50 +02001771 if ((index >= 0) && (vmx->vcpu.arch.efer & EFER_SCE))
Rusty Russell8b9cf982007-07-30 16:31:43 +10001772 move_msr_up(vmx, index, save_nmsrs++);
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001773 }
Eddie Donga75beee2007-05-17 18:55:15 +03001774#endif
Avi Kivity92c0d902009-10-29 11:00:16 +02001775 index = __find_msr_index(vmx, MSR_EFER);
1776 if (index >= 0 && update_transition_efer(vmx, index))
Avi Kivity26bb0982009-09-07 11:14:12 +03001777 move_msr_up(vmx, index, save_nmsrs++);
Avi Kivity4d56c8a2007-04-19 14:28:44 +03001778
Avi Kivity26bb0982009-09-07 11:14:12 +03001779 vmx->save_nmsrs = save_nmsrs;
Avi Kivity58972972009-02-24 22:26:47 +02001780
1781 if (cpu_has_vmx_msr_bitmap()) {
1782 if (is_long_mode(&vmx->vcpu))
1783 msr_bitmap = vmx_msr_bitmap_longmode;
1784 else
1785 msr_bitmap = vmx_msr_bitmap_legacy;
1786
1787 vmcs_write64(MSR_BITMAP, __pa(msr_bitmap));
1788 }
Avi Kivitye38aea32007-04-19 13:22:48 +03001789}
1790
1791/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08001792 * reads and returns guest's timestamp counter "register"
1793 * guest_tsc = host_tsc + tsc_offset -- 21.3
1794 */
1795static u64 guest_read_tsc(void)
1796{
1797 u64 host_tsc, tsc_offset;
1798
1799 rdtscll(host_tsc);
1800 tsc_offset = vmcs_read64(TSC_OFFSET);
1801 return host_tsc + tsc_offset;
1802}
1803
1804/*
Nadav Har'Eld5c17852011-08-02 15:54:20 +03001805 * Like guest_read_tsc, but always returns L1's notion of the timestamp
1806 * counter, even if a nested guest (L2) is currently running.
1807 */
1808u64 vmx_read_l1_tsc(struct kvm_vcpu *vcpu)
1809{
1810 u64 host_tsc, tsc_offset;
1811
1812 rdtscll(host_tsc);
1813 tsc_offset = is_guest_mode(vcpu) ?
1814 to_vmx(vcpu)->nested.vmcs01_tsc_offset :
1815 vmcs_read64(TSC_OFFSET);
1816 return host_tsc + tsc_offset;
1817}
1818
1819/*
Joerg Roedel4051b182011-03-25 09:44:49 +01001820 * Empty call-back. Needs to be implemented when VMX enables the SET_TSC_KHZ
1821 * ioctl. In this case the call-back should update internal vmx state to make
1822 * the changes effective.
1823 */
1824static void vmx_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1825{
1826 /* Nothing to do here */
1827}
1828
1829/*
Zachary Amsden99e3e302010-08-19 22:07:17 -10001830 * writes 'offset' into guest's timestamp counter offset register
Avi Kivity6aa8b732006-12-10 02:21:36 -08001831 */
Zachary Amsden99e3e302010-08-19 22:07:17 -10001832static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
Avi Kivity6aa8b732006-12-10 02:21:36 -08001833{
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001834 if (is_guest_mode(vcpu)) {
Nadav Har'El79918252011-05-25 23:15:39 +03001835 /*
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001836 * We're here if L1 chose not to trap WRMSR to TSC. According
1837 * to the spec, this should set L1's TSC; The offset that L1
1838 * set for L2 remains unchanged, and still needs to be added
1839 * to the newly set TSC to get L2's TSC.
Nadav Har'El79918252011-05-25 23:15:39 +03001840 */
Nadav Har'El27fc51b2011-08-02 15:54:52 +03001841 struct vmcs12 *vmcs12;
1842 to_vmx(vcpu)->nested.vmcs01_tsc_offset = offset;
1843 /* recalculate vmcs02.TSC_OFFSET: */
1844 vmcs12 = get_vmcs12(vcpu);
1845 vmcs_write64(TSC_OFFSET, offset +
1846 (nested_cpu_has(vmcs12, CPU_BASED_USE_TSC_OFFSETING) ?
1847 vmcs12->tsc_offset : 0));
1848 } else {
1849 vmcs_write64(TSC_OFFSET, offset);
1850 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08001851}
1852
Zachary Amsdene48672f2010-08-19 22:07:23 -10001853static void vmx_adjust_tsc_offset(struct kvm_vcpu *vcpu, s64 adjustment)
1854{
1855 u64 offset = vmcs_read64(TSC_OFFSET);
1856 vmcs_write64(TSC_OFFSET, offset + adjustment);
Nadav Har'El79918252011-05-25 23:15:39 +03001857 if (is_guest_mode(vcpu)) {
1858 /* Even when running L2, the adjustment needs to apply to L1 */
1859 to_vmx(vcpu)->nested.vmcs01_tsc_offset += adjustment;
1860 }
Zachary Amsdene48672f2010-08-19 22:07:23 -10001861}
1862
Joerg Roedel857e4092011-03-25 09:44:50 +01001863static u64 vmx_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1864{
1865 return target_tsc - native_read_tsc();
1866}
1867
Nadav Har'El801d3422011-05-25 23:02:23 +03001868static bool guest_cpuid_has_vmx(struct kvm_vcpu *vcpu)
1869{
1870 struct kvm_cpuid_entry2 *best = kvm_find_cpuid_entry(vcpu, 1, 0);
1871 return best && (best->ecx & (1 << (X86_FEATURE_VMX & 31)));
1872}
1873
1874/*
1875 * nested_vmx_allowed() checks whether a guest should be allowed to use VMX
1876 * instructions and MSRs (i.e., nested VMX). Nested VMX is disabled for
1877 * all guests if the "nested" module option is off, and can also be disabled
1878 * for a single guest by disabling its VMX cpuid bit.
1879 */
1880static inline bool nested_vmx_allowed(struct kvm_vcpu *vcpu)
1881{
1882 return nested && guest_cpuid_has_vmx(vcpu);
1883}
1884
Avi Kivity6aa8b732006-12-10 02:21:36 -08001885/*
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03001886 * nested_vmx_setup_ctls_msrs() sets up variables containing the values to be
1887 * returned for the various VMX controls MSRs when nested VMX is enabled.
1888 * The same values should also be used to verify that vmcs12 control fields are
1889 * valid during nested entry from L1 to L2.
1890 * Each of these control msrs has a low and high 32-bit half: A low bit is on
1891 * if the corresponding bit in the (32-bit) control field *must* be on, and a
1892 * bit in the high half is on if the corresponding bit in the control field
1893 * may be on. See also vmx_control_verify().
1894 * TODO: allow these variables to be modified (downgraded) by module options
1895 * or other means.
1896 */
1897static u32 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high;
1898static u32 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high;
1899static u32 nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high;
1900static u32 nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high;
1901static u32 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high;
1902static __init void nested_vmx_setup_ctls_msrs(void)
1903{
1904 /*
1905 * Note that as a general rule, the high half of the MSRs (bits in
1906 * the control fields which may be 1) should be initialized by the
1907 * intersection of the underlying hardware's MSR (i.e., features which
1908 * can be supported) and the list of features we want to expose -
1909 * because they are known to be properly supported in our code.
1910 * Also, usually, the low half of the MSRs (bits which must be 1) can
1911 * be set to 0, meaning that L1 may turn off any of these bits. The
1912 * reason is that if one of these bits is necessary, it will appear
1913 * in vmcs01 and prepare_vmcs02, when it bitwise-or's the control
1914 * fields of vmcs01 and vmcs02, will turn these bits off - and
1915 * nested_vmx_exit_handled() will not pass related exits to L1.
1916 * These rules have exceptions below.
1917 */
1918
1919 /* pin-based controls */
1920 /*
1921 * According to the Intel spec, if bit 55 of VMX_BASIC is off (as it is
1922 * in our case), bits 1, 2 and 4 (i.e., 0x16) must be 1 in this MSR.
1923 */
1924 nested_vmx_pinbased_ctls_low = 0x16 ;
1925 nested_vmx_pinbased_ctls_high = 0x16 |
1926 PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING |
1927 PIN_BASED_VIRTUAL_NMIS;
1928
1929 /* exit controls */
1930 nested_vmx_exit_ctls_low = 0;
Nadav Har'Elb6f12502011-05-25 23:13:06 +03001931 /* Note that guest use of VM_EXIT_ACK_INTR_ON_EXIT is not supported. */
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03001932#ifdef CONFIG_X86_64
1933 nested_vmx_exit_ctls_high = VM_EXIT_HOST_ADDR_SPACE_SIZE;
1934#else
1935 nested_vmx_exit_ctls_high = 0;
1936#endif
1937
1938 /* entry controls */
1939 rdmsr(MSR_IA32_VMX_ENTRY_CTLS,
1940 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high);
1941 nested_vmx_entry_ctls_low = 0;
1942 nested_vmx_entry_ctls_high &=
1943 VM_ENTRY_LOAD_IA32_PAT | VM_ENTRY_IA32E_MODE;
1944
1945 /* cpu-based controls */
1946 rdmsr(MSR_IA32_VMX_PROCBASED_CTLS,
1947 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high);
1948 nested_vmx_procbased_ctls_low = 0;
1949 nested_vmx_procbased_ctls_high &=
1950 CPU_BASED_VIRTUAL_INTR_PENDING | CPU_BASED_USE_TSC_OFFSETING |
1951 CPU_BASED_HLT_EXITING | CPU_BASED_INVLPG_EXITING |
1952 CPU_BASED_MWAIT_EXITING | CPU_BASED_CR3_LOAD_EXITING |
1953 CPU_BASED_CR3_STORE_EXITING |
1954#ifdef CONFIG_X86_64
1955 CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING |
1956#endif
1957 CPU_BASED_MOV_DR_EXITING | CPU_BASED_UNCOND_IO_EXITING |
1958 CPU_BASED_USE_IO_BITMAPS | CPU_BASED_MONITOR_EXITING |
1959 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
1960 /*
1961 * We can allow some features even when not supported by the
1962 * hardware. For example, L1 can specify an MSR bitmap - and we
1963 * can use it to avoid exits to L1 - even when L0 runs L2
1964 * without MSR bitmaps.
1965 */
1966 nested_vmx_procbased_ctls_high |= CPU_BASED_USE_MSR_BITMAPS;
1967
1968 /* secondary cpu-based controls */
1969 rdmsr(MSR_IA32_VMX_PROCBASED_CTLS2,
1970 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high);
1971 nested_vmx_secondary_ctls_low = 0;
1972 nested_vmx_secondary_ctls_high &=
1973 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
1974}
1975
1976static inline bool vmx_control_verify(u32 control, u32 low, u32 high)
1977{
1978 /*
1979 * Bits 0 in high must be 0, and bits 1 in low must be 1.
1980 */
1981 return ((control & high) | low) == control;
1982}
1983
1984static inline u64 vmx_control_msr(u32 low, u32 high)
1985{
1986 return low | ((u64)high << 32);
1987}
1988
1989/*
1990 * If we allow our guest to use VMX instructions (i.e., nested VMX), we should
1991 * also let it use VMX-specific MSRs.
1992 * vmx_get_vmx_msr() and vmx_set_vmx_msr() return 1 when we handled a
1993 * VMX-specific MSR, or 0 when we haven't (and the caller should handle it
1994 * like all other MSRs).
1995 */
1996static int vmx_get_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1997{
1998 if (!nested_vmx_allowed(vcpu) && msr_index >= MSR_IA32_VMX_BASIC &&
1999 msr_index <= MSR_IA32_VMX_TRUE_ENTRY_CTLS) {
2000 /*
2001 * According to the spec, processors which do not support VMX
2002 * should throw a #GP(0) when VMX capability MSRs are read.
2003 */
2004 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
2005 return 1;
2006 }
2007
2008 switch (msr_index) {
2009 case MSR_IA32_FEATURE_CONTROL:
2010 *pdata = 0;
2011 break;
2012 case MSR_IA32_VMX_BASIC:
2013 /*
2014 * This MSR reports some information about VMX support. We
2015 * should return information about the VMX we emulate for the
2016 * guest, and the VMCS structure we give it - not about the
2017 * VMX support of the underlying hardware.
2018 */
2019 *pdata = VMCS12_REVISION |
2020 ((u64)VMCS12_SIZE << VMX_BASIC_VMCS_SIZE_SHIFT) |
2021 (VMX_BASIC_MEM_TYPE_WB << VMX_BASIC_MEM_TYPE_SHIFT);
2022 break;
2023 case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
2024 case MSR_IA32_VMX_PINBASED_CTLS:
2025 *pdata = vmx_control_msr(nested_vmx_pinbased_ctls_low,
2026 nested_vmx_pinbased_ctls_high);
2027 break;
2028 case MSR_IA32_VMX_TRUE_PROCBASED_CTLS:
2029 case MSR_IA32_VMX_PROCBASED_CTLS:
2030 *pdata = vmx_control_msr(nested_vmx_procbased_ctls_low,
2031 nested_vmx_procbased_ctls_high);
2032 break;
2033 case MSR_IA32_VMX_TRUE_EXIT_CTLS:
2034 case MSR_IA32_VMX_EXIT_CTLS:
2035 *pdata = vmx_control_msr(nested_vmx_exit_ctls_low,
2036 nested_vmx_exit_ctls_high);
2037 break;
2038 case MSR_IA32_VMX_TRUE_ENTRY_CTLS:
2039 case MSR_IA32_VMX_ENTRY_CTLS:
2040 *pdata = vmx_control_msr(nested_vmx_entry_ctls_low,
2041 nested_vmx_entry_ctls_high);
2042 break;
2043 case MSR_IA32_VMX_MISC:
2044 *pdata = 0;
2045 break;
2046 /*
2047 * These MSRs specify bits which the guest must keep fixed (on or off)
2048 * while L1 is in VMXON mode (in L1's root mode, or running an L2).
2049 * We picked the standard core2 setting.
2050 */
2051#define VMXON_CR0_ALWAYSON (X86_CR0_PE | X86_CR0_PG | X86_CR0_NE)
2052#define VMXON_CR4_ALWAYSON X86_CR4_VMXE
2053 case MSR_IA32_VMX_CR0_FIXED0:
2054 *pdata = VMXON_CR0_ALWAYSON;
2055 break;
2056 case MSR_IA32_VMX_CR0_FIXED1:
2057 *pdata = -1ULL;
2058 break;
2059 case MSR_IA32_VMX_CR4_FIXED0:
2060 *pdata = VMXON_CR4_ALWAYSON;
2061 break;
2062 case MSR_IA32_VMX_CR4_FIXED1:
2063 *pdata = -1ULL;
2064 break;
2065 case MSR_IA32_VMX_VMCS_ENUM:
2066 *pdata = 0x1f;
2067 break;
2068 case MSR_IA32_VMX_PROCBASED_CTLS2:
2069 *pdata = vmx_control_msr(nested_vmx_secondary_ctls_low,
2070 nested_vmx_secondary_ctls_high);
2071 break;
2072 case MSR_IA32_VMX_EPT_VPID_CAP:
2073 /* Currently, no nested ept or nested vpid */
2074 *pdata = 0;
2075 break;
2076 default:
2077 return 0;
2078 }
2079
2080 return 1;
2081}
2082
2083static int vmx_set_vmx_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2084{
2085 if (!nested_vmx_allowed(vcpu))
2086 return 0;
2087
2088 if (msr_index == MSR_IA32_FEATURE_CONTROL)
2089 /* TODO: the right thing. */
2090 return 1;
2091 /*
2092 * No need to treat VMX capability MSRs specially: If we don't handle
2093 * them, handle_wrmsr will #GP(0), which is correct (they are readonly)
2094 */
2095 return 0;
2096}
2097
2098/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08002099 * Reads an msr value (of 'msr_index') into 'pdata'.
2100 * Returns 0 on success, non-0 otherwise.
2101 * Assumes vcpu_load() was already called.
2102 */
2103static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
2104{
2105 u64 data;
Avi Kivity26bb0982009-09-07 11:14:12 +03002106 struct shared_msr_entry *msr;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002107
2108 if (!pdata) {
2109 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
2110 return -EINVAL;
2111 }
2112
2113 switch (msr_index) {
Avi Kivity05b3e0c2006-12-13 00:33:45 -08002114#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002115 case MSR_FS_BASE:
2116 data = vmcs_readl(GUEST_FS_BASE);
2117 break;
2118 case MSR_GS_BASE:
2119 data = vmcs_readl(GUEST_GS_BASE);
2120 break;
Avi Kivity44ea2b12009-09-06 15:55:37 +03002121 case MSR_KERNEL_GS_BASE:
2122 vmx_load_host_state(to_vmx(vcpu));
2123 data = to_vmx(vcpu)->msr_guest_kernel_gs_base;
2124 break;
Avi Kivity26bb0982009-09-07 11:14:12 +03002125#endif
Avi Kivity6aa8b732006-12-10 02:21:36 -08002126 case MSR_EFER:
Avi Kivity3bab1f52006-12-29 16:49:48 -08002127 return kvm_get_msr_common(vcpu, msr_index, pdata);
Jaswinder Singh Rajputaf24a4e2009-05-15 18:42:05 +05302128 case MSR_IA32_TSC:
Avi Kivity6aa8b732006-12-10 02:21:36 -08002129 data = guest_read_tsc();
2130 break;
2131 case MSR_IA32_SYSENTER_CS:
2132 data = vmcs_read32(GUEST_SYSENTER_CS);
2133 break;
2134 case MSR_IA32_SYSENTER_EIP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002135 data = vmcs_readl(GUEST_SYSENTER_EIP);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002136 break;
2137 case MSR_IA32_SYSENTER_ESP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002138 data = vmcs_readl(GUEST_SYSENTER_ESP);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002139 break;
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002140 case MSR_TSC_AUX:
2141 if (!to_vmx(vcpu)->rdtscp_enabled)
2142 return 1;
2143 /* Otherwise falls through */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002144 default:
Avi Kivity26bb0982009-09-07 11:14:12 +03002145 vmx_load_host_state(to_vmx(vcpu));
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002146 if (vmx_get_vmx_msr(vcpu, msr_index, pdata))
2147 return 0;
Rusty Russell8b9cf982007-07-30 16:31:43 +10002148 msr = find_msr_entry(to_vmx(vcpu), msr_index);
Avi Kivity3bab1f52006-12-29 16:49:48 -08002149 if (msr) {
Gleb Natapov542423b2009-08-27 15:07:30 +03002150 vmx_load_host_state(to_vmx(vcpu));
Avi Kivity3bab1f52006-12-29 16:49:48 -08002151 data = msr->data;
2152 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002153 }
Avi Kivity3bab1f52006-12-29 16:49:48 -08002154 return kvm_get_msr_common(vcpu, msr_index, pdata);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002155 }
2156
2157 *pdata = data;
2158 return 0;
2159}
2160
2161/*
2162 * Writes msr value into into the appropriate "register".
2163 * Returns 0 on success, non-0 otherwise.
2164 * Assumes vcpu_load() was already called.
2165 */
2166static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
2167{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04002168 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03002169 struct shared_msr_entry *msr;
Eddie Dong2cc51562007-05-21 07:28:09 +03002170 int ret = 0;
2171
Avi Kivity6aa8b732006-12-10 02:21:36 -08002172 switch (msr_index) {
Avi Kivity3bab1f52006-12-29 16:49:48 -08002173 case MSR_EFER:
Avi Kivitya9b21b62008-06-24 11:48:49 +03002174 vmx_load_host_state(vmx);
Eddie Dong2cc51562007-05-21 07:28:09 +03002175 ret = kvm_set_msr_common(vcpu, msr_index, data);
Eddie Dong2cc51562007-05-21 07:28:09 +03002176 break;
Avi Kivity16175a72009-03-23 22:13:44 +02002177#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002178 case MSR_FS_BASE:
Avi Kivity2fb92db2011-04-27 19:42:18 +03002179 vmx_segment_cache_clear(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002180 vmcs_writel(GUEST_FS_BASE, data);
2181 break;
2182 case MSR_GS_BASE:
Avi Kivity2fb92db2011-04-27 19:42:18 +03002183 vmx_segment_cache_clear(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002184 vmcs_writel(GUEST_GS_BASE, data);
2185 break;
Avi Kivity44ea2b12009-09-06 15:55:37 +03002186 case MSR_KERNEL_GS_BASE:
2187 vmx_load_host_state(vmx);
2188 vmx->msr_guest_kernel_gs_base = data;
2189 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002190#endif
2191 case MSR_IA32_SYSENTER_CS:
2192 vmcs_write32(GUEST_SYSENTER_CS, data);
2193 break;
2194 case MSR_IA32_SYSENTER_EIP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002195 vmcs_writel(GUEST_SYSENTER_EIP, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002196 break;
2197 case MSR_IA32_SYSENTER_ESP:
Avi Kivityf5b42c32007-03-06 12:05:53 +02002198 vmcs_writel(GUEST_SYSENTER_ESP, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002199 break;
Jaswinder Singh Rajputaf24a4e2009-05-15 18:42:05 +05302200 case MSR_IA32_TSC:
Zachary Amsden99e3e302010-08-19 22:07:17 -10002201 kvm_write_tsc(vcpu, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002202 break;
Sheng Yang468d4722008-10-09 16:01:55 +08002203 case MSR_IA32_CR_PAT:
2204 if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
2205 vmcs_write64(GUEST_IA32_PAT, data);
2206 vcpu->arch.pat = data;
2207 break;
2208 }
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002209 ret = kvm_set_msr_common(vcpu, msr_index, data);
2210 break;
2211 case MSR_TSC_AUX:
2212 if (!vmx->rdtscp_enabled)
2213 return 1;
2214 /* Check reserved bit, higher 32 bits should be zero */
2215 if ((data >> 32) != 0)
2216 return 1;
2217 /* Otherwise falls through */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002218 default:
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002219 if (vmx_set_vmx_msr(vcpu, msr_index, data))
2220 break;
Rusty Russell8b9cf982007-07-30 16:31:43 +10002221 msr = find_msr_entry(vmx, msr_index);
Avi Kivity3bab1f52006-12-29 16:49:48 -08002222 if (msr) {
Gleb Natapov542423b2009-08-27 15:07:30 +03002223 vmx_load_host_state(vmx);
Avi Kivity3bab1f52006-12-29 16:49:48 -08002224 msr->data = data;
2225 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002226 }
Eddie Dong2cc51562007-05-21 07:28:09 +03002227 ret = kvm_set_msr_common(vcpu, msr_index, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002228 }
2229
Eddie Dong2cc51562007-05-21 07:28:09 +03002230 return ret;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002231}
2232
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002233static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002234{
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002235 __set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
2236 switch (reg) {
2237 case VCPU_REGS_RSP:
2238 vcpu->arch.regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
2239 break;
2240 case VCPU_REGS_RIP:
2241 vcpu->arch.regs[VCPU_REGS_RIP] = vmcs_readl(GUEST_RIP);
2242 break;
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002243 case VCPU_EXREG_PDPTR:
2244 if (enable_ept)
2245 ept_save_pdptrs(vcpu);
2246 break;
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03002247 default:
2248 break;
2249 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08002250}
2251
Jan Kiszka355be0b2009-10-03 00:31:21 +02002252static void set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002253{
Jan Kiszkaae675ef2008-12-15 13:52:10 +01002254 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
2255 vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]);
2256 else
2257 vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
2258
Avi Kivityabd3f2d2007-05-02 17:57:40 +03002259 update_exception_bitmap(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002260}
2261
2262static __init int cpu_has_kvm_support(void)
2263{
Eduardo Habkost6210e372008-11-17 19:03:16 -02002264 return cpu_has_vmx();
Avi Kivity6aa8b732006-12-10 02:21:36 -08002265}
2266
2267static __init int vmx_disabled_by_bios(void)
2268{
2269 u64 msr;
2270
2271 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
Shane Wangcafd6652010-04-29 12:09:01 -04002272 if (msr & FEATURE_CONTROL_LOCKED) {
Joseph Cihula23f3e992011-02-08 11:45:56 -08002273 /* launched w/ TXT and VMX disabled */
Shane Wangcafd6652010-04-29 12:09:01 -04002274 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
2275 && tboot_enabled())
2276 return 1;
Joseph Cihula23f3e992011-02-08 11:45:56 -08002277 /* launched w/o TXT and VMX only enabled w/ TXT */
Shane Wangcafd6652010-04-29 12:09:01 -04002278 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
Joseph Cihula23f3e992011-02-08 11:45:56 -08002279 && (msr & FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX)
Shane Wangf9335af2010-11-17 11:40:17 +08002280 && !tboot_enabled()) {
2281 printk(KERN_WARNING "kvm: disable TXT in the BIOS or "
Joseph Cihula23f3e992011-02-08 11:45:56 -08002282 "activate TXT before enabling KVM\n");
Shane Wangcafd6652010-04-29 12:09:01 -04002283 return 1;
Shane Wangf9335af2010-11-17 11:40:17 +08002284 }
Joseph Cihula23f3e992011-02-08 11:45:56 -08002285 /* launched w/o TXT and VMX disabled */
2286 if (!(msr & FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX)
2287 && !tboot_enabled())
2288 return 1;
Shane Wangcafd6652010-04-29 12:09:01 -04002289 }
2290
2291 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002292}
2293
Dongxiao Xu7725b892010-05-11 18:29:38 +08002294static void kvm_cpu_vmxon(u64 addr)
2295{
2296 asm volatile (ASM_VMX_VMXON_RAX
2297 : : "a"(&addr), "m"(addr)
2298 : "memory", "cc");
2299}
2300
Alexander Graf10474ae2009-09-15 11:37:46 +02002301static int hardware_enable(void *garbage)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002302{
2303 int cpu = raw_smp_processor_id();
2304 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
Shane Wangcafd6652010-04-29 12:09:01 -04002305 u64 old, test_bits;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002306
Alexander Graf10474ae2009-09-15 11:37:46 +02002307 if (read_cr4() & X86_CR4_VMXE)
2308 return -EBUSY;
2309
Nadav Har'Eld462b812011-05-24 15:26:10 +03002310 INIT_LIST_HEAD(&per_cpu(loaded_vmcss_on_cpu, cpu));
Avi Kivity6aa8b732006-12-10 02:21:36 -08002311 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
Shane Wangcafd6652010-04-29 12:09:01 -04002312
2313 test_bits = FEATURE_CONTROL_LOCKED;
2314 test_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
2315 if (tboot_enabled())
2316 test_bits |= FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX;
2317
2318 if ((old & test_bits) != test_bits) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002319 /* enable and lock */
Shane Wangcafd6652010-04-29 12:09:01 -04002320 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | test_bits);
2321 }
Rusty Russell66aee912007-07-17 23:34:16 +10002322 write_cr4(read_cr4() | X86_CR4_VMXE); /* FIXME: not cpu hotplug safe */
Alexander Graf10474ae2009-09-15 11:37:46 +02002323
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002324 if (vmm_exclusive) {
2325 kvm_cpu_vmxon(phys_addr);
2326 ept_sync_global();
2327 }
Alexander Graf10474ae2009-09-15 11:37:46 +02002328
Avi Kivity3444d7d2010-07-26 18:32:38 +03002329 store_gdt(&__get_cpu_var(host_gdt));
2330
Alexander Graf10474ae2009-09-15 11:37:46 +02002331 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002332}
2333
Nadav Har'Eld462b812011-05-24 15:26:10 +03002334static void vmclear_local_loaded_vmcss(void)
Avi Kivity543e4242008-05-13 16:22:47 +03002335{
2336 int cpu = raw_smp_processor_id();
Nadav Har'Eld462b812011-05-24 15:26:10 +03002337 struct loaded_vmcs *v, *n;
Avi Kivity543e4242008-05-13 16:22:47 +03002338
Nadav Har'Eld462b812011-05-24 15:26:10 +03002339 list_for_each_entry_safe(v, n, &per_cpu(loaded_vmcss_on_cpu, cpu),
2340 loaded_vmcss_on_cpu_link)
2341 __loaded_vmcs_clear(v);
Avi Kivity543e4242008-05-13 16:22:47 +03002342}
2343
Eduardo Habkost710ff4a2008-11-17 19:03:18 -02002344
2345/* Just like cpu_vmxoff(), but with the __kvm_handle_fault_on_reboot()
2346 * tricks.
2347 */
2348static void kvm_cpu_vmxoff(void)
2349{
2350 asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
Eduardo Habkost710ff4a2008-11-17 19:03:18 -02002351}
2352
Avi Kivity6aa8b732006-12-10 02:21:36 -08002353static void hardware_disable(void *garbage)
2354{
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002355 if (vmm_exclusive) {
Nadav Har'Eld462b812011-05-24 15:26:10 +03002356 vmclear_local_loaded_vmcss();
Dongxiao Xu4610c9c2010-05-11 18:29:48 +08002357 kvm_cpu_vmxoff();
2358 }
Dongxiao Xu7725b892010-05-11 18:29:38 +08002359 write_cr4(read_cr4() & ~X86_CR4_VMXE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002360}
2361
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002362static __init int adjust_vmx_controls(u32 ctl_min, u32 ctl_opt,
Mike Dayd77c26f2007-10-08 09:02:08 -04002363 u32 msr, u32 *result)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002364{
2365 u32 vmx_msr_low, vmx_msr_high;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002366 u32 ctl = ctl_min | ctl_opt;
2367
2368 rdmsr(msr, vmx_msr_low, vmx_msr_high);
2369
2370 ctl &= vmx_msr_high; /* bit == 0 in high word ==> must be zero */
2371 ctl |= vmx_msr_low; /* bit == 1 in low word ==> must be one */
2372
2373 /* Ensure minimum (required) set of control bits are supported. */
2374 if (ctl_min & ~ctl)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002375 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002376
2377 *result = ctl;
2378 return 0;
2379}
2380
Avi Kivity110312c2010-12-21 12:54:20 +02002381static __init bool allow_1_setting(u32 msr, u32 ctl)
2382{
2383 u32 vmx_msr_low, vmx_msr_high;
2384
2385 rdmsr(msr, vmx_msr_low, vmx_msr_high);
2386 return vmx_msr_high & ctl;
2387}
2388
Yang, Sheng002c7f72007-07-31 14:23:01 +03002389static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf)
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002390{
2391 u32 vmx_msr_low, vmx_msr_high;
Sheng Yangd56f5462008-04-25 10:13:16 +08002392 u32 min, opt, min2, opt2;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002393 u32 _pin_based_exec_control = 0;
2394 u32 _cpu_based_exec_control = 0;
Sheng Yangf78e0e22007-10-29 09:40:42 +08002395 u32 _cpu_based_2nd_exec_control = 0;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002396 u32 _vmexit_control = 0;
2397 u32 _vmentry_control = 0;
2398
2399 min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
Sheng Yangf08864b2008-05-15 18:23:25 +08002400 opt = PIN_BASED_VIRTUAL_NMIS;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002401 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS,
2402 &_pin_based_exec_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002403 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002404
Anthony Liguori443381a2010-12-06 10:53:38 -06002405 min =
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002406#ifdef CONFIG_X86_64
2407 CPU_BASED_CR8_LOAD_EXITING |
2408 CPU_BASED_CR8_STORE_EXITING |
2409#endif
Sheng Yangd56f5462008-04-25 10:13:16 +08002410 CPU_BASED_CR3_LOAD_EXITING |
2411 CPU_BASED_CR3_STORE_EXITING |
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002412 CPU_BASED_USE_IO_BITMAPS |
2413 CPU_BASED_MOV_DR_EXITING |
Marcelo Tosattia7052892008-09-23 13:18:35 -03002414 CPU_BASED_USE_TSC_OFFSETING |
Sheng Yang59708672009-12-15 13:29:54 +08002415 CPU_BASED_MWAIT_EXITING |
2416 CPU_BASED_MONITOR_EXITING |
Marcelo Tosattia7052892008-09-23 13:18:35 -03002417 CPU_BASED_INVLPG_EXITING;
Anthony Liguori443381a2010-12-06 10:53:38 -06002418
2419 if (yield_on_hlt)
2420 min |= CPU_BASED_HLT_EXITING;
2421
Sheng Yangf78e0e22007-10-29 09:40:42 +08002422 opt = CPU_BASED_TPR_SHADOW |
Sheng Yang25c5f222008-03-28 13:18:56 +08002423 CPU_BASED_USE_MSR_BITMAPS |
Sheng Yangf78e0e22007-10-29 09:40:42 +08002424 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002425 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PROCBASED_CTLS,
2426 &_cpu_based_exec_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002427 return -EIO;
Yang, Sheng6e5d8652007-09-12 18:03:11 +08002428#ifdef CONFIG_X86_64
2429 if ((_cpu_based_exec_control & CPU_BASED_TPR_SHADOW))
2430 _cpu_based_exec_control &= ~CPU_BASED_CR8_LOAD_EXITING &
2431 ~CPU_BASED_CR8_STORE_EXITING;
2432#endif
Sheng Yangf78e0e22007-10-29 09:40:42 +08002433 if (_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) {
Sheng Yangd56f5462008-04-25 10:13:16 +08002434 min2 = 0;
2435 opt2 = SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
Sheng Yang2384d2b2008-01-17 15:14:33 +08002436 SECONDARY_EXEC_WBINVD_EXITING |
Sheng Yangd56f5462008-04-25 10:13:16 +08002437 SECONDARY_EXEC_ENABLE_VPID |
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002438 SECONDARY_EXEC_ENABLE_EPT |
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08002439 SECONDARY_EXEC_UNRESTRICTED_GUEST |
Sheng Yang4e47c7a2009-12-18 16:48:47 +08002440 SECONDARY_EXEC_PAUSE_LOOP_EXITING |
2441 SECONDARY_EXEC_RDTSCP;
Sheng Yangd56f5462008-04-25 10:13:16 +08002442 if (adjust_vmx_controls(min2, opt2,
2443 MSR_IA32_VMX_PROCBASED_CTLS2,
Sheng Yangf78e0e22007-10-29 09:40:42 +08002444 &_cpu_based_2nd_exec_control) < 0)
2445 return -EIO;
2446 }
2447#ifndef CONFIG_X86_64
2448 if (!(_cpu_based_2nd_exec_control &
2449 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES))
2450 _cpu_based_exec_control &= ~CPU_BASED_TPR_SHADOW;
2451#endif
Sheng Yangd56f5462008-04-25 10:13:16 +08002452 if (_cpu_based_2nd_exec_control & SECONDARY_EXEC_ENABLE_EPT) {
Marcelo Tosattia7052892008-09-23 13:18:35 -03002453 /* CR3 accesses and invlpg don't need to cause VM Exits when EPT
2454 enabled */
Gleb Natapov5fff7d22009-08-27 18:41:30 +03002455 _cpu_based_exec_control &= ~(CPU_BASED_CR3_LOAD_EXITING |
2456 CPU_BASED_CR3_STORE_EXITING |
2457 CPU_BASED_INVLPG_EXITING);
Sheng Yangd56f5462008-04-25 10:13:16 +08002458 rdmsr(MSR_IA32_VMX_EPT_VPID_CAP,
2459 vmx_capability.ept, vmx_capability.vpid);
2460 }
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002461
2462 min = 0;
2463#ifdef CONFIG_X86_64
2464 min |= VM_EXIT_HOST_ADDR_SPACE_SIZE;
2465#endif
Sheng Yang468d4722008-10-09 16:01:55 +08002466 opt = VM_EXIT_SAVE_IA32_PAT | VM_EXIT_LOAD_IA32_PAT;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002467 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_EXIT_CTLS,
2468 &_vmexit_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002469 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002470
Sheng Yang468d4722008-10-09 16:01:55 +08002471 min = 0;
2472 opt = VM_ENTRY_LOAD_IA32_PAT;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002473 if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_ENTRY_CTLS,
2474 &_vmentry_control) < 0)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002475 return -EIO;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002476
Nguyen Anh Quynhc68876f2006-12-29 16:49:54 -08002477 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002478
2479 /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */
2480 if ((vmx_msr_high & 0x1fff) > PAGE_SIZE)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002481 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002482
2483#ifdef CONFIG_X86_64
2484 /* IA-32 SDM Vol 3B: 64-bit CPUs always have VMX_BASIC_MSR[48]==0. */
2485 if (vmx_msr_high & (1u<<16))
Yang, Sheng002c7f72007-07-31 14:23:01 +03002486 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002487#endif
2488
2489 /* Require Write-Back (WB) memory type for VMCS accesses. */
2490 if (((vmx_msr_high >> 18) & 15) != 6)
Yang, Sheng002c7f72007-07-31 14:23:01 +03002491 return -EIO;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002492
Yang, Sheng002c7f72007-07-31 14:23:01 +03002493 vmcs_conf->size = vmx_msr_high & 0x1fff;
2494 vmcs_conf->order = get_order(vmcs_config.size);
2495 vmcs_conf->revision_id = vmx_msr_low;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002496
Yang, Sheng002c7f72007-07-31 14:23:01 +03002497 vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
2498 vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
Sheng Yangf78e0e22007-10-29 09:40:42 +08002499 vmcs_conf->cpu_based_2nd_exec_ctrl = _cpu_based_2nd_exec_control;
Yang, Sheng002c7f72007-07-31 14:23:01 +03002500 vmcs_conf->vmexit_ctrl = _vmexit_control;
2501 vmcs_conf->vmentry_ctrl = _vmentry_control;
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002502
Avi Kivity110312c2010-12-21 12:54:20 +02002503 cpu_has_load_ia32_efer =
2504 allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
2505 VM_ENTRY_LOAD_IA32_EFER)
2506 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2507 VM_EXIT_LOAD_IA32_EFER);
2508
Gleb Natapov8bf00a52011-10-05 14:01:22 +02002509 cpu_has_load_perf_global_ctrl =
2510 allow_1_setting(MSR_IA32_VMX_ENTRY_CTLS,
2511 VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
2512 && allow_1_setting(MSR_IA32_VMX_EXIT_CTLS,
2513 VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL);
2514
2515 /*
2516 * Some cpus support VM_ENTRY_(LOAD|SAVE)_IA32_PERF_GLOBAL_CTRL
2517 * but due to arrata below it can't be used. Workaround is to use
2518 * msr load mechanism to switch IA32_PERF_GLOBAL_CTRL.
2519 *
2520 * VM Exit May Incorrectly Clear IA32_PERF_GLOBAL_CTRL [34:32]
2521 *
2522 * AAK155 (model 26)
2523 * AAP115 (model 30)
2524 * AAT100 (model 37)
2525 * BC86,AAY89,BD102 (model 44)
2526 * BA97 (model 46)
2527 *
2528 */
2529 if (cpu_has_load_perf_global_ctrl && boot_cpu_data.x86 == 0x6) {
2530 switch (boot_cpu_data.x86_model) {
2531 case 26:
2532 case 30:
2533 case 37:
2534 case 44:
2535 case 46:
2536 cpu_has_load_perf_global_ctrl = false;
2537 printk_once(KERN_WARNING"kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
2538 "does not work properly. Using workaround\n");
2539 break;
2540 default:
2541 break;
2542 }
2543 }
2544
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002545 return 0;
Nguyen Anh Quynhc68876f2006-12-29 16:49:54 -08002546}
Avi Kivity6aa8b732006-12-10 02:21:36 -08002547
2548static struct vmcs *alloc_vmcs_cpu(int cpu)
2549{
2550 int node = cpu_to_node(cpu);
2551 struct page *pages;
2552 struct vmcs *vmcs;
2553
Mel Gorman6484eb32009-06-16 15:31:54 -07002554 pages = alloc_pages_exact_node(node, GFP_KERNEL, vmcs_config.order);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002555 if (!pages)
2556 return NULL;
2557 vmcs = page_address(pages);
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002558 memset(vmcs, 0, vmcs_config.size);
2559 vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
Avi Kivity6aa8b732006-12-10 02:21:36 -08002560 return vmcs;
2561}
2562
2563static struct vmcs *alloc_vmcs(void)
2564{
Ingo Molnard3b2c332007-01-05 16:36:23 -08002565 return alloc_vmcs_cpu(raw_smp_processor_id());
Avi Kivity6aa8b732006-12-10 02:21:36 -08002566}
2567
2568static void free_vmcs(struct vmcs *vmcs)
2569{
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03002570 free_pages((unsigned long)vmcs, vmcs_config.order);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002571}
2572
Nadav Har'Eld462b812011-05-24 15:26:10 +03002573/*
2574 * Free a VMCS, but before that VMCLEAR it on the CPU where it was last loaded
2575 */
2576static void free_loaded_vmcs(struct loaded_vmcs *loaded_vmcs)
2577{
2578 if (!loaded_vmcs->vmcs)
2579 return;
2580 loaded_vmcs_clear(loaded_vmcs);
2581 free_vmcs(loaded_vmcs->vmcs);
2582 loaded_vmcs->vmcs = NULL;
2583}
2584
Sam Ravnborg39959582007-06-01 00:47:13 -07002585static void free_kvm_area(void)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002586{
2587 int cpu;
2588
Zachary Amsden3230bb42009-09-29 11:38:37 -10002589 for_each_possible_cpu(cpu) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002590 free_vmcs(per_cpu(vmxarea, cpu));
Zachary Amsden3230bb42009-09-29 11:38:37 -10002591 per_cpu(vmxarea, cpu) = NULL;
2592 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08002593}
2594
Avi Kivity6aa8b732006-12-10 02:21:36 -08002595static __init int alloc_kvm_area(void)
2596{
2597 int cpu;
2598
Zachary Amsden3230bb42009-09-29 11:38:37 -10002599 for_each_possible_cpu(cpu) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002600 struct vmcs *vmcs;
2601
2602 vmcs = alloc_vmcs_cpu(cpu);
2603 if (!vmcs) {
2604 free_kvm_area();
2605 return -ENOMEM;
2606 }
2607
2608 per_cpu(vmxarea, cpu) = vmcs;
2609 }
2610 return 0;
2611}
2612
2613static __init int hardware_setup(void)
2614{
Yang, Sheng002c7f72007-07-31 14:23:01 +03002615 if (setup_vmcs_config(&vmcs_config) < 0)
2616 return -EIO;
Joerg Roedel50a37eb2008-01-31 14:57:38 +01002617
2618 if (boot_cpu_has(X86_FEATURE_NX))
2619 kvm_enable_efer_bits(EFER_NX);
2620
Sheng Yang93ba03c2009-04-01 15:52:32 +08002621 if (!cpu_has_vmx_vpid())
2622 enable_vpid = 0;
2623
Sheng Yang4bc9b982010-06-02 14:05:24 +08002624 if (!cpu_has_vmx_ept() ||
2625 !cpu_has_vmx_ept_4levels()) {
Sheng Yang93ba03c2009-04-01 15:52:32 +08002626 enable_ept = 0;
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002627 enable_unrestricted_guest = 0;
2628 }
2629
2630 if (!cpu_has_vmx_unrestricted_guest())
2631 enable_unrestricted_guest = 0;
Sheng Yang93ba03c2009-04-01 15:52:32 +08002632
2633 if (!cpu_has_vmx_flexpriority())
2634 flexpriority_enabled = 0;
2635
Gleb Natapov95ba8273132009-04-21 17:45:08 +03002636 if (!cpu_has_vmx_tpr_shadow())
2637 kvm_x86_ops->update_cr8_intercept = NULL;
2638
Marcelo Tosatti54dee992009-06-11 12:07:44 -03002639 if (enable_ept && !cpu_has_vmx_ept_2m_page())
2640 kvm_disable_largepages();
2641
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08002642 if (!cpu_has_vmx_ple())
2643 ple_gap = 0;
2644
Nadav Har'Elb87a51a2011-05-25 23:04:25 +03002645 if (nested)
2646 nested_vmx_setup_ctls_msrs();
2647
Avi Kivity6aa8b732006-12-10 02:21:36 -08002648 return alloc_kvm_area();
2649}
2650
2651static __exit void hardware_unsetup(void)
2652{
2653 free_kvm_area();
2654}
2655
Avi Kivity6aa8b732006-12-10 02:21:36 -08002656static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
2657{
2658 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2659
Avi Kivity6af11b92007-03-19 13:18:10 +02002660 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
Avi Kivity6aa8b732006-12-10 02:21:36 -08002661 vmcs_write16(sf->selector, save->selector);
2662 vmcs_writel(sf->base, save->base);
2663 vmcs_write32(sf->limit, save->limit);
2664 vmcs_write32(sf->ar_bytes, save->ar);
2665 } else {
2666 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
2667 << AR_DPL_SHIFT;
2668 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
2669 }
2670}
2671
2672static void enter_pmode(struct kvm_vcpu *vcpu)
2673{
2674 unsigned long flags;
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002675 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002676
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002677 vmx->emulation_required = 1;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002678 vmx->rmode.vm86_active = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002679
Avi Kivity2fb92db2011-04-27 19:42:18 +03002680 vmx_segment_cache_clear(vmx);
2681
Avi Kivityd0ba64f2011-01-03 14:28:51 +02002682 vmcs_write16(GUEST_TR_SELECTOR, vmx->rmode.tr.selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002683 vmcs_writel(GUEST_TR_BASE, vmx->rmode.tr.base);
2684 vmcs_write32(GUEST_TR_LIMIT, vmx->rmode.tr.limit);
2685 vmcs_write32(GUEST_TR_AR_BYTES, vmx->rmode.tr.ar);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002686
2687 flags = vmcs_readl(GUEST_RFLAGS);
Avi Kivity78ac8b42010-04-08 18:19:35 +03002688 flags &= RMODE_GUEST_OWNED_EFLAGS_BITS;
2689 flags |= vmx->rmode.save_rflags & ~RMODE_GUEST_OWNED_EFLAGS_BITS;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002690 vmcs_writel(GUEST_RFLAGS, flags);
2691
Rusty Russell66aee912007-07-17 23:34:16 +10002692 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~X86_CR4_VME) |
2693 (vmcs_readl(CR4_READ_SHADOW) & X86_CR4_VME));
Avi Kivity6aa8b732006-12-10 02:21:36 -08002694
2695 update_exception_bitmap(vcpu);
2696
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002697 if (emulate_invalid_guest_state)
2698 return;
2699
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002700 fix_pmode_dataseg(VCPU_SREG_ES, &vmx->rmode.es);
2701 fix_pmode_dataseg(VCPU_SREG_DS, &vmx->rmode.ds);
2702 fix_pmode_dataseg(VCPU_SREG_GS, &vmx->rmode.gs);
2703 fix_pmode_dataseg(VCPU_SREG_FS, &vmx->rmode.fs);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002704
Avi Kivity2fb92db2011-04-27 19:42:18 +03002705 vmx_segment_cache_clear(vmx);
2706
Avi Kivity6aa8b732006-12-10 02:21:36 -08002707 vmcs_write16(GUEST_SS_SELECTOR, 0);
2708 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
2709
2710 vmcs_write16(GUEST_CS_SELECTOR,
2711 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
2712 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
2713}
2714
Mike Dayd77c26f2007-10-08 09:02:08 -04002715static gva_t rmode_tss_base(struct kvm *kvm)
Avi Kivity6aa8b732006-12-10 02:21:36 -08002716{
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08002717 if (!kvm->arch.tss_addr) {
Marcelo Tosattibc6678a2009-12-23 14:35:21 -02002718 struct kvm_memslots *slots;
2719 gfn_t base_gfn;
2720
Lai Jiangshan90d83dc2010-04-19 17:41:23 +08002721 slots = kvm_memslots(kvm);
Avi Kivityf495c6e2010-06-10 17:21:29 +03002722 base_gfn = slots->memslots[0].base_gfn +
Marcelo Tosatti46a26bf2009-12-23 14:35:16 -02002723 kvm->memslots->memslots[0].npages - 3;
Izik Eiduscbc94022007-10-25 00:29:55 +02002724 return base_gfn << PAGE_SHIFT;
2725 }
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08002726 return kvm->arch.tss_addr;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002727}
2728
2729static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
2730{
2731 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
2732
2733 save->selector = vmcs_read16(sf->selector);
2734 save->base = vmcs_readl(sf->base);
2735 save->limit = vmcs_read32(sf->limit);
2736 save->ar = vmcs_read32(sf->ar_bytes);
Jan Kiszka15b00f32007-11-19 10:21:45 +01002737 vmcs_write16(sf->selector, save->base >> 4);
Gleb Natapov444e8632010-12-27 17:25:04 +02002738 vmcs_write32(sf->base, save->base & 0xffff0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002739 vmcs_write32(sf->limit, 0xffff);
2740 vmcs_write32(sf->ar_bytes, 0xf3);
Gleb Natapov444e8632010-12-27 17:25:04 +02002741 if (save->base & 0xf)
2742 printk_once(KERN_WARNING "kvm: segment base is not paragraph"
2743 " aligned when entering protected mode (seg=%d)",
2744 seg);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002745}
2746
2747static void enter_rmode(struct kvm_vcpu *vcpu)
2748{
2749 unsigned long flags;
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002750 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002751
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002752 if (enable_unrestricted_guest)
2753 return;
2754
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002755 vmx->emulation_required = 1;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002756 vmx->rmode.vm86_active = 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002757
Gleb Natapov776e58e2011-03-13 12:34:27 +02002758 /*
2759 * Very old userspace does not call KVM_SET_TSS_ADDR before entering
2760 * vcpu. Call it here with phys address pointing 16M below 4G.
2761 */
2762 if (!vcpu->kvm->arch.tss_addr) {
2763 printk_once(KERN_WARNING "kvm: KVM_SET_TSS_ADDR need to be "
2764 "called before entering vcpu\n");
2765 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
2766 vmx_set_tss_addr(vcpu->kvm, 0xfeffd000);
2767 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
2768 }
2769
Avi Kivity2fb92db2011-04-27 19:42:18 +03002770 vmx_segment_cache_clear(vmx);
2771
Avi Kivityd0ba64f2011-01-03 14:28:51 +02002772 vmx->rmode.tr.selector = vmcs_read16(GUEST_TR_SELECTOR);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002773 vmx->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002774 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
2775
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002776 vmx->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002777 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
2778
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002779 vmx->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002780 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
2781
2782 flags = vmcs_readl(GUEST_RFLAGS);
Avi Kivity78ac8b42010-04-08 18:19:35 +03002783 vmx->rmode.save_rflags = flags;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002784
Glauber de Oliveira Costa053de042008-01-30 13:31:27 +01002785 flags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
Avi Kivity6aa8b732006-12-10 02:21:36 -08002786
2787 vmcs_writel(GUEST_RFLAGS, flags);
Rusty Russell66aee912007-07-17 23:34:16 +10002788 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | X86_CR4_VME);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002789 update_exception_bitmap(vcpu);
2790
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002791 if (emulate_invalid_guest_state)
2792 goto continue_rmode;
2793
Avi Kivity6aa8b732006-12-10 02:21:36 -08002794 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
2795 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
2796 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
2797
2798 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
Michael Riepeabacf8d2006-12-22 01:05:45 -08002799 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
Avi Kivity8cb5b032007-03-20 18:40:40 +02002800 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
2801 vmcs_writel(GUEST_CS_BASE, 0xf0000);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002802 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
2803
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002804 fix_rmode_seg(VCPU_SREG_ES, &vmx->rmode.es);
2805 fix_rmode_seg(VCPU_SREG_DS, &vmx->rmode.ds);
2806 fix_rmode_seg(VCPU_SREG_GS, &vmx->rmode.gs);
2807 fix_rmode_seg(VCPU_SREG_FS, &vmx->rmode.fs);
Avi Kivity75880a02007-06-20 11:20:04 +03002808
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03002809continue_rmode:
Eddie Dong8668a3c2007-10-10 14:26:45 +08002810 kvm_mmu_reset_context(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002811}
2812
Amit Shah401d10d2009-02-20 22:53:37 +05302813static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
2814{
2815 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity26bb0982009-09-07 11:14:12 +03002816 struct shared_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
2817
2818 if (!msr)
2819 return;
Amit Shah401d10d2009-02-20 22:53:37 +05302820
Avi Kivity44ea2b12009-09-06 15:55:37 +03002821 /*
2822 * Force kernel_gs_base reloading before EFER changes, as control
2823 * of this msr depends on is_long_mode().
2824 */
2825 vmx_load_host_state(to_vmx(vcpu));
Avi Kivityf6801df2010-01-21 15:31:50 +02002826 vcpu->arch.efer = efer;
Amit Shah401d10d2009-02-20 22:53:37 +05302827 if (efer & EFER_LMA) {
2828 vmcs_write32(VM_ENTRY_CONTROLS,
2829 vmcs_read32(VM_ENTRY_CONTROLS) |
2830 VM_ENTRY_IA32E_MODE);
2831 msr->data = efer;
2832 } else {
2833 vmcs_write32(VM_ENTRY_CONTROLS,
2834 vmcs_read32(VM_ENTRY_CONTROLS) &
2835 ~VM_ENTRY_IA32E_MODE);
2836
2837 msr->data = efer & ~EFER_LME;
2838 }
2839 setup_msrs(vmx);
2840}
2841
Avi Kivity05b3e0c2006-12-13 00:33:45 -08002842#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08002843
2844static void enter_lmode(struct kvm_vcpu *vcpu)
2845{
2846 u32 guest_tr_ar;
2847
Avi Kivity2fb92db2011-04-27 19:42:18 +03002848 vmx_segment_cache_clear(to_vmx(vcpu));
2849
Avi Kivity6aa8b732006-12-10 02:21:36 -08002850 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
2851 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
Jan Kiszkabd801582011-09-12 11:26:22 +02002852 pr_debug_ratelimited("%s: tss fixup for long mode. \n",
2853 __func__);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002854 vmcs_write32(GUEST_TR_AR_BYTES,
2855 (guest_tr_ar & ~AR_TYPE_MASK)
2856 | AR_TYPE_BUSY_64_TSS);
2857 }
Avi Kivityda38f432010-07-06 11:30:49 +03002858 vmx_set_efer(vcpu, vcpu->arch.efer | EFER_LMA);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002859}
2860
2861static void exit_lmode(struct kvm_vcpu *vcpu)
2862{
Avi Kivity6aa8b732006-12-10 02:21:36 -08002863 vmcs_write32(VM_ENTRY_CONTROLS,
2864 vmcs_read32(VM_ENTRY_CONTROLS)
Li, Xin B1e4e6e02007-08-01 21:49:10 +03002865 & ~VM_ENTRY_IA32E_MODE);
Avi Kivityda38f432010-07-06 11:30:49 +03002866 vmx_set_efer(vcpu, vcpu->arch.efer & ~EFER_LMA);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002867}
2868
2869#endif
2870
Sheng Yang2384d2b2008-01-17 15:14:33 +08002871static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
2872{
Gui Jianfengb9d762f2010-06-07 10:32:29 +08002873 vpid_sync_context(to_vmx(vcpu));
Xiao Guangrongdd180b32010-07-03 16:02:42 +08002874 if (enable_ept) {
2875 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2876 return;
Sheng Yang4e1096d2008-07-06 19:16:51 +08002877 ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
Xiao Guangrongdd180b32010-07-03 16:02:42 +08002878 }
Sheng Yang2384d2b2008-01-17 15:14:33 +08002879}
2880
Avi Kivitye8467fd2009-12-29 18:43:06 +02002881static void vmx_decache_cr0_guest_bits(struct kvm_vcpu *vcpu)
2882{
2883 ulong cr0_guest_owned_bits = vcpu->arch.cr0_guest_owned_bits;
2884
2885 vcpu->arch.cr0 &= ~cr0_guest_owned_bits;
2886 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & cr0_guest_owned_bits;
2887}
2888
Avi Kivityaff48ba2010-12-05 18:56:11 +02002889static void vmx_decache_cr3(struct kvm_vcpu *vcpu)
2890{
2891 if (enable_ept && is_paging(vcpu))
2892 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3);
2893 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
2894}
2895
Anthony Liguori25c4c272007-04-27 09:29:21 +03002896static void vmx_decache_cr4_guest_bits(struct kvm_vcpu *vcpu)
Avi Kivity399badf2007-01-05 16:36:38 -08002897{
Avi Kivityfc78f512009-12-07 12:16:48 +02002898 ulong cr4_guest_owned_bits = vcpu->arch.cr4_guest_owned_bits;
2899
2900 vcpu->arch.cr4 &= ~cr4_guest_owned_bits;
2901 vcpu->arch.cr4 |= vmcs_readl(GUEST_CR4) & cr4_guest_owned_bits;
Avi Kivity399badf2007-01-05 16:36:38 -08002902}
2903
Sheng Yang14394422008-04-28 12:24:45 +08002904static void ept_load_pdptrs(struct kvm_vcpu *vcpu)
2905{
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002906 if (!test_bit(VCPU_EXREG_PDPTR,
2907 (unsigned long *)&vcpu->arch.regs_dirty))
2908 return;
2909
Sheng Yang14394422008-04-28 12:24:45 +08002910 if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
Joerg Roedelff03a072010-09-10 17:30:57 +02002911 vmcs_write64(GUEST_PDPTR0, vcpu->arch.mmu.pdptrs[0]);
2912 vmcs_write64(GUEST_PDPTR1, vcpu->arch.mmu.pdptrs[1]);
2913 vmcs_write64(GUEST_PDPTR2, vcpu->arch.mmu.pdptrs[2]);
2914 vmcs_write64(GUEST_PDPTR3, vcpu->arch.mmu.pdptrs[3]);
Sheng Yang14394422008-04-28 12:24:45 +08002915 }
2916}
2917
Avi Kivity8f5d5492009-05-31 18:41:29 +03002918static void ept_save_pdptrs(struct kvm_vcpu *vcpu)
2919{
2920 if (is_paging(vcpu) && is_pae(vcpu) && !is_long_mode(vcpu)) {
Joerg Roedelff03a072010-09-10 17:30:57 +02002921 vcpu->arch.mmu.pdptrs[0] = vmcs_read64(GUEST_PDPTR0);
2922 vcpu->arch.mmu.pdptrs[1] = vmcs_read64(GUEST_PDPTR1);
2923 vcpu->arch.mmu.pdptrs[2] = vmcs_read64(GUEST_PDPTR2);
2924 vcpu->arch.mmu.pdptrs[3] = vmcs_read64(GUEST_PDPTR3);
Avi Kivity8f5d5492009-05-31 18:41:29 +03002925 }
Avi Kivity6de4f3a2009-05-31 22:58:47 +03002926
2927 __set_bit(VCPU_EXREG_PDPTR,
2928 (unsigned long *)&vcpu->arch.regs_avail);
2929 __set_bit(VCPU_EXREG_PDPTR,
2930 (unsigned long *)&vcpu->arch.regs_dirty);
Avi Kivity8f5d5492009-05-31 18:41:29 +03002931}
2932
Nadav Har'El5e1746d2011-05-25 23:03:24 +03002933static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
Sheng Yang14394422008-04-28 12:24:45 +08002934
2935static void ept_update_paging_mode_cr0(unsigned long *hw_cr0,
2936 unsigned long cr0,
2937 struct kvm_vcpu *vcpu)
2938{
Marcelo Tosatti5233dd52011-06-06 14:27:47 -03002939 if (!test_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail))
2940 vmx_decache_cr3(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08002941 if (!(cr0 & X86_CR0_PG)) {
2942 /* From paging/starting to nonpaging */
2943 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
Sheng Yang65267ea2008-06-18 14:43:38 +08002944 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) |
Sheng Yang14394422008-04-28 12:24:45 +08002945 (CPU_BASED_CR3_LOAD_EXITING |
2946 CPU_BASED_CR3_STORE_EXITING));
2947 vcpu->arch.cr0 = cr0;
Avi Kivityfc78f512009-12-07 12:16:48 +02002948 vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
Sheng Yang14394422008-04-28 12:24:45 +08002949 } else if (!is_paging(vcpu)) {
2950 /* From nonpaging to paging */
2951 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL,
Sheng Yang65267ea2008-06-18 14:43:38 +08002952 vmcs_read32(CPU_BASED_VM_EXEC_CONTROL) &
Sheng Yang14394422008-04-28 12:24:45 +08002953 ~(CPU_BASED_CR3_LOAD_EXITING |
2954 CPU_BASED_CR3_STORE_EXITING));
2955 vcpu->arch.cr0 = cr0;
Avi Kivityfc78f512009-12-07 12:16:48 +02002956 vmx_set_cr4(vcpu, kvm_read_cr4(vcpu));
Sheng Yang14394422008-04-28 12:24:45 +08002957 }
Sheng Yang95eb84a2009-08-19 09:52:18 +08002958
2959 if (!(cr0 & X86_CR0_WP))
2960 *hw_cr0 &= ~X86_CR0_WP;
Sheng Yang14394422008-04-28 12:24:45 +08002961}
2962
Avi Kivity6aa8b732006-12-10 02:21:36 -08002963static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
2964{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002965 struct vcpu_vmx *vmx = to_vmx(vcpu);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07002966 unsigned long hw_cr0;
2967
2968 if (enable_unrestricted_guest)
2969 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK_UNRESTRICTED_GUEST)
2970 | KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST;
2971 else
2972 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON;
Sheng Yang14394422008-04-28 12:24:45 +08002973
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002974 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE))
Avi Kivity6aa8b732006-12-10 02:21:36 -08002975 enter_pmode(vcpu);
2976
Avi Kivity7ffd92c2009-06-09 14:10:45 +03002977 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE))
Avi Kivity6aa8b732006-12-10 02:21:36 -08002978 enter_rmode(vcpu);
2979
Avi Kivity05b3e0c2006-12-13 00:33:45 -08002980#ifdef CONFIG_X86_64
Avi Kivityf6801df2010-01-21 15:31:50 +02002981 if (vcpu->arch.efer & EFER_LME) {
Rusty Russell707d92f2007-07-17 23:19:08 +10002982 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG))
Avi Kivity6aa8b732006-12-10 02:21:36 -08002983 enter_lmode(vcpu);
Rusty Russell707d92f2007-07-17 23:19:08 +10002984 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG))
Avi Kivity6aa8b732006-12-10 02:21:36 -08002985 exit_lmode(vcpu);
2986 }
2987#endif
2988
Avi Kivity089d0342009-03-23 18:26:32 +02002989 if (enable_ept)
Sheng Yang14394422008-04-28 12:24:45 +08002990 ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu);
2991
Avi Kivity02daab22009-12-30 12:40:26 +02002992 if (!vcpu->fpu_active)
Avi Kivity81231c62010-01-24 16:26:40 +02002993 hw_cr0 |= X86_CR0_TS | X86_CR0_MP;
Avi Kivity02daab22009-12-30 12:40:26 +02002994
Avi Kivity6aa8b732006-12-10 02:21:36 -08002995 vmcs_writel(CR0_READ_SHADOW, cr0);
Sheng Yang14394422008-04-28 12:24:45 +08002996 vmcs_writel(GUEST_CR0, hw_cr0);
Zhang Xiantaoad312c72007-12-13 23:50:52 +08002997 vcpu->arch.cr0 = cr0;
Avi Kivity69c73022011-03-07 15:26:44 +02002998 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity6aa8b732006-12-10 02:21:36 -08002999}
3000
Sheng Yang14394422008-04-28 12:24:45 +08003001static u64 construct_eptp(unsigned long root_hpa)
3002{
3003 u64 eptp;
3004
3005 /* TODO write the value reading from MSR */
3006 eptp = VMX_EPT_DEFAULT_MT |
3007 VMX_EPT_DEFAULT_GAW << VMX_EPT_GAW_EPTP_SHIFT;
3008 eptp |= (root_hpa & PAGE_MASK);
3009
3010 return eptp;
3011}
3012
Avi Kivity6aa8b732006-12-10 02:21:36 -08003013static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
3014{
Sheng Yang14394422008-04-28 12:24:45 +08003015 unsigned long guest_cr3;
3016 u64 eptp;
3017
3018 guest_cr3 = cr3;
Avi Kivity089d0342009-03-23 18:26:32 +02003019 if (enable_ept) {
Sheng Yang14394422008-04-28 12:24:45 +08003020 eptp = construct_eptp(cr3);
3021 vmcs_write64(EPT_POINTER, eptp);
Avi Kivity9f8fe502010-12-05 17:30:00 +02003022 guest_cr3 = is_paging(vcpu) ? kvm_read_cr3(vcpu) :
Sheng Yangb927a3c2009-07-21 10:42:48 +08003023 vcpu->kvm->arch.ept_identity_map_addr;
Marcelo Tosatti7c93be42009-10-26 16:48:33 -02003024 ept_load_pdptrs(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08003025 }
3026
Sheng Yang2384d2b2008-01-17 15:14:33 +08003027 vmx_flush_tlb(vcpu);
Sheng Yang14394422008-04-28 12:24:45 +08003028 vmcs_writel(GUEST_CR3, guest_cr3);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003029}
3030
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003031static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003032{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003033 unsigned long hw_cr4 = cr4 | (to_vmx(vcpu)->rmode.vm86_active ?
Sheng Yang14394422008-04-28 12:24:45 +08003034 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON);
3035
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003036 if (cr4 & X86_CR4_VMXE) {
3037 /*
3038 * To use VMXON (and later other VMX instructions), a guest
3039 * must first be able to turn on cr4.VMXE (see handle_vmon()).
3040 * So basically the check on whether to allow nested VMX
3041 * is here.
3042 */
3043 if (!nested_vmx_allowed(vcpu))
3044 return 1;
3045 } else if (to_vmx(vcpu)->nested.vmxon)
3046 return 1;
3047
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003048 vcpu->arch.cr4 = cr4;
Avi Kivitybc230082009-12-08 12:14:42 +02003049 if (enable_ept) {
3050 if (!is_paging(vcpu)) {
3051 hw_cr4 &= ~X86_CR4_PAE;
3052 hw_cr4 |= X86_CR4_PSE;
3053 } else if (!(cr4 & X86_CR4_PAE)) {
3054 hw_cr4 &= ~X86_CR4_PAE;
3055 }
3056 }
Sheng Yang14394422008-04-28 12:24:45 +08003057
3058 vmcs_writel(CR4_READ_SHADOW, cr4);
3059 vmcs_writel(GUEST_CR4, hw_cr4);
Nadav Har'El5e1746d2011-05-25 23:03:24 +03003060 return 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003061}
3062
Avi Kivity6aa8b732006-12-10 02:21:36 -08003063static void vmx_get_segment(struct kvm_vcpu *vcpu,
3064 struct kvm_segment *var, int seg)
3065{
Avi Kivitya9179492011-01-03 14:28:52 +02003066 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivitya9179492011-01-03 14:28:52 +02003067 struct kvm_save_segment *save;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003068 u32 ar;
3069
Avi Kivitya9179492011-01-03 14:28:52 +02003070 if (vmx->rmode.vm86_active
3071 && (seg == VCPU_SREG_TR || seg == VCPU_SREG_ES
3072 || seg == VCPU_SREG_DS || seg == VCPU_SREG_FS
3073 || seg == VCPU_SREG_GS)
3074 && !emulate_invalid_guest_state) {
3075 switch (seg) {
3076 case VCPU_SREG_TR: save = &vmx->rmode.tr; break;
3077 case VCPU_SREG_ES: save = &vmx->rmode.es; break;
3078 case VCPU_SREG_DS: save = &vmx->rmode.ds; break;
3079 case VCPU_SREG_FS: save = &vmx->rmode.fs; break;
3080 case VCPU_SREG_GS: save = &vmx->rmode.gs; break;
3081 default: BUG();
3082 }
3083 var->selector = save->selector;
3084 var->base = save->base;
3085 var->limit = save->limit;
3086 ar = save->ar;
3087 if (seg == VCPU_SREG_TR
Avi Kivity2fb92db2011-04-27 19:42:18 +03003088 || var->selector == vmx_read_guest_seg_selector(vmx, seg))
Avi Kivitya9179492011-01-03 14:28:52 +02003089 goto use_saved_rmode_seg;
3090 }
Avi Kivity2fb92db2011-04-27 19:42:18 +03003091 var->base = vmx_read_guest_seg_base(vmx, seg);
3092 var->limit = vmx_read_guest_seg_limit(vmx, seg);
3093 var->selector = vmx_read_guest_seg_selector(vmx, seg);
3094 ar = vmx_read_guest_seg_ar(vmx, seg);
Avi Kivitya9179492011-01-03 14:28:52 +02003095use_saved_rmode_seg:
Avi Kivity9fd4a3b2009-01-04 23:43:42 +02003096 if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003097 ar = 0;
3098 var->type = ar & 15;
3099 var->s = (ar >> 4) & 1;
3100 var->dpl = (ar >> 5) & 3;
3101 var->present = (ar >> 7) & 1;
3102 var->avl = (ar >> 12) & 1;
3103 var->l = (ar >> 13) & 1;
3104 var->db = (ar >> 14) & 1;
3105 var->g = (ar >> 15) & 1;
3106 var->unusable = (ar >> 16) & 1;
3107}
3108
Avi Kivitya9179492011-01-03 14:28:52 +02003109static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
3110{
Avi Kivitya9179492011-01-03 14:28:52 +02003111 struct kvm_segment s;
3112
3113 if (to_vmx(vcpu)->rmode.vm86_active) {
3114 vmx_get_segment(vcpu, &s, seg);
3115 return s.base;
3116 }
Avi Kivity2fb92db2011-04-27 19:42:18 +03003117 return vmx_read_guest_seg_base(to_vmx(vcpu), seg);
Avi Kivitya9179492011-01-03 14:28:52 +02003118}
3119
Avi Kivity69c73022011-03-07 15:26:44 +02003120static int __vmx_get_cpl(struct kvm_vcpu *vcpu)
Izik Eidus2e4d2652008-03-24 19:38:34 +02003121{
Avi Kivity3eeb3282010-01-21 15:31:48 +02003122 if (!is_protmode(vcpu))
Izik Eidus2e4d2652008-03-24 19:38:34 +02003123 return 0;
3124
Avi Kivityf4c63e52011-03-07 14:54:28 +02003125 if (!is_long_mode(vcpu)
3126 && (kvm_get_rflags(vcpu) & X86_EFLAGS_VM)) /* if virtual 8086 */
Izik Eidus2e4d2652008-03-24 19:38:34 +02003127 return 3;
3128
Avi Kivity2fb92db2011-04-27 19:42:18 +03003129 return vmx_read_guest_seg_selector(to_vmx(vcpu), VCPU_SREG_CS) & 3;
Izik Eidus2e4d2652008-03-24 19:38:34 +02003130}
3131
Avi Kivity69c73022011-03-07 15:26:44 +02003132static int vmx_get_cpl(struct kvm_vcpu *vcpu)
3133{
3134 if (!test_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail)) {
3135 __set_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
3136 to_vmx(vcpu)->cpl = __vmx_get_cpl(vcpu);
3137 }
3138 return to_vmx(vcpu)->cpl;
3139}
3140
3141
Avi Kivity653e3102007-05-07 10:55:37 +03003142static u32 vmx_segment_access_rights(struct kvm_segment *var)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003143{
Avi Kivity6aa8b732006-12-10 02:21:36 -08003144 u32 ar;
3145
Avi Kivity653e3102007-05-07 10:55:37 +03003146 if (var->unusable)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003147 ar = 1 << 16;
3148 else {
3149 ar = var->type & 15;
3150 ar |= (var->s & 1) << 4;
3151 ar |= (var->dpl & 3) << 5;
3152 ar |= (var->present & 1) << 7;
3153 ar |= (var->avl & 1) << 12;
3154 ar |= (var->l & 1) << 13;
3155 ar |= (var->db & 1) << 14;
3156 ar |= (var->g & 1) << 15;
3157 }
Uri Lublinf7fbf1f2006-12-13 00:34:00 -08003158 if (ar == 0) /* a 0 value means unusable */
3159 ar = AR_UNUSABLE_MASK;
Avi Kivity653e3102007-05-07 10:55:37 +03003160
3161 return ar;
3162}
3163
3164static void vmx_set_segment(struct kvm_vcpu *vcpu,
3165 struct kvm_segment *var, int seg)
3166{
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003167 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity653e3102007-05-07 10:55:37 +03003168 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
3169 u32 ar;
3170
Avi Kivity2fb92db2011-04-27 19:42:18 +03003171 vmx_segment_cache_clear(vmx);
3172
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003173 if (vmx->rmode.vm86_active && seg == VCPU_SREG_TR) {
Gleb Natapova8ba6c22011-02-21 12:07:58 +02003174 vmcs_write16(sf->selector, var->selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003175 vmx->rmode.tr.selector = var->selector;
3176 vmx->rmode.tr.base = var->base;
3177 vmx->rmode.tr.limit = var->limit;
3178 vmx->rmode.tr.ar = vmx_segment_access_rights(var);
Avi Kivity653e3102007-05-07 10:55:37 +03003179 return;
3180 }
3181 vmcs_writel(sf->base, var->base);
3182 vmcs_write32(sf->limit, var->limit);
3183 vmcs_write16(sf->selector, var->selector);
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003184 if (vmx->rmode.vm86_active && var->s) {
Avi Kivity653e3102007-05-07 10:55:37 +03003185 /*
3186 * Hack real-mode segments into vm86 compatibility.
3187 */
3188 if (var->base == 0xffff0000 && var->selector == 0xf000)
3189 vmcs_writel(sf->base, 0xf0000);
3190 ar = 0xf3;
3191 } else
3192 ar = vmx_segment_access_rights(var);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003193
3194 /*
3195 * Fix the "Accessed" bit in AR field of segment registers for older
3196 * qemu binaries.
3197 * IA32 arch specifies that at the time of processor reset the
3198 * "Accessed" bit in the AR field of segment registers is 1. And qemu
3199 * is setting it to 0 in the usedland code. This causes invalid guest
3200 * state vmexit when "unrestricted guest" mode is turned on.
3201 * Fix for this setup issue in cpu_reset is being pushed in the qemu
3202 * tree. Newer qemu binaries with that qemu fix would not need this
3203 * kvm hack.
3204 */
3205 if (enable_unrestricted_guest && (seg != VCPU_SREG_LDTR))
3206 ar |= 0x1; /* Accessed */
3207
Avi Kivity6aa8b732006-12-10 02:21:36 -08003208 vmcs_write32(sf->ar_bytes, ar);
Avi Kivity69c73022011-03-07 15:26:44 +02003209 __clear_bit(VCPU_EXREG_CPL, (ulong *)&vcpu->arch.regs_avail);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003210}
3211
Avi Kivity6aa8b732006-12-10 02:21:36 -08003212static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3213{
Avi Kivity2fb92db2011-04-27 19:42:18 +03003214 u32 ar = vmx_read_guest_seg_ar(to_vmx(vcpu), VCPU_SREG_CS);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003215
3216 *db = (ar >> 14) & 1;
3217 *l = (ar >> 13) & 1;
3218}
3219
Gleb Natapov89a27f42010-02-16 10:51:48 +02003220static void vmx_get_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003221{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003222 dt->size = vmcs_read32(GUEST_IDTR_LIMIT);
3223 dt->address = vmcs_readl(GUEST_IDTR_BASE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003224}
3225
Gleb Natapov89a27f42010-02-16 10:51:48 +02003226static void vmx_set_idt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003227{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003228 vmcs_write32(GUEST_IDTR_LIMIT, dt->size);
3229 vmcs_writel(GUEST_IDTR_BASE, dt->address);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003230}
3231
Gleb Natapov89a27f42010-02-16 10:51:48 +02003232static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003233{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003234 dt->size = vmcs_read32(GUEST_GDTR_LIMIT);
3235 dt->address = vmcs_readl(GUEST_GDTR_BASE);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003236}
3237
Gleb Natapov89a27f42010-02-16 10:51:48 +02003238static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct desc_ptr *dt)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003239{
Gleb Natapov89a27f42010-02-16 10:51:48 +02003240 vmcs_write32(GUEST_GDTR_LIMIT, dt->size);
3241 vmcs_writel(GUEST_GDTR_BASE, dt->address);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003242}
3243
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003244static bool rmode_segment_valid(struct kvm_vcpu *vcpu, int seg)
3245{
3246 struct kvm_segment var;
3247 u32 ar;
3248
3249 vmx_get_segment(vcpu, &var, seg);
3250 ar = vmx_segment_access_rights(&var);
3251
3252 if (var.base != (var.selector << 4))
3253 return false;
3254 if (var.limit != 0xffff)
3255 return false;
3256 if (ar != 0xf3)
3257 return false;
3258
3259 return true;
3260}
3261
3262static bool code_segment_valid(struct kvm_vcpu *vcpu)
3263{
3264 struct kvm_segment cs;
3265 unsigned int cs_rpl;
3266
3267 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
3268 cs_rpl = cs.selector & SELECTOR_RPL_MASK;
3269
Avi Kivity1872a3f2009-01-04 23:26:52 +02003270 if (cs.unusable)
3271 return false;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003272 if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
3273 return false;
3274 if (!cs.s)
3275 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003276 if (cs.type & AR_TYPE_WRITEABLE_MASK) {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003277 if (cs.dpl > cs_rpl)
3278 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003279 } else {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003280 if (cs.dpl != cs_rpl)
3281 return false;
3282 }
3283 if (!cs.present)
3284 return false;
3285
3286 /* TODO: Add Reserved field check, this'll require a new member in the kvm_segment_field structure */
3287 return true;
3288}
3289
3290static bool stack_segment_valid(struct kvm_vcpu *vcpu)
3291{
3292 struct kvm_segment ss;
3293 unsigned int ss_rpl;
3294
3295 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
3296 ss_rpl = ss.selector & SELECTOR_RPL_MASK;
3297
Avi Kivity1872a3f2009-01-04 23:26:52 +02003298 if (ss.unusable)
3299 return true;
3300 if (ss.type != 3 && ss.type != 7)
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003301 return false;
3302 if (!ss.s)
3303 return false;
3304 if (ss.dpl != ss_rpl) /* DPL != RPL */
3305 return false;
3306 if (!ss.present)
3307 return false;
3308
3309 return true;
3310}
3311
3312static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
3313{
3314 struct kvm_segment var;
3315 unsigned int rpl;
3316
3317 vmx_get_segment(vcpu, &var, seg);
3318 rpl = var.selector & SELECTOR_RPL_MASK;
3319
Avi Kivity1872a3f2009-01-04 23:26:52 +02003320 if (var.unusable)
3321 return true;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003322 if (!var.s)
3323 return false;
3324 if (!var.present)
3325 return false;
3326 if (~var.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK)) {
3327 if (var.dpl < rpl) /* DPL < RPL */
3328 return false;
3329 }
3330
3331 /* TODO: Add other members to kvm_segment_field to allow checking for other access
3332 * rights flags
3333 */
3334 return true;
3335}
3336
3337static bool tr_valid(struct kvm_vcpu *vcpu)
3338{
3339 struct kvm_segment tr;
3340
3341 vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);
3342
Avi Kivity1872a3f2009-01-04 23:26:52 +02003343 if (tr.unusable)
3344 return false;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003345 if (tr.selector & SELECTOR_TI_MASK) /* TI = 1 */
3346 return false;
Avi Kivity1872a3f2009-01-04 23:26:52 +02003347 if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003348 return false;
3349 if (!tr.present)
3350 return false;
3351
3352 return true;
3353}
3354
3355static bool ldtr_valid(struct kvm_vcpu *vcpu)
3356{
3357 struct kvm_segment ldtr;
3358
3359 vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);
3360
Avi Kivity1872a3f2009-01-04 23:26:52 +02003361 if (ldtr.unusable)
3362 return true;
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003363 if (ldtr.selector & SELECTOR_TI_MASK) /* TI = 1 */
3364 return false;
3365 if (ldtr.type != 2)
3366 return false;
3367 if (!ldtr.present)
3368 return false;
3369
3370 return true;
3371}
3372
3373static bool cs_ss_rpl_check(struct kvm_vcpu *vcpu)
3374{
3375 struct kvm_segment cs, ss;
3376
3377 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
3378 vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
3379
3380 return ((cs.selector & SELECTOR_RPL_MASK) ==
3381 (ss.selector & SELECTOR_RPL_MASK));
3382}
3383
3384/*
3385 * Check if guest state is valid. Returns true if valid, false if
3386 * not.
3387 * We assume that registers are always usable
3388 */
3389static bool guest_state_valid(struct kvm_vcpu *vcpu)
3390{
3391 /* real mode guest state checks */
Avi Kivity3eeb3282010-01-21 15:31:48 +02003392 if (!is_protmode(vcpu)) {
Mohammed Gamal648dfaa2008-08-17 16:38:32 +03003393 if (!rmode_segment_valid(vcpu, VCPU_SREG_CS))
3394 return false;
3395 if (!rmode_segment_valid(vcpu, VCPU_SREG_SS))
3396 return false;
3397 if (!rmode_segment_valid(vcpu, VCPU_SREG_DS))
3398 return false;
3399 if (!rmode_segment_valid(vcpu, VCPU_SREG_ES))
3400 return false;
3401 if (!rmode_segment_valid(vcpu, VCPU_SREG_FS))
3402 return false;
3403 if (!rmode_segment_valid(vcpu, VCPU_SREG_GS))
3404 return false;
3405 } else {
3406 /* protected mode guest state checks */
3407 if (!cs_ss_rpl_check(vcpu))
3408 return false;
3409 if (!code_segment_valid(vcpu))
3410 return false;
3411 if (!stack_segment_valid(vcpu))
3412 return false;
3413 if (!data_segment_valid(vcpu, VCPU_SREG_DS))
3414 return false;
3415 if (!data_segment_valid(vcpu, VCPU_SREG_ES))
3416 return false;
3417 if (!data_segment_valid(vcpu, VCPU_SREG_FS))
3418 return false;
3419 if (!data_segment_valid(vcpu, VCPU_SREG_GS))
3420 return false;
3421 if (!tr_valid(vcpu))
3422 return false;
3423 if (!ldtr_valid(vcpu))
3424 return false;
3425 }
3426 /* TODO:
3427 * - Add checks on RIP
3428 * - Add checks on RFLAGS
3429 */
3430
3431 return true;
3432}
3433
Mike Dayd77c26f2007-10-08 09:02:08 -04003434static int init_rmode_tss(struct kvm *kvm)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003435{
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003436 gfn_t fn;
Izik Eidus195aefd2007-10-01 22:14:18 +02003437 u16 data = 0;
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003438 int r, idx, ret = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003439
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003440 idx = srcu_read_lock(&kvm->srcu);
3441 fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
Izik Eidus195aefd2007-10-01 22:14:18 +02003442 r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
3443 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003444 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003445 data = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
Sheng Yang464d17c2008-08-13 14:10:33 +08003446 r = kvm_write_guest_page(kvm, fn++, &data,
3447 TSS_IOPB_BASE_OFFSET, sizeof(u16));
Izik Eidus195aefd2007-10-01 22:14:18 +02003448 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003449 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003450 r = kvm_clear_guest_page(kvm, fn++, 0, PAGE_SIZE);
3451 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003452 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003453 r = kvm_clear_guest_page(kvm, fn, 0, PAGE_SIZE);
3454 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003455 goto out;
Izik Eidus195aefd2007-10-01 22:14:18 +02003456 data = ~0;
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003457 r = kvm_write_guest_page(kvm, fn, &data,
3458 RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1,
3459 sizeof(u8));
Izik Eidus195aefd2007-10-01 22:14:18 +02003460 if (r < 0)
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003461 goto out;
3462
3463 ret = 1;
3464out:
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003465 srcu_read_unlock(&kvm->srcu, idx);
Marcelo Tosatti10589a42007-12-20 19:18:22 -05003466 return ret;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003467}
3468
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003469static int init_rmode_identity_map(struct kvm *kvm)
3470{
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003471 int i, idx, r, ret;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003472 pfn_t identity_map_pfn;
3473 u32 tmp;
3474
Avi Kivity089d0342009-03-23 18:26:32 +02003475 if (!enable_ept)
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003476 return 1;
3477 if (unlikely(!kvm->arch.ept_identity_pagetable)) {
3478 printk(KERN_ERR "EPT: identity-mapping pagetable "
3479 "haven't been allocated!\n");
3480 return 0;
3481 }
3482 if (likely(kvm->arch.ept_identity_pagetable_done))
3483 return 1;
3484 ret = 0;
Sheng Yangb927a3c2009-07-21 10:42:48 +08003485 identity_map_pfn = kvm->arch.ept_identity_map_addr >> PAGE_SHIFT;
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003486 idx = srcu_read_lock(&kvm->srcu);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003487 r = kvm_clear_guest_page(kvm, identity_map_pfn, 0, PAGE_SIZE);
3488 if (r < 0)
3489 goto out;
3490 /* Set up identity-mapping pagetable for EPT in real mode */
3491 for (i = 0; i < PT32_ENT_PER_PAGE; i++) {
3492 tmp = (i << 22) + (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER |
3493 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_PSE);
3494 r = kvm_write_guest_page(kvm, identity_map_pfn,
3495 &tmp, i * sizeof(tmp), sizeof(tmp));
3496 if (r < 0)
3497 goto out;
3498 }
3499 kvm->arch.ept_identity_pagetable_done = true;
3500 ret = 1;
3501out:
Xiao Guangrong40dcaa92011-03-09 15:41:04 +08003502 srcu_read_unlock(&kvm->srcu, idx);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003503 return ret;
3504}
3505
Avi Kivity6aa8b732006-12-10 02:21:36 -08003506static void seg_setup(int seg)
3507{
3508 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003509 unsigned int ar;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003510
3511 vmcs_write16(sf->selector, 0);
3512 vmcs_writel(sf->base, 0);
3513 vmcs_write32(sf->limit, 0xffff);
Nitin A Kamble3a624e22009-06-08 11:34:16 -07003514 if (enable_unrestricted_guest) {
3515 ar = 0x93;
3516 if (seg == VCPU_SREG_CS)
3517 ar |= 0x08; /* code segment */
3518 } else
3519 ar = 0xf3;
3520
3521 vmcs_write32(sf->ar_bytes, ar);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003522}
3523
Sheng Yangf78e0e22007-10-29 09:40:42 +08003524static int alloc_apic_access_page(struct kvm *kvm)
3525{
3526 struct kvm_userspace_memory_region kvm_userspace_mem;
3527 int r = 0;
3528
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003529 mutex_lock(&kvm->slots_lock);
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08003530 if (kvm->arch.apic_access_page)
Sheng Yangf78e0e22007-10-29 09:40:42 +08003531 goto out;
3532 kvm_userspace_mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
3533 kvm_userspace_mem.flags = 0;
3534 kvm_userspace_mem.guest_phys_addr = 0xfee00000ULL;
3535 kvm_userspace_mem.memory_size = PAGE_SIZE;
3536 r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
3537 if (r)
3538 goto out;
Izik Eidus72dc67a2008-02-10 18:04:15 +02003539
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08003540 kvm->arch.apic_access_page = gfn_to_page(kvm, 0xfee00);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003541out:
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003542 mutex_unlock(&kvm->slots_lock);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003543 return r;
3544}
3545
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003546static int alloc_identity_pagetable(struct kvm *kvm)
3547{
3548 struct kvm_userspace_memory_region kvm_userspace_mem;
3549 int r = 0;
3550
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003551 mutex_lock(&kvm->slots_lock);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003552 if (kvm->arch.ept_identity_pagetable)
3553 goto out;
3554 kvm_userspace_mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
3555 kvm_userspace_mem.flags = 0;
Sheng Yangb927a3c2009-07-21 10:42:48 +08003556 kvm_userspace_mem.guest_phys_addr =
3557 kvm->arch.ept_identity_map_addr;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003558 kvm_userspace_mem.memory_size = PAGE_SIZE;
3559 r = __kvm_set_memory_region(kvm, &kvm_userspace_mem, 0);
3560 if (r)
3561 goto out;
3562
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003563 kvm->arch.ept_identity_pagetable = gfn_to_page(kvm,
Sheng Yangb927a3c2009-07-21 10:42:48 +08003564 kvm->arch.ept_identity_map_addr >> PAGE_SHIFT);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003565out:
Marcelo Tosatti79fac952009-12-23 14:35:26 -02003566 mutex_unlock(&kvm->slots_lock);
Sheng Yangb7ebfb02008-04-25 21:44:52 +08003567 return r;
3568}
3569
Sheng Yang2384d2b2008-01-17 15:14:33 +08003570static void allocate_vpid(struct vcpu_vmx *vmx)
3571{
3572 int vpid;
3573
3574 vmx->vpid = 0;
Avi Kivity919818a2009-03-23 18:01:29 +02003575 if (!enable_vpid)
Sheng Yang2384d2b2008-01-17 15:14:33 +08003576 return;
3577 spin_lock(&vmx_vpid_lock);
3578 vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS);
3579 if (vpid < VMX_NR_VPIDS) {
3580 vmx->vpid = vpid;
3581 __set_bit(vpid, vmx_vpid_bitmap);
3582 }
3583 spin_unlock(&vmx_vpid_lock);
3584}
3585
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08003586static void free_vpid(struct vcpu_vmx *vmx)
3587{
3588 if (!enable_vpid)
3589 return;
3590 spin_lock(&vmx_vpid_lock);
3591 if (vmx->vpid != 0)
3592 __clear_bit(vmx->vpid, vmx_vpid_bitmap);
3593 spin_unlock(&vmx_vpid_lock);
3594}
3595
Avi Kivity58972972009-02-24 22:26:47 +02003596static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr)
Sheng Yang25c5f222008-03-28 13:18:56 +08003597{
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003598 int f = sizeof(unsigned long);
Sheng Yang25c5f222008-03-28 13:18:56 +08003599
3600 if (!cpu_has_vmx_msr_bitmap())
3601 return;
3602
3603 /*
3604 * See Intel PRM Vol. 3, 20.6.9 (MSR-Bitmap Address). Early manuals
3605 * have the write-low and read-high bitmap offsets the wrong way round.
3606 * We can control MSRs 0x00000000-0x00001fff and 0xc0000000-0xc0001fff.
3607 */
Sheng Yang25c5f222008-03-28 13:18:56 +08003608 if (msr <= 0x1fff) {
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003609 __clear_bit(msr, msr_bitmap + 0x000 / f); /* read-low */
3610 __clear_bit(msr, msr_bitmap + 0x800 / f); /* write-low */
Sheng Yang25c5f222008-03-28 13:18:56 +08003611 } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) {
3612 msr &= 0x1fff;
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003613 __clear_bit(msr, msr_bitmap + 0x400 / f); /* read-high */
3614 __clear_bit(msr, msr_bitmap + 0xc00 / f); /* write-high */
Sheng Yang25c5f222008-03-28 13:18:56 +08003615 }
Sheng Yang25c5f222008-03-28 13:18:56 +08003616}
3617
Avi Kivity58972972009-02-24 22:26:47 +02003618static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only)
3619{
3620 if (!longmode_only)
3621 __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy, msr);
3622 __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode, msr);
3623}
3624
Avi Kivity6aa8b732006-12-10 02:21:36 -08003625/*
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003626 * Set up the vmcs's constant host-state fields, i.e., host-state fields that
3627 * will not change in the lifetime of the guest.
3628 * Note that host-state that does change is set elsewhere. E.g., host-state
3629 * that is set differently for each CPU is set in vmx_vcpu_load(), not here.
3630 */
3631static void vmx_set_constant_host_state(void)
3632{
3633 u32 low32, high32;
3634 unsigned long tmpl;
3635 struct desc_ptr dt;
3636
3637 vmcs_writel(HOST_CR0, read_cr0() | X86_CR0_TS); /* 22.2.3 */
3638 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
3639 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
3640
3641 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
3642 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
3643 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
3644 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
3645 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
3646
3647 native_store_idt(&dt);
3648 vmcs_writel(HOST_IDTR_BASE, dt.address); /* 22.2.4 */
3649
3650 asm("mov $.Lkvm_vmx_return, %0" : "=r"(tmpl));
3651 vmcs_writel(HOST_RIP, tmpl); /* 22.2.5 */
3652
3653 rdmsr(MSR_IA32_SYSENTER_CS, low32, high32);
3654 vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
3655 rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
3656 vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl); /* 22.2.3 */
3657
3658 if (vmcs_config.vmexit_ctrl & VM_EXIT_LOAD_IA32_PAT) {
3659 rdmsr(MSR_IA32_CR_PAT, low32, high32);
3660 vmcs_write64(HOST_IA32_PAT, low32 | ((u64) high32 << 32));
3661 }
3662}
3663
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003664static void set_cr4_guest_host_mask(struct vcpu_vmx *vmx)
3665{
3666 vmx->vcpu.arch.cr4_guest_owned_bits = KVM_CR4_GUEST_OWNED_BITS;
3667 if (enable_ept)
3668 vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE;
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03003669 if (is_guest_mode(&vmx->vcpu))
3670 vmx->vcpu.arch.cr4_guest_owned_bits &=
3671 ~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask;
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003672 vmcs_writel(CR4_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr4_guest_owned_bits);
3673}
3674
3675static u32 vmx_exec_control(struct vcpu_vmx *vmx)
3676{
3677 u32 exec_control = vmcs_config.cpu_based_exec_ctrl;
3678 if (!vm_need_tpr_shadow(vmx->vcpu.kvm)) {
3679 exec_control &= ~CPU_BASED_TPR_SHADOW;
3680#ifdef CONFIG_X86_64
3681 exec_control |= CPU_BASED_CR8_STORE_EXITING |
3682 CPU_BASED_CR8_LOAD_EXITING;
3683#endif
3684 }
3685 if (!enable_ept)
3686 exec_control |= CPU_BASED_CR3_STORE_EXITING |
3687 CPU_BASED_CR3_LOAD_EXITING |
3688 CPU_BASED_INVLPG_EXITING;
3689 return exec_control;
3690}
3691
3692static u32 vmx_secondary_exec_control(struct vcpu_vmx *vmx)
3693{
3694 u32 exec_control = vmcs_config.cpu_based_2nd_exec_ctrl;
3695 if (!vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
3696 exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
3697 if (vmx->vpid == 0)
3698 exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
3699 if (!enable_ept) {
3700 exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
3701 enable_unrestricted_guest = 0;
3702 }
3703 if (!enable_unrestricted_guest)
3704 exec_control &= ~SECONDARY_EXEC_UNRESTRICTED_GUEST;
3705 if (!ple_gap)
3706 exec_control &= ~SECONDARY_EXEC_PAUSE_LOOP_EXITING;
3707 return exec_control;
3708}
3709
Xiao Guangrongce88dec2011-07-12 03:33:44 +08003710static void ept_set_mmio_spte_mask(void)
3711{
3712 /*
3713 * EPT Misconfigurations can be generated if the value of bits 2:0
3714 * of an EPT paging-structure entry is 110b (write/execute).
3715 * Also, magic bits (0xffull << 49) is set to quickly identify mmio
3716 * spte.
3717 */
3718 kvm_mmu_set_mmio_spte_mask(0xffull << 49 | 0x6ull);
3719}
3720
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003721/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08003722 * Sets up the vmcs for emulated real mode.
3723 */
Rusty Russell8b9cf982007-07-30 16:31:43 +10003724static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
Avi Kivity6aa8b732006-12-10 02:21:36 -08003725{
Jan Kiszka2e4ce7f2011-06-01 12:57:30 +02003726#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08003727 unsigned long a;
Jan Kiszka2e4ce7f2011-06-01 12:57:30 +02003728#endif
Avi Kivity6aa8b732006-12-10 02:21:36 -08003729 int i;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003730
Avi Kivity6aa8b732006-12-10 02:21:36 -08003731 /* I/O */
Avi Kivity3e7c73e2009-02-24 21:46:19 +02003732 vmcs_write64(IO_BITMAP_A, __pa(vmx_io_bitmap_a));
3733 vmcs_write64(IO_BITMAP_B, __pa(vmx_io_bitmap_b));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003734
Sheng Yang25c5f222008-03-28 13:18:56 +08003735 if (cpu_has_vmx_msr_bitmap())
Avi Kivity58972972009-02-24 22:26:47 +02003736 vmcs_write64(MSR_BITMAP, __pa(vmx_msr_bitmap_legacy));
Sheng Yang25c5f222008-03-28 13:18:56 +08003737
Avi Kivity6aa8b732006-12-10 02:21:36 -08003738 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
3739
Avi Kivity6aa8b732006-12-10 02:21:36 -08003740 /* Control */
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03003741 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
3742 vmcs_config.pin_based_exec_ctrl);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08003743
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003744 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, vmx_exec_control(vmx));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003745
Sheng Yang83ff3b92007-11-21 14:33:25 +08003746 if (cpu_has_secondary_exec_ctrls()) {
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003747 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
3748 vmx_secondary_exec_control(vmx));
Sheng Yang83ff3b92007-11-21 14:33:25 +08003749 }
Sheng Yangf78e0e22007-10-29 09:40:42 +08003750
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08003751 if (ple_gap) {
3752 vmcs_write32(PLE_GAP, ple_gap);
3753 vmcs_write32(PLE_WINDOW, ple_window);
3754 }
3755
Xiao Guangrongc3707952011-07-12 03:28:04 +08003756 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
3757 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003758 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
3759
Avi Kivity9581d442010-10-19 16:46:55 +02003760 vmcs_write16(HOST_FS_SELECTOR, 0); /* 22.2.4 */
3761 vmcs_write16(HOST_GS_SELECTOR, 0); /* 22.2.4 */
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003762 vmx_set_constant_host_state();
Avi Kivity05b3e0c2006-12-13 00:33:45 -08003763#ifdef CONFIG_X86_64
Avi Kivity6aa8b732006-12-10 02:21:36 -08003764 rdmsrl(MSR_FS_BASE, a);
3765 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
3766 rdmsrl(MSR_GS_BASE, a);
3767 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
3768#else
3769 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
3770 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
3771#endif
3772
Eddie Dong2cc51562007-05-21 07:28:09 +03003773 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, 0);
3774 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, 0);
Avi Kivity61d2ef22010-04-28 16:40:38 +03003775 vmcs_write64(VM_EXIT_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.host));
Eddie Dong2cc51562007-05-21 07:28:09 +03003776 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, 0);
Avi Kivity61d2ef22010-04-28 16:40:38 +03003777 vmcs_write64(VM_ENTRY_MSR_LOAD_ADDR, __pa(vmx->msr_autoload.guest));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003778
Sheng Yang468d4722008-10-09 16:01:55 +08003779 if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT) {
Nadav Har'Ela3a8ff82011-05-25 23:09:01 +03003780 u32 msr_low, msr_high;
3781 u64 host_pat;
Sheng Yang468d4722008-10-09 16:01:55 +08003782 rdmsr(MSR_IA32_CR_PAT, msr_low, msr_high);
3783 host_pat = msr_low | ((u64) msr_high << 32);
3784 /* Write the default value follow host pat */
3785 vmcs_write64(GUEST_IA32_PAT, host_pat);
3786 /* Keep arch.pat sync with GUEST_IA32_PAT */
3787 vmx->vcpu.arch.pat = host_pat;
3788 }
3789
Avi Kivity6aa8b732006-12-10 02:21:36 -08003790 for (i = 0; i < NR_VMX_MSR; ++i) {
3791 u32 index = vmx_msr_index[i];
3792 u32 data_low, data_high;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04003793 int j = vmx->nmsrs;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003794
3795 if (rdmsr_safe(index, &data_low, &data_high) < 0)
3796 continue;
Avi Kivity432bd6c2007-01-31 23:48:13 -08003797 if (wrmsr_safe(index, data_low, data_high) < 0)
3798 continue;
Avi Kivity26bb0982009-09-07 11:14:12 +03003799 vmx->guest_msrs[j].index = i;
3800 vmx->guest_msrs[j].data = 0;
Avi Kivityd5696722009-12-02 12:28:47 +02003801 vmx->guest_msrs[j].mask = -1ull;
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04003802 ++vmx->nmsrs;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003803 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08003804
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03003805 vmcs_write32(VM_EXIT_CONTROLS, vmcs_config.vmexit_ctrl);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003806
3807 /* 22.2.1, 20.8.1 */
Yang, Sheng1c3d14f2007-07-29 11:07:42 +03003808 vmcs_write32(VM_ENTRY_CONTROLS, vmcs_config.vmentry_ctrl);
3809
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003810 vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
Nadav Har'Elbf8179a2011-05-25 23:09:31 +03003811 set_cr4_guest_host_mask(vmx);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003812
Zachary Amsden99e3e302010-08-19 22:07:17 -10003813 kvm_write_tsc(&vmx->vcpu, 0);
Sheng Yangf78e0e22007-10-29 09:40:42 +08003814
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003815 return 0;
3816}
3817
3818static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
3819{
3820 struct vcpu_vmx *vmx = to_vmx(vcpu);
3821 u64 msr;
Xiao Guangrong4b9d3a02010-06-08 10:15:51 +08003822 int ret;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003823
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003824 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003825
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003826 vmx->rmode.vm86_active = 0;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003827
Jan Kiszka3b86cd92008-09-26 09:30:57 +02003828 vmx->soft_vnmi_blocked = 0;
3829
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003830 vmx->vcpu.arch.regs[VCPU_REGS_RDX] = get_rdx_init_val();
Avi Kivity2d3ad1f2008-02-24 11:20:43 +02003831 kvm_set_cr8(&vmx->vcpu, 0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003832 msr = 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003833 if (kvm_vcpu_is_bsp(&vmx->vcpu))
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003834 msr |= MSR_IA32_APICBASE_BSP;
3835 kvm_set_apic_base(&vmx->vcpu, msr);
3836
Jan Kiszka10ab25c2010-05-25 16:01:50 +02003837 ret = fx_init(&vmx->vcpu);
3838 if (ret != 0)
3839 goto out;
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003840
Avi Kivity2fb92db2011-04-27 19:42:18 +03003841 vmx_segment_cache_clear(vmx);
3842
Avi Kivity5706be02008-08-20 15:07:31 +03003843 seg_setup(VCPU_SREG_CS);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003844 /*
3845 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
3846 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
3847 */
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003848 if (kvm_vcpu_is_bsp(&vmx->vcpu)) {
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003849 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
3850 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
3851 } else {
Zhang Xiantaoad312c72007-12-13 23:50:52 +08003852 vmcs_write16(GUEST_CS_SELECTOR, vmx->vcpu.arch.sipi_vector << 8);
3853 vmcs_writel(GUEST_CS_BASE, vmx->vcpu.arch.sipi_vector << 12);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003854 }
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003855
3856 seg_setup(VCPU_SREG_DS);
3857 seg_setup(VCPU_SREG_ES);
3858 seg_setup(VCPU_SREG_FS);
3859 seg_setup(VCPU_SREG_GS);
3860 seg_setup(VCPU_SREG_SS);
3861
3862 vmcs_write16(GUEST_TR_SELECTOR, 0);
3863 vmcs_writel(GUEST_TR_BASE, 0);
3864 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
3865 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
3866
3867 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
3868 vmcs_writel(GUEST_LDTR_BASE, 0);
3869 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
3870 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
3871
3872 vmcs_write32(GUEST_SYSENTER_CS, 0);
3873 vmcs_writel(GUEST_SYSENTER_ESP, 0);
3874 vmcs_writel(GUEST_SYSENTER_EIP, 0);
3875
3876 vmcs_writel(GUEST_RFLAGS, 0x02);
Gleb Natapovc5af89b2009-06-09 15:56:26 +03003877 if (kvm_vcpu_is_bsp(&vmx->vcpu))
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003878 kvm_rip_write(vcpu, 0xfff0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003879 else
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03003880 kvm_rip_write(vcpu, 0);
3881 kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003882
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003883 vmcs_writel(GUEST_DR7, 0x400);
3884
3885 vmcs_writel(GUEST_GDTR_BASE, 0);
3886 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
3887
3888 vmcs_writel(GUEST_IDTR_BASE, 0);
3889 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
3890
Anthony Liguori443381a2010-12-06 10:53:38 -06003891 vmcs_write32(GUEST_ACTIVITY_STATE, GUEST_ACTIVITY_ACTIVE);
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003892 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
3893 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
3894
Avi Kivitye00c8cf2007-10-21 11:00:39 +02003895 /* Special registers */
3896 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
3897
3898 setup_msrs(vmx);
3899
Avi Kivity6aa8b732006-12-10 02:21:36 -08003900 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
3901
Sheng Yangf78e0e22007-10-29 09:40:42 +08003902 if (cpu_has_vmx_tpr_shadow()) {
3903 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR, 0);
3904 if (vm_need_tpr_shadow(vmx->vcpu.kvm))
3905 vmcs_write64(VIRTUAL_APIC_PAGE_ADDR,
Takuya Yoshikawaafc20182011-03-05 12:40:20 +09003906 __pa(vmx->vcpu.arch.apic->regs));
Sheng Yangf78e0e22007-10-29 09:40:42 +08003907 vmcs_write32(TPR_THRESHOLD, 0);
3908 }
3909
3910 if (vm_need_virtualize_apic_accesses(vmx->vcpu.kvm))
3911 vmcs_write64(APIC_ACCESS_ADDR,
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08003912 page_to_phys(vmx->vcpu.kvm->arch.apic_access_page));
Avi Kivity6aa8b732006-12-10 02:21:36 -08003913
Sheng Yang2384d2b2008-01-17 15:14:33 +08003914 if (vmx->vpid != 0)
3915 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
3916
Eduardo Habkostfa400522009-10-24 02:49:58 -02003917 vmx->vcpu.arch.cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET;
Avi Kivity4d4ec082009-12-29 18:07:30 +02003918 vmx_set_cr0(&vmx->vcpu, kvm_read_cr0(vcpu)); /* enter rmode */
Rusty Russell8b9cf982007-07-30 16:31:43 +10003919 vmx_set_cr4(&vmx->vcpu, 0);
Rusty Russell8b9cf982007-07-30 16:31:43 +10003920 vmx_set_efer(&vmx->vcpu, 0);
Rusty Russell8b9cf982007-07-30 16:31:43 +10003921 vmx_fpu_activate(&vmx->vcpu);
3922 update_exception_bitmap(&vmx->vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08003923
Gui Jianfengb9d762f2010-06-07 10:32:29 +08003924 vpid_sync_context(vmx);
Sheng Yang2384d2b2008-01-17 15:14:33 +08003925
Marcelo Tosatti3200f402008-03-29 20:17:59 -03003926 ret = 0;
Avi Kivity6aa8b732006-12-10 02:21:36 -08003927
Mohammed Gamala89a8fb2008-08-17 16:42:16 +03003928 /* HACK: Don't enable emulation on guest boot/reset */
3929 vmx->emulation_required = 0;
3930
Avi Kivity6aa8b732006-12-10 02:21:36 -08003931out:
3932 return ret;
3933}
3934
Nadav Har'Elb6f12502011-05-25 23:13:06 +03003935/*
3936 * In nested virtualization, check if L1 asked to exit on external interrupts.
3937 * For most existing hypervisors, this will always return true.
3938 */
3939static bool nested_exit_on_intr(struct kvm_vcpu *vcpu)
3940{
3941 return get_vmcs12(vcpu)->pin_based_vm_exec_control &
3942 PIN_BASED_EXT_INTR_MASK;
3943}
3944
Jan Kiszka3b86cd92008-09-26 09:30:57 +02003945static void enable_irq_window(struct kvm_vcpu *vcpu)
3946{
3947 u32 cpu_based_vm_exec_control;
Nadav Har'Elb6f12502011-05-25 23:13:06 +03003948 if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu))
3949 /* We can get here when nested_run_pending caused
3950 * vmx_interrupt_allowed() to return false. In this case, do
3951 * nothing - the interrupt will be injected later.
3952 */
3953 return;
Jan Kiszka3b86cd92008-09-26 09:30:57 +02003954
3955 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
3956 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
3957 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
3958}
3959
3960static void enable_nmi_window(struct kvm_vcpu *vcpu)
3961{
3962 u32 cpu_based_vm_exec_control;
3963
3964 if (!cpu_has_virtual_nmis()) {
3965 enable_irq_window(vcpu);
3966 return;
3967 }
3968
Avi Kivity30bd0c42010-11-01 23:20:48 +02003969 if (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_STI) {
3970 enable_irq_window(vcpu);
3971 return;
3972 }
Jan Kiszka3b86cd92008-09-26 09:30:57 +02003973 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
3974 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_NMI_PENDING;
3975 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
3976}
3977
Gleb Natapov66fd3f72009-05-11 13:35:50 +03003978static void vmx_inject_irq(struct kvm_vcpu *vcpu)
Eddie Dong85f455f2007-07-06 12:20:49 +03003979{
Avi Kivity9c8cba32007-11-22 11:42:59 +02003980 struct vcpu_vmx *vmx = to_vmx(vcpu);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03003981 uint32_t intr;
3982 int irq = vcpu->arch.interrupt.nr;
Avi Kivity9c8cba32007-11-22 11:42:59 +02003983
Marcelo Tosatti229456f2009-06-17 09:22:14 -03003984 trace_kvm_inj_virq(irq);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04003985
Avi Kivityfa89a812008-09-01 15:57:51 +03003986 ++vcpu->stat.irq_injections;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03003987 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05003988 int inc_eip = 0;
3989 if (vcpu->arch.interrupt.soft)
3990 inc_eip = vcpu->arch.event_exit_inst_len;
3991 if (kvm_inject_realmode_interrupt(vcpu, irq, inc_eip) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02003992 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Eddie Dong85f455f2007-07-06 12:20:49 +03003993 return;
3994 }
Gleb Natapov66fd3f72009-05-11 13:35:50 +03003995 intr = irq | INTR_INFO_VALID_MASK;
3996 if (vcpu->arch.interrupt.soft) {
3997 intr |= INTR_TYPE_SOFT_INTR;
3998 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
3999 vmx->vcpu.arch.event_exit_inst_len);
4000 } else
4001 intr |= INTR_TYPE_EXT_INTR;
4002 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);
Anthony Liguori443381a2010-12-06 10:53:38 -06004003 vmx_clear_hlt(vcpu);
Eddie Dong85f455f2007-07-06 12:20:49 +03004004}
4005
Sheng Yangf08864b2008-05-15 18:23:25 +08004006static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
4007{
Jan Kiszka66a5a342008-09-26 09:30:51 +02004008 struct vcpu_vmx *vmx = to_vmx(vcpu);
4009
Nadav Har'El0b6ac342011-05-25 23:13:36 +03004010 if (is_guest_mode(vcpu))
4011 return;
4012
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004013 if (!cpu_has_virtual_nmis()) {
4014 /*
4015 * Tracking the NMI-blocked state in software is built upon
4016 * finding the next open IRQ window. This, in turn, depends on
4017 * well-behaving guests: They have to keep IRQs disabled at
4018 * least as long as the NMI handler runs. Otherwise we may
4019 * cause NMI nesting, maybe breaking the guest. But as this is
4020 * highly unlikely, we can live with the residual risk.
4021 */
4022 vmx->soft_vnmi_blocked = 1;
4023 vmx->vnmi_blocked_time = 0;
4024 }
4025
Jan Kiszka487b3912008-09-26 09:30:56 +02004026 ++vcpu->stat.nmi_injections;
Avi Kivity9d58b932011-03-07 16:52:07 +02004027 vmx->nmi_known_unmasked = false;
Avi Kivity7ffd92c2009-06-09 14:10:45 +03004028 if (vmx->rmode.vm86_active) {
Serge E. Hallyn71f98332011-04-13 09:12:54 -05004029 if (kvm_inject_realmode_interrupt(vcpu, NMI_VECTOR, 0) != EMULATE_DONE)
Mohammed Gamala92601b2010-09-19 14:34:07 +02004030 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
Jan Kiszka66a5a342008-09-26 09:30:51 +02004031 return;
4032 }
Sheng Yangf08864b2008-05-15 18:23:25 +08004033 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
4034 INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
Anthony Liguori443381a2010-12-06 10:53:38 -06004035 vmx_clear_hlt(vcpu);
Sheng Yangf08864b2008-05-15 18:23:25 +08004036}
4037
Gleb Natapovc4282df2009-04-21 17:45:07 +03004038static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
Jan Kiszka33f089c2008-09-26 09:30:49 +02004039{
Jan Kiszka3b86cd92008-09-26 09:30:57 +02004040 if (!cpu_has_virtual_nmis() && to_vmx(vcpu)->soft_vnmi_blocked)
Gleb Natapovc4282df2009-04-21 17:45:07 +03004041 return 0;
Jan Kiszka33f089c2008-09-26 09:30:49 +02004042
Gleb Natapovc4282df2009-04-21 17:45:07 +03004043 return !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
Avi Kivity30bd0c42010-11-01 23:20:48 +02004044 (GUEST_INTR_STATE_MOV_SS | GUEST_INTR_STATE_STI
4045 | GUEST_INTR_STATE_NMI));
Jan Kiszka33f089c2008-09-26 09:30:49 +02004046}
4047
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004048static bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu)
4049{
4050 if (!cpu_has_virtual_nmis())
4051 return to_vmx(vcpu)->soft_vnmi_blocked;
Avi Kivity9d58b932011-03-07 16:52:07 +02004052 if (to_vmx(vcpu)->nmi_known_unmasked)
4053 return false;
Avi Kivityc332c832010-05-04 12:24:12 +03004054 return vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_NMI;
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004055}
4056
4057static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked)
4058{
4059 struct vcpu_vmx *vmx = to_vmx(vcpu);
4060
4061 if (!cpu_has_virtual_nmis()) {
4062 if (vmx->soft_vnmi_blocked != masked) {
4063 vmx->soft_vnmi_blocked = masked;
4064 vmx->vnmi_blocked_time = 0;
4065 }
4066 } else {
Avi Kivity9d58b932011-03-07 16:52:07 +02004067 vmx->nmi_known_unmasked = !masked;
Jan Kiszka3cfc3092009-11-12 01:04:25 +01004068 if (masked)
4069 vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
4070 GUEST_INTR_STATE_NMI);
4071 else
4072 vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
4073 GUEST_INTR_STATE_NMI);
4074 }
4075}
4076
Gleb Natapov78646122009-03-23 12:12:11 +02004077static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
4078{
Nadav Har'Elb6f12502011-05-25 23:13:06 +03004079 if (is_guest_mode(vcpu) && nested_exit_on_intr(vcpu)) {
4080 struct vmcs12 *vmcs12;
4081 if (to_vmx(vcpu)->nested.nested_run_pending)
4082 return 0;
4083 nested_vmx_vmexit(vcpu);
4084 vmcs12 = get_vmcs12(vcpu);
4085 vmcs12->vm_exit_reason = EXIT_REASON_EXTERNAL_INTERRUPT;
4086 vmcs12->vm_exit_intr_info = 0;
4087 /* fall through to normal code, but now in L1, not L2 */
4088 }
4089
Gleb Natapovc4282df2009-04-21 17:45:07 +03004090 return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
4091 !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
4092 (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
Gleb Natapov78646122009-03-23 12:12:11 +02004093}
4094
Izik Eiduscbc94022007-10-25 00:29:55 +02004095static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
4096{
4097 int ret;
4098 struct kvm_userspace_memory_region tss_mem = {
Sheng Yang6fe63972008-10-16 17:30:58 +08004099 .slot = TSS_PRIVATE_MEMSLOT,
Izik Eiduscbc94022007-10-25 00:29:55 +02004100 .guest_phys_addr = addr,
4101 .memory_size = PAGE_SIZE * 3,
4102 .flags = 0,
4103 };
4104
4105 ret = kvm_set_memory_region(kvm, &tss_mem, 0);
4106 if (ret)
4107 return ret;
Zhang Xiantaobfc6d222007-12-14 10:20:16 +08004108 kvm->arch.tss_addr = addr;
Gleb Natapov93ea5382011-02-21 12:07:59 +02004109 if (!init_rmode_tss(kvm))
4110 return -ENOMEM;
4111
Izik Eiduscbc94022007-10-25 00:29:55 +02004112 return 0;
4113}
4114
Avi Kivity6aa8b732006-12-10 02:21:36 -08004115static int handle_rmode_exception(struct kvm_vcpu *vcpu,
4116 int vec, u32 err_code)
4117{
Nitin A Kambleb3f37702007-05-17 15:50:34 +03004118 /*
4119 * Instruction with address size override prefix opcode 0x67
4120 * Cause the #SS fault with 0 error code in VM86 mode.
4121 */
4122 if (((vec == GP_VECTOR) || (vec == SS_VECTOR)) && err_code == 0)
Andre Przywara51d8b662010-12-21 11:12:02 +01004123 if (emulate_instruction(vcpu, 0) == EMULATE_DONE)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004124 return 1;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004125 /*
4126 * Forward all other exceptions that are valid in real mode.
4127 * FIXME: Breaks guest debugging in real mode, needs to be fixed with
4128 * the required debugging infrastructure rework.
4129 */
4130 switch (vec) {
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004131 case DB_VECTOR:
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004132 if (vcpu->guest_debug &
4133 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
4134 return 0;
4135 kvm_queue_exception(vcpu, vec);
4136 return 1;
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004137 case BP_VECTOR:
Jan Kiszkac573cd22010-02-23 17:47:53 +01004138 /*
4139 * Update instruction length as we may reinject the exception
4140 * from user space while in guest debugging mode.
4141 */
4142 to_vmx(vcpu)->vcpu.arch.event_exit_inst_len =
4143 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004144 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
4145 return 0;
4146 /* fall through */
4147 case DE_VECTOR:
Jan Kiszka77ab6db2008-07-14 12:28:51 +02004148 case OF_VECTOR:
4149 case BR_VECTOR:
4150 case UD_VECTOR:
4151 case DF_VECTOR:
4152 case SS_VECTOR:
4153 case GP_VECTOR:
4154 case MF_VECTOR:
4155 kvm_queue_exception(vcpu, vec);
4156 return 1;
4157 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004158 return 0;
4159}
4160
Andi Kleena0861c02009-06-08 17:37:09 +08004161/*
4162 * Trigger machine check on the host. We assume all the MSRs are already set up
4163 * by the CPU and that we still run on the same CPU as the MCE occurred on.
4164 * We pass a fake environment to the machine check handler because we want
4165 * the guest to be always treated like user space, no matter what context
4166 * it used internally.
4167 */
4168static void kvm_machine_check(void)
4169{
4170#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
4171 struct pt_regs regs = {
4172 .cs = 3, /* Fake ring 3 no matter what the guest ran on */
4173 .flags = X86_EFLAGS_IF,
4174 };
4175
4176 do_machine_check(&regs, 0);
4177#endif
4178}
4179
Avi Kivity851ba692009-08-24 11:10:17 +03004180static int handle_machine_check(struct kvm_vcpu *vcpu)
Andi Kleena0861c02009-06-08 17:37:09 +08004181{
4182 /* already handled by vcpu_run */
4183 return 1;
4184}
4185
Avi Kivity851ba692009-08-24 11:10:17 +03004186static int handle_exception(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004187{
Avi Kivity1155f762007-11-22 11:30:47 +02004188 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity851ba692009-08-24 11:10:17 +03004189 struct kvm_run *kvm_run = vcpu->run;
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004190 u32 intr_info, ex_no, error_code;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004191 unsigned long cr2, rip, dr6;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004192 u32 vect_info;
4193 enum emulation_result er;
4194
Avi Kivity1155f762007-11-22 11:30:47 +02004195 vect_info = vmx->idt_vectoring_info;
Avi Kivity88786472011-03-07 17:39:45 +02004196 intr_info = vmx->exit_intr_info;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004197
Andi Kleena0861c02009-06-08 17:37:09 +08004198 if (is_machine_check(intr_info))
Avi Kivity851ba692009-08-24 11:10:17 +03004199 return handle_machine_check(vcpu);
Andi Kleena0861c02009-06-08 17:37:09 +08004200
Avi Kivity6aa8b732006-12-10 02:21:36 -08004201 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
Avi Kivity65ac7262009-11-04 11:59:01 +02004202 !is_page_fault(intr_info)) {
4203 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4204 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_SIMUL_EX;
4205 vcpu->run->internal.ndata = 2;
4206 vcpu->run->internal.data[0] = vect_info;
4207 vcpu->run->internal.data[1] = intr_info;
4208 return 0;
4209 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004210
Jan Kiszkae4a41882008-09-26 09:30:46 +02004211 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR)
Avi Kivity1b6269d2007-10-09 12:12:19 +02004212 return 1; /* already handled by vmx_vcpu_run() */
Anthony Liguori2ab455c2007-04-27 09:29:49 +03004213
4214 if (is_no_device(intr_info)) {
Avi Kivity5fd86fc2007-05-02 20:40:00 +03004215 vmx_fpu_activate(vcpu);
Anthony Liguori2ab455c2007-04-27 09:29:49 +03004216 return 1;
4217 }
4218
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004219 if (is_invalid_opcode(intr_info)) {
Andre Przywara51d8b662010-12-21 11:12:02 +01004220 er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004221 if (er != EMULATE_DONE)
Avi Kivity7ee5d9402007-11-25 15:22:50 +02004222 kvm_queue_exception(vcpu, UD_VECTOR);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004223 return 1;
4224 }
4225
Avi Kivity6aa8b732006-12-10 02:21:36 -08004226 error_code = 0;
Ryan Harper2e113842008-02-11 10:26:38 -06004227 if (intr_info & INTR_INFO_DELIVER_CODE_MASK)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004228 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
4229 if (is_page_fault(intr_info)) {
Sheng Yang14394422008-04-28 12:24:45 +08004230 /* EPT won't cause page fault directly */
Julia Lawallcf3ace72011-08-02 12:34:57 +02004231 BUG_ON(enable_ept);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004232 cr2 = vmcs_readl(EXIT_QUALIFICATION);
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004233 trace_kvm_page_fault(cr2, error_code);
4234
Gleb Natapov3298b752009-05-11 13:35:46 +03004235 if (kvm_event_needs_reinjection(vcpu))
Avi Kivity577bdc42008-07-19 08:57:05 +03004236 kvm_mmu_unprotect_page_virt(vcpu, cr2);
Andre Przywaradc25e892010-12-21 11:12:07 +01004237 return kvm_mmu_page_fault(vcpu, cr2, error_code, NULL, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004238 }
4239
Avi Kivity7ffd92c2009-06-09 14:10:45 +03004240 if (vmx->rmode.vm86_active &&
Avi Kivity6aa8b732006-12-10 02:21:36 -08004241 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004242 error_code)) {
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004243 if (vcpu->arch.halt_request) {
4244 vcpu->arch.halt_request = 0;
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004245 return kvm_emulate_halt(vcpu);
4246 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004247 return 1;
Avi Kivity72d6e5a2007-06-05 16:15:51 +03004248 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004249
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004250 ex_no = intr_info & INTR_INFO_VECTOR_MASK;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004251 switch (ex_no) {
4252 case DB_VECTOR:
4253 dr6 = vmcs_readl(EXIT_QUALIFICATION);
4254 if (!(vcpu->guest_debug &
4255 (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
4256 vcpu->arch.dr6 = dr6 | DR6_FIXED_1;
4257 kvm_queue_exception(vcpu, DB_VECTOR);
4258 return 1;
4259 }
4260 kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
4261 kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
4262 /* fall through */
4263 case BP_VECTOR:
Jan Kiszkac573cd22010-02-23 17:47:53 +01004264 /*
4265 * Update instruction length as we may reinject #BP from
4266 * user space while in guest debugging mode. Reading it for
4267 * #DB as well causes no harm, it is not used in that case.
4268 */
4269 vmx->vcpu.arch.event_exit_inst_len =
4270 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004271 kvm_run->exit_reason = KVM_EXIT_DEBUG;
Avi Kivity0a434bb2011-04-28 15:59:33 +03004272 rip = kvm_rip_read(vcpu);
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004273 kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
4274 kvm_run->debug.arch.exception = ex_no;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004275 break;
4276 default:
Jan Kiszkad0bfb942008-12-15 13:52:10 +01004277 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
4278 kvm_run->ex.exception = ex_no;
4279 kvm_run->ex.error_code = error_code;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004280 break;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004281 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004282 return 0;
4283}
4284
Avi Kivity851ba692009-08-24 11:10:17 +03004285static int handle_external_interrupt(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004286{
Avi Kivity1165f5f2007-04-19 17:27:43 +03004287 ++vcpu->stat.irq_exits;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004288 return 1;
4289}
4290
Avi Kivity851ba692009-08-24 11:10:17 +03004291static int handle_triple_fault(struct kvm_vcpu *vcpu)
Avi Kivity988ad742007-02-12 00:54:36 -08004292{
Avi Kivity851ba692009-08-24 11:10:17 +03004293 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
Avi Kivity988ad742007-02-12 00:54:36 -08004294 return 0;
4295}
Avi Kivity6aa8b732006-12-10 02:21:36 -08004296
Avi Kivity851ba692009-08-24 11:10:17 +03004297static int handle_io(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004298{
He, Qingbfdaab02007-09-12 14:18:28 +08004299 unsigned long exit_qualification;
Jan Kiszka34c33d12009-02-08 13:28:15 +01004300 int size, in, string;
Avi Kivity039576c2007-03-20 12:46:50 +02004301 unsigned port;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004302
He, Qingbfdaab02007-09-12 14:18:28 +08004303 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Avi Kivity039576c2007-03-20 12:46:50 +02004304 string = (exit_qualification & 16) != 0;
Laurent Viviere70669a2007-08-05 10:36:40 +03004305 in = (exit_qualification & 8) != 0;
Laurent Viviere70669a2007-08-05 10:36:40 +03004306
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004307 ++vcpu->stat.io_exits;
4308
4309 if (string || in)
Andre Przywara51d8b662010-12-21 11:12:02 +01004310 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004311
4312 port = exit_qualification >> 16;
4313 size = (exit_qualification & 7) + 1;
Guillaume Thouvenine93f36b2008-10-28 10:51:30 +01004314 skip_emulated_instruction(vcpu);
Gleb Natapovcf8f70b2010-03-18 15:20:23 +02004315
4316 return kvm_fast_pio_out(vcpu, size, port);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004317}
4318
Ingo Molnar102d8322007-02-19 14:37:47 +02004319static void
4320vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
4321{
4322 /*
4323 * Patch in the VMCALL instruction:
4324 */
4325 hypercall[0] = 0x0f;
4326 hypercall[1] = 0x01;
4327 hypercall[2] = 0xc1;
Ingo Molnar102d8322007-02-19 14:37:47 +02004328}
4329
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004330/* called to set cr0 as approriate for a mov-to-cr0 exit. */
4331static int handle_set_cr0(struct kvm_vcpu *vcpu, unsigned long val)
4332{
4333 if (to_vmx(vcpu)->nested.vmxon &&
4334 ((val & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON))
4335 return 1;
4336
4337 if (is_guest_mode(vcpu)) {
4338 /*
4339 * We get here when L2 changed cr0 in a way that did not change
4340 * any of L1's shadowed bits (see nested_vmx_exit_handled_cr),
4341 * but did change L0 shadowed bits. This can currently happen
4342 * with the TS bit: L0 may want to leave TS on (for lazy fpu
4343 * loading) while pretending to allow the guest to change it.
4344 */
4345 if (kvm_set_cr0(vcpu, (val & vcpu->arch.cr0_guest_owned_bits) |
4346 (vcpu->arch.cr0 & ~vcpu->arch.cr0_guest_owned_bits)))
4347 return 1;
4348 vmcs_writel(CR0_READ_SHADOW, val);
4349 return 0;
4350 } else
4351 return kvm_set_cr0(vcpu, val);
4352}
4353
4354static int handle_set_cr4(struct kvm_vcpu *vcpu, unsigned long val)
4355{
4356 if (is_guest_mode(vcpu)) {
4357 if (kvm_set_cr4(vcpu, (val & vcpu->arch.cr4_guest_owned_bits) |
4358 (vcpu->arch.cr4 & ~vcpu->arch.cr4_guest_owned_bits)))
4359 return 1;
4360 vmcs_writel(CR4_READ_SHADOW, val);
4361 return 0;
4362 } else
4363 return kvm_set_cr4(vcpu, val);
4364}
4365
4366/* called to set cr0 as approriate for clts instruction exit. */
4367static void handle_clts(struct kvm_vcpu *vcpu)
4368{
4369 if (is_guest_mode(vcpu)) {
4370 /*
4371 * We get here when L2 did CLTS, and L1 didn't shadow CR0.TS
4372 * but we did (!fpu_active). We need to keep GUEST_CR0.TS on,
4373 * just pretend it's off (also in arch.cr0 for fpu_activate).
4374 */
4375 vmcs_writel(CR0_READ_SHADOW,
4376 vmcs_readl(CR0_READ_SHADOW) & ~X86_CR0_TS);
4377 vcpu->arch.cr0 &= ~X86_CR0_TS;
4378 } else
4379 vmx_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4380}
4381
Avi Kivity851ba692009-08-24 11:10:17 +03004382static int handle_cr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004383{
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004384 unsigned long exit_qualification, val;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004385 int cr;
4386 int reg;
Avi Kivity49a9b072010-06-10 17:02:14 +03004387 int err;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004388
He, Qingbfdaab02007-09-12 14:18:28 +08004389 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004390 cr = exit_qualification & 15;
4391 reg = (exit_qualification >> 8) & 15;
4392 switch ((exit_qualification >> 4) & 3) {
4393 case 0: /* mov to cr */
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004394 val = kvm_register_read(vcpu, reg);
4395 trace_kvm_cr_write(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004396 switch (cr) {
4397 case 0:
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004398 err = handle_set_cr0(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004399 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004400 return 1;
4401 case 3:
Avi Kivity23902182010-06-10 17:02:16 +03004402 err = kvm_set_cr3(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004403 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004404 return 1;
4405 case 4:
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004406 err = handle_set_cr4(vcpu, val);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004407 kvm_complete_insn_gp(vcpu, err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004408 return 1;
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004409 case 8: {
4410 u8 cr8_prev = kvm_get_cr8(vcpu);
4411 u8 cr8 = kvm_register_read(vcpu, reg);
Andre Przywaraeea1cff2010-12-21 11:12:00 +01004412 err = kvm_set_cr8(vcpu, cr8);
Andre Przywaradb8fcef2010-12-21 11:12:01 +01004413 kvm_complete_insn_gp(vcpu, err);
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004414 if (irqchip_in_kernel(vcpu->kvm))
4415 return 1;
4416 if (cr8_prev <= cr8)
4417 return 1;
Avi Kivity851ba692009-08-24 11:10:17 +03004418 vcpu->run->exit_reason = KVM_EXIT_SET_TPR;
Gleb Natapov0a5fff192009-04-21 17:45:06 +03004419 return 0;
4420 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004421 };
4422 break;
Anthony Liguori25c4c272007-04-27 09:29:21 +03004423 case 2: /* clts */
Nadav Har'Eleeadf9e2011-05-25 23:14:38 +03004424 handle_clts(vcpu);
Avi Kivity4d4ec082009-12-29 18:07:30 +02004425 trace_kvm_cr_write(0, kvm_read_cr0(vcpu));
Anthony Liguori25c4c272007-04-27 09:29:21 +03004426 skip_emulated_instruction(vcpu);
Avi Kivity6b52d182010-01-21 15:31:47 +02004427 vmx_fpu_activate(vcpu);
Anthony Liguori25c4c272007-04-27 09:29:21 +03004428 return 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004429 case 1: /*mov from cr*/
4430 switch (cr) {
4431 case 3:
Avi Kivity9f8fe502010-12-05 17:30:00 +02004432 val = kvm_read_cr3(vcpu);
4433 kvm_register_write(vcpu, reg, val);
4434 trace_kvm_cr_read(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004435 skip_emulated_instruction(vcpu);
4436 return 1;
4437 case 8:
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004438 val = kvm_get_cr8(vcpu);
4439 kvm_register_write(vcpu, reg, val);
4440 trace_kvm_cr_read(cr, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004441 skip_emulated_instruction(vcpu);
4442 return 1;
4443 }
4444 break;
4445 case 3: /* lmsw */
Avi Kivitya1f83a72009-12-29 17:33:58 +02004446 val = (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f;
Avi Kivity4d4ec082009-12-29 18:07:30 +02004447 trace_kvm_cr_write(0, (kvm_read_cr0(vcpu) & ~0xful) | val);
Avi Kivitya1f83a72009-12-29 17:33:58 +02004448 kvm_lmsw(vcpu, val);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004449
4450 skip_emulated_instruction(vcpu);
4451 return 1;
4452 default:
4453 break;
4454 }
Avi Kivity851ba692009-08-24 11:10:17 +03004455 vcpu->run->exit_reason = 0;
Rusty Russellf0242472007-08-01 10:48:02 +10004456 pr_unimpl(vcpu, "unhandled control register: op %d cr %d\n",
Avi Kivity6aa8b732006-12-10 02:21:36 -08004457 (int)(exit_qualification >> 4) & 3, cr);
4458 return 0;
4459}
4460
Avi Kivity851ba692009-08-24 11:10:17 +03004461static int handle_dr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004462{
He, Qingbfdaab02007-09-12 14:18:28 +08004463 unsigned long exit_qualification;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004464 int dr, reg;
4465
Jan Kiszkaf2483412010-01-20 18:20:20 +01004466 /* Do not handle if the CPL > 0, will trigger GP on re-entry */
Avi Kivity0a79b002009-09-01 12:03:25 +03004467 if (!kvm_require_cpl(vcpu, 0))
4468 return 1;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004469 dr = vmcs_readl(GUEST_DR7);
4470 if (dr & DR7_GD) {
4471 /*
4472 * As the vm-exit takes precedence over the debug trap, we
4473 * need to emulate the latter, either for the host or the
4474 * guest debugging itself.
4475 */
4476 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
Avi Kivity851ba692009-08-24 11:10:17 +03004477 vcpu->run->debug.arch.dr6 = vcpu->arch.dr6;
4478 vcpu->run->debug.arch.dr7 = dr;
4479 vcpu->run->debug.arch.pc =
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004480 vmcs_readl(GUEST_CS_BASE) +
4481 vmcs_readl(GUEST_RIP);
Avi Kivity851ba692009-08-24 11:10:17 +03004482 vcpu->run->debug.arch.exception = DB_VECTOR;
4483 vcpu->run->exit_reason = KVM_EXIT_DEBUG;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004484 return 0;
4485 } else {
4486 vcpu->arch.dr7 &= ~DR7_GD;
4487 vcpu->arch.dr6 |= DR6_BD;
4488 vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
4489 kvm_queue_exception(vcpu, DB_VECTOR);
4490 return 1;
4491 }
4492 }
4493
He, Qingbfdaab02007-09-12 14:18:28 +08004494 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004495 dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
4496 reg = DEBUG_REG_ACCESS_REG(exit_qualification);
4497 if (exit_qualification & TYPE_MOV_FROM_DR) {
Gleb Natapov020df072010-04-13 10:05:23 +03004498 unsigned long val;
4499 if (!kvm_get_dr(vcpu, dr, &val))
4500 kvm_register_write(vcpu, reg, val);
4501 } else
4502 kvm_set_dr(vcpu, dr, vcpu->arch.regs[reg]);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004503 skip_emulated_instruction(vcpu);
4504 return 1;
4505}
4506
Gleb Natapov020df072010-04-13 10:05:23 +03004507static void vmx_set_dr7(struct kvm_vcpu *vcpu, unsigned long val)
4508{
4509 vmcs_writel(GUEST_DR7, val);
4510}
4511
Avi Kivity851ba692009-08-24 11:10:17 +03004512static int handle_cpuid(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004513{
Avi Kivity06465c52007-02-28 20:46:53 +02004514 kvm_emulate_cpuid(vcpu);
4515 return 1;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004516}
4517
Avi Kivity851ba692009-08-24 11:10:17 +03004518static int handle_rdmsr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004519{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004520 u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
Avi Kivity6aa8b732006-12-10 02:21:36 -08004521 u64 data;
4522
4523 if (vmx_get_msr(vcpu, ecx, &data)) {
Avi Kivity59200272010-01-25 19:47:02 +02004524 trace_kvm_msr_read_ex(ecx);
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02004525 kvm_inject_gp(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004526 return 1;
4527 }
4528
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004529 trace_kvm_msr_read(ecx, data);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004530
Avi Kivity6aa8b732006-12-10 02:21:36 -08004531 /* FIXME: handling of bits 32:63 of rax, rdx */
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004532 vcpu->arch.regs[VCPU_REGS_RAX] = data & -1u;
4533 vcpu->arch.regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
Avi Kivity6aa8b732006-12-10 02:21:36 -08004534 skip_emulated_instruction(vcpu);
4535 return 1;
4536}
4537
Avi Kivity851ba692009-08-24 11:10:17 +03004538static int handle_wrmsr(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004539{
Zhang Xiantaoad312c72007-12-13 23:50:52 +08004540 u32 ecx = vcpu->arch.regs[VCPU_REGS_RCX];
4541 u64 data = (vcpu->arch.regs[VCPU_REGS_RAX] & -1u)
4542 | ((u64)(vcpu->arch.regs[VCPU_REGS_RDX] & -1u) << 32);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004543
4544 if (vmx_set_msr(vcpu, ecx, data) != 0) {
Avi Kivity59200272010-01-25 19:47:02 +02004545 trace_kvm_msr_write_ex(ecx, data);
Avi Kivityc1a5d4f2007-11-25 14:12:03 +02004546 kvm_inject_gp(vcpu, 0);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004547 return 1;
4548 }
4549
Avi Kivity59200272010-01-25 19:47:02 +02004550 trace_kvm_msr_write(ecx, data);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004551 skip_emulated_instruction(vcpu);
4552 return 1;
4553}
4554
Avi Kivity851ba692009-08-24 11:10:17 +03004555static int handle_tpr_below_threshold(struct kvm_vcpu *vcpu)
Yang, Sheng6e5d8652007-09-12 18:03:11 +08004556{
Avi Kivity3842d132010-07-27 12:30:24 +03004557 kvm_make_request(KVM_REQ_EVENT, vcpu);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08004558 return 1;
4559}
4560
Avi Kivity851ba692009-08-24 11:10:17 +03004561static int handle_interrupt_window(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004562{
Eddie Dong85f455f2007-07-06 12:20:49 +03004563 u32 cpu_based_vm_exec_control;
4564
4565 /* clear pending irq */
4566 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4567 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
4568 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004569
Avi Kivity3842d132010-07-27 12:30:24 +03004570 kvm_make_request(KVM_REQ_EVENT, vcpu);
4571
Jan Kiszkaa26bf122008-09-26 09:30:45 +02004572 ++vcpu->stat.irq_window_exits;
Feng (Eric) Liu2714d1d2008-04-10 15:31:10 -04004573
Dor Laorc1150d82007-01-05 16:36:24 -08004574 /*
4575 * If the user space waits to inject interrupts, exit as soon as
4576 * possible
4577 */
Gleb Natapov80618232009-04-21 17:44:56 +03004578 if (!irqchip_in_kernel(vcpu->kvm) &&
Avi Kivity851ba692009-08-24 11:10:17 +03004579 vcpu->run->request_interrupt_window &&
Gleb Natapov80618232009-04-21 17:44:56 +03004580 !kvm_cpu_has_interrupt(vcpu)) {
Avi Kivity851ba692009-08-24 11:10:17 +03004581 vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
Dor Laorc1150d82007-01-05 16:36:24 -08004582 return 0;
4583 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08004584 return 1;
4585}
4586
Avi Kivity851ba692009-08-24 11:10:17 +03004587static int handle_halt(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08004588{
4589 skip_emulated_instruction(vcpu);
Avi Kivityd3bef152007-06-05 15:53:05 +03004590 return kvm_emulate_halt(vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08004591}
4592
Avi Kivity851ba692009-08-24 11:10:17 +03004593static int handle_vmcall(struct kvm_vcpu *vcpu)
Ingo Molnarc21415e2007-02-19 14:37:47 +02004594{
Dor Laor510043d2007-02-19 18:25:43 +02004595 skip_emulated_instruction(vcpu);
Anthony Liguori7aa81cc2007-09-17 14:57:50 -05004596 kvm_emulate_hypercall(vcpu);
4597 return 1;
Ingo Molnarc21415e2007-02-19 14:37:47 +02004598}
4599
Gleb Natapovec25d5e2010-11-01 15:35:01 +02004600static int handle_invd(struct kvm_vcpu *vcpu)
4601{
Andre Przywara51d8b662010-12-21 11:12:02 +01004602 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Gleb Natapovec25d5e2010-11-01 15:35:01 +02004603}
4604
Avi Kivity851ba692009-08-24 11:10:17 +03004605static int handle_invlpg(struct kvm_vcpu *vcpu)
Marcelo Tosattia7052892008-09-23 13:18:35 -03004606{
Sheng Yangf9c617f2009-03-25 10:08:52 +08004607 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Marcelo Tosattia7052892008-09-23 13:18:35 -03004608
4609 kvm_mmu_invlpg(vcpu, exit_qualification);
4610 skip_emulated_instruction(vcpu);
4611 return 1;
4612}
4613
Avi Kivity851ba692009-08-24 11:10:17 +03004614static int handle_wbinvd(struct kvm_vcpu *vcpu)
Eddie Donge5edaa02007-11-11 12:28:35 +02004615{
4616 skip_emulated_instruction(vcpu);
Sheng Yangf5f48ee2010-06-30 12:25:15 +08004617 kvm_emulate_wbinvd(vcpu);
Eddie Donge5edaa02007-11-11 12:28:35 +02004618 return 1;
4619}
4620
Dexuan Cui2acf9232010-06-10 11:27:12 +08004621static int handle_xsetbv(struct kvm_vcpu *vcpu)
4622{
4623 u64 new_bv = kvm_read_edx_eax(vcpu);
4624 u32 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4625
4626 if (kvm_set_xcr(vcpu, index, new_bv) == 0)
4627 skip_emulated_instruction(vcpu);
4628 return 1;
4629}
4630
Avi Kivity851ba692009-08-24 11:10:17 +03004631static int handle_apic_access(struct kvm_vcpu *vcpu)
Sheng Yangf78e0e22007-10-29 09:40:42 +08004632{
Kevin Tian58fbbf22011-08-30 13:56:17 +03004633 if (likely(fasteoi)) {
4634 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4635 int access_type, offset;
4636
4637 access_type = exit_qualification & APIC_ACCESS_TYPE;
4638 offset = exit_qualification & APIC_ACCESS_OFFSET;
4639 /*
4640 * Sane guest uses MOV to write EOI, with written value
4641 * not cared. So make a short-circuit here by avoiding
4642 * heavy instruction emulation.
4643 */
4644 if ((access_type == TYPE_LINEAR_APIC_INST_WRITE) &&
4645 (offset == APIC_EOI)) {
4646 kvm_lapic_set_eoi(vcpu);
4647 skip_emulated_instruction(vcpu);
4648 return 1;
4649 }
4650 }
Andre Przywara51d8b662010-12-21 11:12:02 +01004651 return emulate_instruction(vcpu, 0) == EMULATE_DONE;
Sheng Yangf78e0e22007-10-29 09:40:42 +08004652}
4653
Avi Kivity851ba692009-08-24 11:10:17 +03004654static int handle_task_switch(struct kvm_vcpu *vcpu)
Izik Eidus37817f22008-03-24 23:14:53 +02004655{
Jan Kiszka60637aa2008-09-26 09:30:47 +02004656 struct vcpu_vmx *vmx = to_vmx(vcpu);
Izik Eidus37817f22008-03-24 23:14:53 +02004657 unsigned long exit_qualification;
Jan Kiszkae269fb22010-04-14 15:51:09 +02004658 bool has_error_code = false;
4659 u32 error_code = 0;
Izik Eidus37817f22008-03-24 23:14:53 +02004660 u16 tss_selector;
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004661 int reason, type, idt_v;
4662
4663 idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
4664 type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK);
Izik Eidus37817f22008-03-24 23:14:53 +02004665
4666 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
4667
4668 reason = (u32)exit_qualification >> 30;
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004669 if (reason == TASK_SWITCH_GATE && idt_v) {
4670 switch (type) {
4671 case INTR_TYPE_NMI_INTR:
4672 vcpu->arch.nmi_injected = false;
Avi Kivity654f06f2011-03-23 15:02:47 +02004673 vmx_set_nmi_mask(vcpu, true);
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004674 break;
4675 case INTR_TYPE_EXT_INTR:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03004676 case INTR_TYPE_SOFT_INTR:
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004677 kvm_clear_interrupt_queue(vcpu);
4678 break;
4679 case INTR_TYPE_HARD_EXCEPTION:
Jan Kiszkae269fb22010-04-14 15:51:09 +02004680 if (vmx->idt_vectoring_info &
4681 VECTORING_INFO_DELIVER_CODE_MASK) {
4682 has_error_code = true;
4683 error_code =
4684 vmcs_read32(IDT_VECTORING_ERROR_CODE);
4685 }
4686 /* fall through */
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004687 case INTR_TYPE_SOFT_EXCEPTION:
4688 kvm_clear_exception_queue(vcpu);
4689 break;
4690 default:
4691 break;
4692 }
Jan Kiszka60637aa2008-09-26 09:30:47 +02004693 }
Izik Eidus37817f22008-03-24 23:14:53 +02004694 tss_selector = exit_qualification;
4695
Gleb Natapov64a7ec02009-03-30 16:03:29 +03004696 if (!idt_v || (type != INTR_TYPE_HARD_EXCEPTION &&
4697 type != INTR_TYPE_EXT_INTR &&
4698 type != INTR_TYPE_NMI_INTR))
4699 skip_emulated_instruction(vcpu);
4700
Gleb Natapovacb54512010-04-15 21:03:50 +03004701 if (kvm_task_switch(vcpu, tss_selector, reason,
4702 has_error_code, error_code) == EMULATE_FAIL) {
4703 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4704 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4705 vcpu->run->internal.ndata = 0;
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004706 return 0;
Gleb Natapovacb54512010-04-15 21:03:50 +03004707 }
Jan Kiszka42dbaa52008-12-15 13:52:10 +01004708
4709 /* clear all local breakpoint enable flags */
4710 vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55);
4711
4712 /*
4713 * TODO: What about debug traps on tss switch?
4714 * Are we supposed to inject them and update dr6?
4715 */
4716
4717 return 1;
Izik Eidus37817f22008-03-24 23:14:53 +02004718}
4719
Avi Kivity851ba692009-08-24 11:10:17 +03004720static int handle_ept_violation(struct kvm_vcpu *vcpu)
Sheng Yang14394422008-04-28 12:24:45 +08004721{
Sheng Yangf9c617f2009-03-25 10:08:52 +08004722 unsigned long exit_qualification;
Sheng Yang14394422008-04-28 12:24:45 +08004723 gpa_t gpa;
Sheng Yang14394422008-04-28 12:24:45 +08004724 int gla_validity;
Sheng Yang14394422008-04-28 12:24:45 +08004725
Sheng Yangf9c617f2009-03-25 10:08:52 +08004726 exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
Sheng Yang14394422008-04-28 12:24:45 +08004727
4728 if (exit_qualification & (1 << 6)) {
4729 printk(KERN_ERR "EPT: GPA exceeds GAW!\n");
Jan Kiszka7f582ab2009-07-22 23:53:01 +02004730 return -EINVAL;
Sheng Yang14394422008-04-28 12:24:45 +08004731 }
4732
4733 gla_validity = (exit_qualification >> 7) & 0x3;
4734 if (gla_validity != 0x3 && gla_validity != 0x1 && gla_validity != 0) {
4735 printk(KERN_ERR "EPT: Handling EPT violation failed!\n");
4736 printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
4737 (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
Sheng Yangf9c617f2009-03-25 10:08:52 +08004738 vmcs_readl(GUEST_LINEAR_ADDRESS));
Sheng Yang14394422008-04-28 12:24:45 +08004739 printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
4740 (long unsigned int)exit_qualification);
Avi Kivity851ba692009-08-24 11:10:17 +03004741 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
4742 vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_VIOLATION;
Avi Kivity596ae892009-06-03 14:12:10 +03004743 return 0;
Sheng Yang14394422008-04-28 12:24:45 +08004744 }
4745
4746 gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
Marcelo Tosatti229456f2009-06-17 09:22:14 -03004747 trace_kvm_page_fault(gpa, exit_qualification);
Andre Przywaradc25e892010-12-21 11:12:07 +01004748 return kvm_mmu_page_fault(vcpu, gpa, exit_qualification & 0x3, NULL, 0);
Sheng Yang14394422008-04-28 12:24:45 +08004749}
4750
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004751static u64 ept_rsvd_mask(u64 spte, int level)
4752{
4753 int i;
4754 u64 mask = 0;
4755
4756 for (i = 51; i > boot_cpu_data.x86_phys_bits; i--)
4757 mask |= (1ULL << i);
4758
4759 if (level > 2)
4760 /* bits 7:3 reserved */
4761 mask |= 0xf8;
4762 else if (level == 2) {
4763 if (spte & (1ULL << 7))
4764 /* 2MB ref, bits 20:12 reserved */
4765 mask |= 0x1ff000;
4766 else
4767 /* bits 6:3 reserved */
4768 mask |= 0x78;
4769 }
4770
4771 return mask;
4772}
4773
4774static void ept_misconfig_inspect_spte(struct kvm_vcpu *vcpu, u64 spte,
4775 int level)
4776{
4777 printk(KERN_ERR "%s: spte 0x%llx level %d\n", __func__, spte, level);
4778
4779 /* 010b (write-only) */
4780 WARN_ON((spte & 0x7) == 0x2);
4781
4782 /* 110b (write/execute) */
4783 WARN_ON((spte & 0x7) == 0x6);
4784
4785 /* 100b (execute-only) and value not supported by logical processor */
4786 if (!cpu_has_vmx_ept_execute_only())
4787 WARN_ON((spte & 0x7) == 0x4);
4788
4789 /* not 000b */
4790 if ((spte & 0x7)) {
4791 u64 rsvd_bits = spte & ept_rsvd_mask(spte, level);
4792
4793 if (rsvd_bits != 0) {
4794 printk(KERN_ERR "%s: rsvd_bits = 0x%llx\n",
4795 __func__, rsvd_bits);
4796 WARN_ON(1);
4797 }
4798
4799 if (level == 1 || (level == 2 && (spte & (1ULL << 7)))) {
4800 u64 ept_mem_type = (spte & 0x38) >> 3;
4801
4802 if (ept_mem_type == 2 || ept_mem_type == 3 ||
4803 ept_mem_type == 7) {
4804 printk(KERN_ERR "%s: ept_mem_type=0x%llx\n",
4805 __func__, ept_mem_type);
4806 WARN_ON(1);
4807 }
4808 }
4809 }
4810}
4811
Avi Kivity851ba692009-08-24 11:10:17 +03004812static int handle_ept_misconfig(struct kvm_vcpu *vcpu)
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004813{
4814 u64 sptes[4];
Xiao Guangrongce88dec2011-07-12 03:33:44 +08004815 int nr_sptes, i, ret;
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004816 gpa_t gpa;
4817
4818 gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
4819
Xiao Guangrongce88dec2011-07-12 03:33:44 +08004820 ret = handle_mmio_page_fault_common(vcpu, gpa, true);
4821 if (likely(ret == 1))
4822 return x86_emulate_instruction(vcpu, gpa, 0, NULL, 0) ==
4823 EMULATE_DONE;
4824 if (unlikely(!ret))
4825 return 1;
4826
4827 /* It is the real ept misconfig */
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004828 printk(KERN_ERR "EPT: Misconfiguration.\n");
4829 printk(KERN_ERR "EPT: GPA: 0x%llx\n", gpa);
4830
4831 nr_sptes = kvm_mmu_get_spte_hierarchy(vcpu, gpa, sptes);
4832
4833 for (i = PT64_ROOT_LEVEL; i > PT64_ROOT_LEVEL - nr_sptes; --i)
4834 ept_misconfig_inspect_spte(vcpu, sptes[i-1], i);
4835
Avi Kivity851ba692009-08-24 11:10:17 +03004836 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
4837 vcpu->run->hw.hardware_exit_reason = EXIT_REASON_EPT_MISCONFIG;
Marcelo Tosatti68f89402009-06-11 12:07:43 -03004838
4839 return 0;
4840}
4841
Avi Kivity851ba692009-08-24 11:10:17 +03004842static int handle_nmi_window(struct kvm_vcpu *vcpu)
Sheng Yangf08864b2008-05-15 18:23:25 +08004843{
4844 u32 cpu_based_vm_exec_control;
4845
4846 /* clear pending NMI */
4847 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4848 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
4849 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
4850 ++vcpu->stat.nmi_window_exits;
Avi Kivity3842d132010-07-27 12:30:24 +03004851 kvm_make_request(KVM_REQ_EVENT, vcpu);
Sheng Yangf08864b2008-05-15 18:23:25 +08004852
4853 return 1;
4854}
4855
Mohammed Gamal80ced182009-09-01 12:48:18 +02004856static int handle_invalid_guest_state(struct kvm_vcpu *vcpu)
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004857{
Avi Kivity8b3079a2009-01-05 12:10:54 +02004858 struct vcpu_vmx *vmx = to_vmx(vcpu);
4859 enum emulation_result err = EMULATE_DONE;
Mohammed Gamal80ced182009-09-01 12:48:18 +02004860 int ret = 1;
Avi Kivity49e9d552010-09-19 14:34:08 +02004861 u32 cpu_exec_ctrl;
4862 bool intr_window_requested;
4863
4864 cpu_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
4865 intr_window_requested = cpu_exec_ctrl & CPU_BASED_VIRTUAL_INTR_PENDING;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004866
4867 while (!guest_state_valid(vcpu)) {
Avi Kivity49e9d552010-09-19 14:34:08 +02004868 if (intr_window_requested
4869 && (kvm_get_rflags(&vmx->vcpu) & X86_EFLAGS_IF))
4870 return handle_interrupt_window(&vmx->vcpu);
4871
Andre Przywara51d8b662010-12-21 11:12:02 +01004872 err = emulate_instruction(vcpu, 0);
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004873
Mohammed Gamal80ced182009-09-01 12:48:18 +02004874 if (err == EMULATE_DO_MMIO) {
4875 ret = 0;
4876 goto out;
4877 }
Guillaume Thouvenin1d5a4d92008-10-29 09:39:42 +01004878
Gleb Natapov6d77dbf2010-05-10 11:16:56 +03004879 if (err != EMULATE_DONE)
4880 return 0;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004881
4882 if (signal_pending(current))
Mohammed Gamal80ced182009-09-01 12:48:18 +02004883 goto out;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004884 if (need_resched())
4885 schedule();
4886 }
4887
Mohammed Gamal80ced182009-09-01 12:48:18 +02004888 vmx->emulation_required = 0;
4889out:
4890 return ret;
Mohammed Gamalea953ef2008-08-17 16:47:05 +03004891}
4892
Avi Kivity6aa8b732006-12-10 02:21:36 -08004893/*
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08004894 * Indicate a busy-waiting vcpu in spinlock. We do not enable the PAUSE
4895 * exiting, so only get here on cpu with PAUSE-Loop-Exiting.
4896 */
Marcelo Tosatti9fb41ba2009-10-12 19:37:31 -03004897static int handle_pause(struct kvm_vcpu *vcpu)
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08004898{
4899 skip_emulated_instruction(vcpu);
4900 kvm_vcpu_on_spin(vcpu);
4901
4902 return 1;
4903}
4904
Sheng Yang59708672009-12-15 13:29:54 +08004905static int handle_invalid_op(struct kvm_vcpu *vcpu)
4906{
4907 kvm_queue_exception(vcpu, UD_VECTOR);
4908 return 1;
4909}
4910
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08004911/*
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03004912 * To run an L2 guest, we need a vmcs02 based on the L1-specified vmcs12.
4913 * We could reuse a single VMCS for all the L2 guests, but we also want the
4914 * option to allocate a separate vmcs02 for each separate loaded vmcs12 - this
4915 * allows keeping them loaded on the processor, and in the future will allow
4916 * optimizations where prepare_vmcs02 doesn't need to set all the fields on
4917 * every entry if they never change.
4918 * So we keep, in vmx->nested.vmcs02_pool, a cache of size VMCS02_POOL_SIZE
4919 * (>=0) with a vmcs02 for each recently loaded vmcs12s, most recent first.
4920 *
4921 * The following functions allocate and free a vmcs02 in this pool.
4922 */
4923
4924/* Get a VMCS from the pool to use as vmcs02 for the current vmcs12. */
4925static struct loaded_vmcs *nested_get_current_vmcs02(struct vcpu_vmx *vmx)
4926{
4927 struct vmcs02_list *item;
4928 list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
4929 if (item->vmptr == vmx->nested.current_vmptr) {
4930 list_move(&item->list, &vmx->nested.vmcs02_pool);
4931 return &item->vmcs02;
4932 }
4933
4934 if (vmx->nested.vmcs02_num >= max(VMCS02_POOL_SIZE, 1)) {
4935 /* Recycle the least recently used VMCS. */
4936 item = list_entry(vmx->nested.vmcs02_pool.prev,
4937 struct vmcs02_list, list);
4938 item->vmptr = vmx->nested.current_vmptr;
4939 list_move(&item->list, &vmx->nested.vmcs02_pool);
4940 return &item->vmcs02;
4941 }
4942
4943 /* Create a new VMCS */
4944 item = (struct vmcs02_list *)
4945 kmalloc(sizeof(struct vmcs02_list), GFP_KERNEL);
4946 if (!item)
4947 return NULL;
4948 item->vmcs02.vmcs = alloc_vmcs();
4949 if (!item->vmcs02.vmcs) {
4950 kfree(item);
4951 return NULL;
4952 }
4953 loaded_vmcs_init(&item->vmcs02);
4954 item->vmptr = vmx->nested.current_vmptr;
4955 list_add(&(item->list), &(vmx->nested.vmcs02_pool));
4956 vmx->nested.vmcs02_num++;
4957 return &item->vmcs02;
4958}
4959
4960/* Free and remove from pool a vmcs02 saved for a vmcs12 (if there is one) */
4961static void nested_free_vmcs02(struct vcpu_vmx *vmx, gpa_t vmptr)
4962{
4963 struct vmcs02_list *item;
4964 list_for_each_entry(item, &vmx->nested.vmcs02_pool, list)
4965 if (item->vmptr == vmptr) {
4966 free_loaded_vmcs(&item->vmcs02);
4967 list_del(&item->list);
4968 kfree(item);
4969 vmx->nested.vmcs02_num--;
4970 return;
4971 }
4972}
4973
4974/*
4975 * Free all VMCSs saved for this vcpu, except the one pointed by
4976 * vmx->loaded_vmcs. These include the VMCSs in vmcs02_pool (except the one
4977 * currently used, if running L2), and vmcs01 when running L2.
4978 */
4979static void nested_free_all_saved_vmcss(struct vcpu_vmx *vmx)
4980{
4981 struct vmcs02_list *item, *n;
4982 list_for_each_entry_safe(item, n, &vmx->nested.vmcs02_pool, list) {
4983 if (vmx->loaded_vmcs != &item->vmcs02)
4984 free_loaded_vmcs(&item->vmcs02);
4985 list_del(&item->list);
4986 kfree(item);
4987 }
4988 vmx->nested.vmcs02_num = 0;
4989
4990 if (vmx->loaded_vmcs != &vmx->vmcs01)
4991 free_loaded_vmcs(&vmx->vmcs01);
4992}
4993
4994/*
Nadav Har'Elec378ae2011-05-25 23:02:54 +03004995 * Emulate the VMXON instruction.
4996 * Currently, we just remember that VMX is active, and do not save or even
4997 * inspect the argument to VMXON (the so-called "VMXON pointer") because we
4998 * do not currently need to store anything in that guest-allocated memory
4999 * region. Consequently, VMCLEAR and VMPTRLD also do not verify that the their
5000 * argument is different from the VMXON pointer (which the spec says they do).
5001 */
5002static int handle_vmon(struct kvm_vcpu *vcpu)
5003{
5004 struct kvm_segment cs;
5005 struct vcpu_vmx *vmx = to_vmx(vcpu);
5006
5007 /* The Intel VMX Instruction Reference lists a bunch of bits that
5008 * are prerequisite to running VMXON, most notably cr4.VMXE must be
5009 * set to 1 (see vmx_set_cr4() for when we allow the guest to set this).
5010 * Otherwise, we should fail with #UD. We test these now:
5011 */
5012 if (!kvm_read_cr4_bits(vcpu, X86_CR4_VMXE) ||
5013 !kvm_read_cr0_bits(vcpu, X86_CR0_PE) ||
5014 (vmx_get_rflags(vcpu) & X86_EFLAGS_VM)) {
5015 kvm_queue_exception(vcpu, UD_VECTOR);
5016 return 1;
5017 }
5018
5019 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
5020 if (is_long_mode(vcpu) && !cs.l) {
5021 kvm_queue_exception(vcpu, UD_VECTOR);
5022 return 1;
5023 }
5024
5025 if (vmx_get_cpl(vcpu)) {
5026 kvm_inject_gp(vcpu, 0);
5027 return 1;
5028 }
5029
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03005030 INIT_LIST_HEAD(&(vmx->nested.vmcs02_pool));
5031 vmx->nested.vmcs02_num = 0;
5032
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005033 vmx->nested.vmxon = true;
5034
5035 skip_emulated_instruction(vcpu);
5036 return 1;
5037}
5038
5039/*
5040 * Intel's VMX Instruction Reference specifies a common set of prerequisites
5041 * for running VMX instructions (except VMXON, whose prerequisites are
5042 * slightly different). It also specifies what exception to inject otherwise.
5043 */
5044static int nested_vmx_check_permission(struct kvm_vcpu *vcpu)
5045{
5046 struct kvm_segment cs;
5047 struct vcpu_vmx *vmx = to_vmx(vcpu);
5048
5049 if (!vmx->nested.vmxon) {
5050 kvm_queue_exception(vcpu, UD_VECTOR);
5051 return 0;
5052 }
5053
5054 vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
5055 if ((vmx_get_rflags(vcpu) & X86_EFLAGS_VM) ||
5056 (is_long_mode(vcpu) && !cs.l)) {
5057 kvm_queue_exception(vcpu, UD_VECTOR);
5058 return 0;
5059 }
5060
5061 if (vmx_get_cpl(vcpu)) {
5062 kvm_inject_gp(vcpu, 0);
5063 return 0;
5064 }
5065
5066 return 1;
5067}
5068
5069/*
5070 * Free whatever needs to be freed from vmx->nested when L1 goes down, or
5071 * just stops using VMX.
5072 */
5073static void free_nested(struct vcpu_vmx *vmx)
5074{
5075 if (!vmx->nested.vmxon)
5076 return;
5077 vmx->nested.vmxon = false;
Nadav Har'Ela9d30f32011-05-25 23:03:55 +03005078 if (vmx->nested.current_vmptr != -1ull) {
5079 kunmap(vmx->nested.current_vmcs12_page);
5080 nested_release_page(vmx->nested.current_vmcs12_page);
5081 vmx->nested.current_vmptr = -1ull;
5082 vmx->nested.current_vmcs12 = NULL;
5083 }
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03005084 /* Unpin physical memory we referred to in current vmcs02 */
5085 if (vmx->nested.apic_access_page) {
5086 nested_release_page(vmx->nested.apic_access_page);
5087 vmx->nested.apic_access_page = 0;
5088 }
Nadav Har'Elff2f6fe2011-05-25 23:05:27 +03005089
5090 nested_free_all_saved_vmcss(vmx);
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005091}
5092
5093/* Emulate the VMXOFF instruction */
5094static int handle_vmoff(struct kvm_vcpu *vcpu)
5095{
5096 if (!nested_vmx_check_permission(vcpu))
5097 return 1;
5098 free_nested(to_vmx(vcpu));
5099 skip_emulated_instruction(vcpu);
5100 return 1;
5101}
5102
5103/*
Nadav Har'El064aea72011-05-25 23:04:56 +03005104 * Decode the memory-address operand of a vmx instruction, as recorded on an
5105 * exit caused by such an instruction (run by a guest hypervisor).
5106 * On success, returns 0. When the operand is invalid, returns 1 and throws
5107 * #UD or #GP.
5108 */
5109static int get_vmx_mem_address(struct kvm_vcpu *vcpu,
5110 unsigned long exit_qualification,
5111 u32 vmx_instruction_info, gva_t *ret)
5112{
5113 /*
5114 * According to Vol. 3B, "Information for VM Exits Due to Instruction
5115 * Execution", on an exit, vmx_instruction_info holds most of the
5116 * addressing components of the operand. Only the displacement part
5117 * is put in exit_qualification (see 3B, "Basic VM-Exit Information").
5118 * For how an actual address is calculated from all these components,
5119 * refer to Vol. 1, "Operand Addressing".
5120 */
5121 int scaling = vmx_instruction_info & 3;
5122 int addr_size = (vmx_instruction_info >> 7) & 7;
5123 bool is_reg = vmx_instruction_info & (1u << 10);
5124 int seg_reg = (vmx_instruction_info >> 15) & 7;
5125 int index_reg = (vmx_instruction_info >> 18) & 0xf;
5126 bool index_is_valid = !(vmx_instruction_info & (1u << 22));
5127 int base_reg = (vmx_instruction_info >> 23) & 0xf;
5128 bool base_is_valid = !(vmx_instruction_info & (1u << 27));
5129
5130 if (is_reg) {
5131 kvm_queue_exception(vcpu, UD_VECTOR);
5132 return 1;
5133 }
5134
5135 /* Addr = segment_base + offset */
5136 /* offset = base + [index * scale] + displacement */
5137 *ret = vmx_get_segment_base(vcpu, seg_reg);
5138 if (base_is_valid)
5139 *ret += kvm_register_read(vcpu, base_reg);
5140 if (index_is_valid)
5141 *ret += kvm_register_read(vcpu, index_reg)<<scaling;
5142 *ret += exit_qualification; /* holds the displacement */
5143
5144 if (addr_size == 1) /* 32 bit */
5145 *ret &= 0xffffffff;
5146
5147 /*
5148 * TODO: throw #GP (and return 1) in various cases that the VM*
5149 * instructions require it - e.g., offset beyond segment limit,
5150 * unusable or unreadable/unwritable segment, non-canonical 64-bit
5151 * address, and so on. Currently these are not checked.
5152 */
5153 return 0;
5154}
5155
5156/*
Nadav Har'El0140cae2011-05-25 23:06:28 +03005157 * The following 3 functions, nested_vmx_succeed()/failValid()/failInvalid(),
5158 * set the success or error code of an emulated VMX instruction, as specified
5159 * by Vol 2B, VMX Instruction Reference, "Conventions".
5160 */
5161static void nested_vmx_succeed(struct kvm_vcpu *vcpu)
5162{
5163 vmx_set_rflags(vcpu, vmx_get_rflags(vcpu)
5164 & ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
5165 X86_EFLAGS_ZF | X86_EFLAGS_SF | X86_EFLAGS_OF));
5166}
5167
5168static void nested_vmx_failInvalid(struct kvm_vcpu *vcpu)
5169{
5170 vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
5171 & ~(X86_EFLAGS_PF | X86_EFLAGS_AF | X86_EFLAGS_ZF |
5172 X86_EFLAGS_SF | X86_EFLAGS_OF))
5173 | X86_EFLAGS_CF);
5174}
5175
5176static void nested_vmx_failValid(struct kvm_vcpu *vcpu,
5177 u32 vm_instruction_error)
5178{
5179 if (to_vmx(vcpu)->nested.current_vmptr == -1ull) {
5180 /*
5181 * failValid writes the error number to the current VMCS, which
5182 * can't be done there isn't a current VMCS.
5183 */
5184 nested_vmx_failInvalid(vcpu);
5185 return;
5186 }
5187 vmx_set_rflags(vcpu, (vmx_get_rflags(vcpu)
5188 & ~(X86_EFLAGS_CF | X86_EFLAGS_PF | X86_EFLAGS_AF |
5189 X86_EFLAGS_SF | X86_EFLAGS_OF))
5190 | X86_EFLAGS_ZF);
5191 get_vmcs12(vcpu)->vm_instruction_error = vm_instruction_error;
5192}
5193
Nadav Har'El27d6c862011-05-25 23:06:59 +03005194/* Emulate the VMCLEAR instruction */
5195static int handle_vmclear(struct kvm_vcpu *vcpu)
5196{
5197 struct vcpu_vmx *vmx = to_vmx(vcpu);
5198 gva_t gva;
5199 gpa_t vmptr;
5200 struct vmcs12 *vmcs12;
5201 struct page *page;
5202 struct x86_exception e;
5203
5204 if (!nested_vmx_check_permission(vcpu))
5205 return 1;
5206
5207 if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
5208 vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
5209 return 1;
5210
5211 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
5212 sizeof(vmptr), &e)) {
5213 kvm_inject_page_fault(vcpu, &e);
5214 return 1;
5215 }
5216
5217 if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
5218 nested_vmx_failValid(vcpu, VMXERR_VMCLEAR_INVALID_ADDRESS);
5219 skip_emulated_instruction(vcpu);
5220 return 1;
5221 }
5222
5223 if (vmptr == vmx->nested.current_vmptr) {
5224 kunmap(vmx->nested.current_vmcs12_page);
5225 nested_release_page(vmx->nested.current_vmcs12_page);
5226 vmx->nested.current_vmptr = -1ull;
5227 vmx->nested.current_vmcs12 = NULL;
5228 }
5229
5230 page = nested_get_page(vcpu, vmptr);
5231 if (page == NULL) {
5232 /*
5233 * For accurate processor emulation, VMCLEAR beyond available
5234 * physical memory should do nothing at all. However, it is
5235 * possible that a nested vmx bug, not a guest hypervisor bug,
5236 * resulted in this case, so let's shut down before doing any
5237 * more damage:
5238 */
5239 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
5240 return 1;
5241 }
5242 vmcs12 = kmap(page);
5243 vmcs12->launch_state = 0;
5244 kunmap(page);
5245 nested_release_page(page);
5246
5247 nested_free_vmcs02(vmx, vmptr);
5248
5249 skip_emulated_instruction(vcpu);
5250 nested_vmx_succeed(vcpu);
5251 return 1;
5252}
5253
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005254static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch);
5255
5256/* Emulate the VMLAUNCH instruction */
5257static int handle_vmlaunch(struct kvm_vcpu *vcpu)
5258{
5259 return nested_vmx_run(vcpu, true);
5260}
5261
5262/* Emulate the VMRESUME instruction */
5263static int handle_vmresume(struct kvm_vcpu *vcpu)
5264{
5265
5266 return nested_vmx_run(vcpu, false);
5267}
5268
Nadav Har'El49f705c2011-05-25 23:08:30 +03005269enum vmcs_field_type {
5270 VMCS_FIELD_TYPE_U16 = 0,
5271 VMCS_FIELD_TYPE_U64 = 1,
5272 VMCS_FIELD_TYPE_U32 = 2,
5273 VMCS_FIELD_TYPE_NATURAL_WIDTH = 3
5274};
5275
5276static inline int vmcs_field_type(unsigned long field)
5277{
5278 if (0x1 & field) /* the *_HIGH fields are all 32 bit */
5279 return VMCS_FIELD_TYPE_U32;
5280 return (field >> 13) & 0x3 ;
5281}
5282
5283static inline int vmcs_field_readonly(unsigned long field)
5284{
5285 return (((field >> 10) & 0x3) == 1);
5286}
5287
5288/*
5289 * Read a vmcs12 field. Since these can have varying lengths and we return
5290 * one type, we chose the biggest type (u64) and zero-extend the return value
5291 * to that size. Note that the caller, handle_vmread, might need to use only
5292 * some of the bits we return here (e.g., on 32-bit guests, only 32 bits of
5293 * 64-bit fields are to be returned).
5294 */
5295static inline bool vmcs12_read_any(struct kvm_vcpu *vcpu,
5296 unsigned long field, u64 *ret)
5297{
5298 short offset = vmcs_field_to_offset(field);
5299 char *p;
5300
5301 if (offset < 0)
5302 return 0;
5303
5304 p = ((char *)(get_vmcs12(vcpu))) + offset;
5305
5306 switch (vmcs_field_type(field)) {
5307 case VMCS_FIELD_TYPE_NATURAL_WIDTH:
5308 *ret = *((natural_width *)p);
5309 return 1;
5310 case VMCS_FIELD_TYPE_U16:
5311 *ret = *((u16 *)p);
5312 return 1;
5313 case VMCS_FIELD_TYPE_U32:
5314 *ret = *((u32 *)p);
5315 return 1;
5316 case VMCS_FIELD_TYPE_U64:
5317 *ret = *((u64 *)p);
5318 return 1;
5319 default:
5320 return 0; /* can never happen. */
5321 }
5322}
5323
5324/*
5325 * VMX instructions which assume a current vmcs12 (i.e., that VMPTRLD was
5326 * used before) all generate the same failure when it is missing.
5327 */
5328static int nested_vmx_check_vmcs12(struct kvm_vcpu *vcpu)
5329{
5330 struct vcpu_vmx *vmx = to_vmx(vcpu);
5331 if (vmx->nested.current_vmptr == -1ull) {
5332 nested_vmx_failInvalid(vcpu);
5333 skip_emulated_instruction(vcpu);
5334 return 0;
5335 }
5336 return 1;
5337}
5338
5339static int handle_vmread(struct kvm_vcpu *vcpu)
5340{
5341 unsigned long field;
5342 u64 field_value;
5343 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5344 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5345 gva_t gva = 0;
5346
5347 if (!nested_vmx_check_permission(vcpu) ||
5348 !nested_vmx_check_vmcs12(vcpu))
5349 return 1;
5350
5351 /* Decode instruction info and find the field to read */
5352 field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
5353 /* Read the field, zero-extended to a u64 field_value */
5354 if (!vmcs12_read_any(vcpu, field, &field_value)) {
5355 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5356 skip_emulated_instruction(vcpu);
5357 return 1;
5358 }
5359 /*
5360 * Now copy part of this value to register or memory, as requested.
5361 * Note that the number of bits actually copied is 32 or 64 depending
5362 * on the guest's mode (32 or 64 bit), not on the given field's length.
5363 */
5364 if (vmx_instruction_info & (1u << 10)) {
5365 kvm_register_write(vcpu, (((vmx_instruction_info) >> 3) & 0xf),
5366 field_value);
5367 } else {
5368 if (get_vmx_mem_address(vcpu, exit_qualification,
5369 vmx_instruction_info, &gva))
5370 return 1;
5371 /* _system ok, as nested_vmx_check_permission verified cpl=0 */
5372 kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, gva,
5373 &field_value, (is_long_mode(vcpu) ? 8 : 4), NULL);
5374 }
5375
5376 nested_vmx_succeed(vcpu);
5377 skip_emulated_instruction(vcpu);
5378 return 1;
5379}
5380
5381
5382static int handle_vmwrite(struct kvm_vcpu *vcpu)
5383{
5384 unsigned long field;
5385 gva_t gva;
5386 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5387 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5388 char *p;
5389 short offset;
5390 /* The value to write might be 32 or 64 bits, depending on L1's long
5391 * mode, and eventually we need to write that into a field of several
5392 * possible lengths. The code below first zero-extends the value to 64
5393 * bit (field_value), and then copies only the approriate number of
5394 * bits into the vmcs12 field.
5395 */
5396 u64 field_value = 0;
5397 struct x86_exception e;
5398
5399 if (!nested_vmx_check_permission(vcpu) ||
5400 !nested_vmx_check_vmcs12(vcpu))
5401 return 1;
5402
5403 if (vmx_instruction_info & (1u << 10))
5404 field_value = kvm_register_read(vcpu,
5405 (((vmx_instruction_info) >> 3) & 0xf));
5406 else {
5407 if (get_vmx_mem_address(vcpu, exit_qualification,
5408 vmx_instruction_info, &gva))
5409 return 1;
5410 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva,
5411 &field_value, (is_long_mode(vcpu) ? 8 : 4), &e)) {
5412 kvm_inject_page_fault(vcpu, &e);
5413 return 1;
5414 }
5415 }
5416
5417
5418 field = kvm_register_read(vcpu, (((vmx_instruction_info) >> 28) & 0xf));
5419 if (vmcs_field_readonly(field)) {
5420 nested_vmx_failValid(vcpu,
5421 VMXERR_VMWRITE_READ_ONLY_VMCS_COMPONENT);
5422 skip_emulated_instruction(vcpu);
5423 return 1;
5424 }
5425
5426 offset = vmcs_field_to_offset(field);
5427 if (offset < 0) {
5428 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5429 skip_emulated_instruction(vcpu);
5430 return 1;
5431 }
5432 p = ((char *) get_vmcs12(vcpu)) + offset;
5433
5434 switch (vmcs_field_type(field)) {
5435 case VMCS_FIELD_TYPE_U16:
5436 *(u16 *)p = field_value;
5437 break;
5438 case VMCS_FIELD_TYPE_U32:
5439 *(u32 *)p = field_value;
5440 break;
5441 case VMCS_FIELD_TYPE_U64:
5442 *(u64 *)p = field_value;
5443 break;
5444 case VMCS_FIELD_TYPE_NATURAL_WIDTH:
5445 *(natural_width *)p = field_value;
5446 break;
5447 default:
5448 nested_vmx_failValid(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
5449 skip_emulated_instruction(vcpu);
5450 return 1;
5451 }
5452
5453 nested_vmx_succeed(vcpu);
5454 skip_emulated_instruction(vcpu);
5455 return 1;
5456}
5457
Nadav Har'El63846662011-05-25 23:07:29 +03005458/* Emulate the VMPTRLD instruction */
5459static int handle_vmptrld(struct kvm_vcpu *vcpu)
5460{
5461 struct vcpu_vmx *vmx = to_vmx(vcpu);
5462 gva_t gva;
5463 gpa_t vmptr;
5464 struct x86_exception e;
5465
5466 if (!nested_vmx_check_permission(vcpu))
5467 return 1;
5468
5469 if (get_vmx_mem_address(vcpu, vmcs_readl(EXIT_QUALIFICATION),
5470 vmcs_read32(VMX_INSTRUCTION_INFO), &gva))
5471 return 1;
5472
5473 if (kvm_read_guest_virt(&vcpu->arch.emulate_ctxt, gva, &vmptr,
5474 sizeof(vmptr), &e)) {
5475 kvm_inject_page_fault(vcpu, &e);
5476 return 1;
5477 }
5478
5479 if (!IS_ALIGNED(vmptr, PAGE_SIZE)) {
5480 nested_vmx_failValid(vcpu, VMXERR_VMPTRLD_INVALID_ADDRESS);
5481 skip_emulated_instruction(vcpu);
5482 return 1;
5483 }
5484
5485 if (vmx->nested.current_vmptr != vmptr) {
5486 struct vmcs12 *new_vmcs12;
5487 struct page *page;
5488 page = nested_get_page(vcpu, vmptr);
5489 if (page == NULL) {
5490 nested_vmx_failInvalid(vcpu);
5491 skip_emulated_instruction(vcpu);
5492 return 1;
5493 }
5494 new_vmcs12 = kmap(page);
5495 if (new_vmcs12->revision_id != VMCS12_REVISION) {
5496 kunmap(page);
5497 nested_release_page_clean(page);
5498 nested_vmx_failValid(vcpu,
5499 VMXERR_VMPTRLD_INCORRECT_VMCS_REVISION_ID);
5500 skip_emulated_instruction(vcpu);
5501 return 1;
5502 }
5503 if (vmx->nested.current_vmptr != -1ull) {
5504 kunmap(vmx->nested.current_vmcs12_page);
5505 nested_release_page(vmx->nested.current_vmcs12_page);
5506 }
5507
5508 vmx->nested.current_vmptr = vmptr;
5509 vmx->nested.current_vmcs12 = new_vmcs12;
5510 vmx->nested.current_vmcs12_page = page;
5511 }
5512
5513 nested_vmx_succeed(vcpu);
5514 skip_emulated_instruction(vcpu);
5515 return 1;
5516}
5517
Nadav Har'El6a4d7552011-05-25 23:08:00 +03005518/* Emulate the VMPTRST instruction */
5519static int handle_vmptrst(struct kvm_vcpu *vcpu)
5520{
5521 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5522 u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
5523 gva_t vmcs_gva;
5524 struct x86_exception e;
5525
5526 if (!nested_vmx_check_permission(vcpu))
5527 return 1;
5528
5529 if (get_vmx_mem_address(vcpu, exit_qualification,
5530 vmx_instruction_info, &vmcs_gva))
5531 return 1;
5532 /* ok to use *_system, as nested_vmx_check_permission verified cpl=0 */
5533 if (kvm_write_guest_virt_system(&vcpu->arch.emulate_ctxt, vmcs_gva,
5534 (void *)&to_vmx(vcpu)->nested.current_vmptr,
5535 sizeof(u64), &e)) {
5536 kvm_inject_page_fault(vcpu, &e);
5537 return 1;
5538 }
5539 nested_vmx_succeed(vcpu);
5540 skip_emulated_instruction(vcpu);
5541 return 1;
5542}
5543
Nadav Har'El0140cae2011-05-25 23:06:28 +03005544/*
Avi Kivity6aa8b732006-12-10 02:21:36 -08005545 * The exit handlers return 1 if the exit was handled fully and guest execution
5546 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
5547 * to be done to userspace and return 0.
5548 */
Avi Kivity851ba692009-08-24 11:10:17 +03005549static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu) = {
Avi Kivity6aa8b732006-12-10 02:21:36 -08005550 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
5551 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
Avi Kivity988ad742007-02-12 00:54:36 -08005552 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
Sheng Yangf08864b2008-05-15 18:23:25 +08005553 [EXIT_REASON_NMI_WINDOW] = handle_nmi_window,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005554 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005555 [EXIT_REASON_CR_ACCESS] = handle_cr,
5556 [EXIT_REASON_DR_ACCESS] = handle_dr,
5557 [EXIT_REASON_CPUID] = handle_cpuid,
5558 [EXIT_REASON_MSR_READ] = handle_rdmsr,
5559 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
5560 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
5561 [EXIT_REASON_HLT] = handle_halt,
Gleb Natapovec25d5e2010-11-01 15:35:01 +02005562 [EXIT_REASON_INVD] = handle_invd,
Marcelo Tosattia7052892008-09-23 13:18:35 -03005563 [EXIT_REASON_INVLPG] = handle_invlpg,
Ingo Molnarc21415e2007-02-19 14:37:47 +02005564 [EXIT_REASON_VMCALL] = handle_vmcall,
Nadav Har'El27d6c862011-05-25 23:06:59 +03005565 [EXIT_REASON_VMCLEAR] = handle_vmclear,
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005566 [EXIT_REASON_VMLAUNCH] = handle_vmlaunch,
Nadav Har'El63846662011-05-25 23:07:29 +03005567 [EXIT_REASON_VMPTRLD] = handle_vmptrld,
Nadav Har'El6a4d7552011-05-25 23:08:00 +03005568 [EXIT_REASON_VMPTRST] = handle_vmptrst,
Nadav Har'El49f705c2011-05-25 23:08:30 +03005569 [EXIT_REASON_VMREAD] = handle_vmread,
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03005570 [EXIT_REASON_VMRESUME] = handle_vmresume,
Nadav Har'El49f705c2011-05-25 23:08:30 +03005571 [EXIT_REASON_VMWRITE] = handle_vmwrite,
Nadav Har'Elec378ae2011-05-25 23:02:54 +03005572 [EXIT_REASON_VMOFF] = handle_vmoff,
5573 [EXIT_REASON_VMON] = handle_vmon,
Sheng Yangf78e0e22007-10-29 09:40:42 +08005574 [EXIT_REASON_TPR_BELOW_THRESHOLD] = handle_tpr_below_threshold,
5575 [EXIT_REASON_APIC_ACCESS] = handle_apic_access,
Eddie Donge5edaa02007-11-11 12:28:35 +02005576 [EXIT_REASON_WBINVD] = handle_wbinvd,
Dexuan Cui2acf9232010-06-10 11:27:12 +08005577 [EXIT_REASON_XSETBV] = handle_xsetbv,
Izik Eidus37817f22008-03-24 23:14:53 +02005578 [EXIT_REASON_TASK_SWITCH] = handle_task_switch,
Andi Kleena0861c02009-06-08 17:37:09 +08005579 [EXIT_REASON_MCE_DURING_VMENTRY] = handle_machine_check,
Marcelo Tosatti68f89402009-06-11 12:07:43 -03005580 [EXIT_REASON_EPT_VIOLATION] = handle_ept_violation,
5581 [EXIT_REASON_EPT_MISCONFIG] = handle_ept_misconfig,
Zhai, Edwin4b8d54f2009-10-09 18:03:20 +08005582 [EXIT_REASON_PAUSE_INSTRUCTION] = handle_pause,
Sheng Yang59708672009-12-15 13:29:54 +08005583 [EXIT_REASON_MWAIT_INSTRUCTION] = handle_invalid_op,
5584 [EXIT_REASON_MONITOR_INSTRUCTION] = handle_invalid_op,
Avi Kivity6aa8b732006-12-10 02:21:36 -08005585};
5586
5587static const int kvm_vmx_max_exit_handlers =
Robert P. J. Day50a34852007-06-03 13:35:29 -04005588 ARRAY_SIZE(kvm_vmx_exit_handlers);
Avi Kivity6aa8b732006-12-10 02:21:36 -08005589
Nadav Har'El644d7112011-05-25 23:12:35 +03005590/*
5591 * Return 1 if we should exit from L2 to L1 to handle an MSR access access,
5592 * rather than handle it ourselves in L0. I.e., check whether L1 expressed
5593 * disinterest in the current event (read or write a specific MSR) by using an
5594 * MSR bitmap. This may be the case even when L0 doesn't use MSR bitmaps.
5595 */
5596static bool nested_vmx_exit_handled_msr(struct kvm_vcpu *vcpu,
5597 struct vmcs12 *vmcs12, u32 exit_reason)
5598{
5599 u32 msr_index = vcpu->arch.regs[VCPU_REGS_RCX];
5600 gpa_t bitmap;
5601
5602 if (!nested_cpu_has(get_vmcs12(vcpu), CPU_BASED_USE_MSR_BITMAPS))
5603 return 1;
5604
5605 /*
5606 * The MSR_BITMAP page is divided into four 1024-byte bitmaps,
5607 * for the four combinations of read/write and low/high MSR numbers.
5608 * First we need to figure out which of the four to use:
5609 */
5610 bitmap = vmcs12->msr_bitmap;
5611 if (exit_reason == EXIT_REASON_MSR_WRITE)
5612 bitmap += 2048;
5613 if (msr_index >= 0xc0000000) {
5614 msr_index -= 0xc0000000;
5615 bitmap += 1024;
5616 }
5617
5618 /* Then read the msr_index'th bit from this bitmap: */
5619 if (msr_index < 1024*8) {
5620 unsigned char b;
5621 kvm_read_guest(vcpu->kvm, bitmap + msr_index/8, &b, 1);
5622 return 1 & (b >> (msr_index & 7));
5623 } else
5624 return 1; /* let L1 handle the wrong parameter */
5625}
5626
5627/*
5628 * Return 1 if we should exit from L2 to L1 to handle a CR access exit,
5629 * rather than handle it ourselves in L0. I.e., check if L1 wanted to
5630 * intercept (via guest_host_mask etc.) the current event.
5631 */
5632static bool nested_vmx_exit_handled_cr(struct kvm_vcpu *vcpu,
5633 struct vmcs12 *vmcs12)
5634{
5635 unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
5636 int cr = exit_qualification & 15;
5637 int reg = (exit_qualification >> 8) & 15;
5638 unsigned long val = kvm_register_read(vcpu, reg);
5639
5640 switch ((exit_qualification >> 4) & 3) {
5641 case 0: /* mov to cr */
5642 switch (cr) {
5643 case 0:
5644 if (vmcs12->cr0_guest_host_mask &
5645 (val ^ vmcs12->cr0_read_shadow))
5646 return 1;
5647 break;
5648 case 3:
5649 if ((vmcs12->cr3_target_count >= 1 &&
5650 vmcs12->cr3_target_value0 == val) ||
5651 (vmcs12->cr3_target_count >= 2 &&
5652 vmcs12->cr3_target_value1 == val) ||
5653 (vmcs12->cr3_target_count >= 3 &&
5654 vmcs12->cr3_target_value2 == val) ||
5655 (vmcs12->cr3_target_count >= 4 &&
5656 vmcs12->cr3_target_value3 == val))
5657 return 0;
5658 if (nested_cpu_has(vmcs12, CPU_BASED_CR3_LOAD_EXITING))
5659 return 1;
5660 break;
5661 case 4:
5662 if (vmcs12->cr4_guest_host_mask &
5663 (vmcs12->cr4_read_shadow ^ val))
5664 return 1;
5665 break;
5666 case 8:
5667 if (nested_cpu_has(vmcs12, CPU_BASED_CR8_LOAD_EXITING))
5668 return 1;
5669 break;
5670 }
5671 break;
5672 case 2: /* clts */
5673 if ((vmcs12->cr0_guest_host_mask & X86_CR0_TS) &&
5674 (vmcs12->cr0_read_shadow & X86_CR0_TS))
5675 return 1;
5676 break;
5677 case 1: /* mov from cr */
5678 switch (cr) {
5679 case 3:
5680 if (vmcs12->cpu_based_vm_exec_control &
5681 CPU_BASED_CR3_STORE_EXITING)
5682 return 1;
5683 break;
5684 case 8:
5685 if (vmcs12->cpu_based_vm_exec_control &
5686 CPU_BASED_CR8_STORE_EXITING)
5687 return 1;
5688 break;
5689 }
5690 break;
5691 case 3: /* lmsw */
5692 /*
5693 * lmsw can change bits 1..3 of cr0, and only set bit 0 of
5694 * cr0. Other attempted changes are ignored, with no exit.
5695 */
5696 if (vmcs12->cr0_guest_host_mask & 0xe &
5697 (val ^ vmcs12->cr0_read_shadow))
5698 return 1;
5699 if ((vmcs12->cr0_guest_host_mask & 0x1) &&
5700 !(vmcs12->cr0_read_shadow & 0x1) &&
5701 (val & 0x1))
5702 return 1;
5703 break;
5704 }
5705 return 0;
5706}
5707
5708/*
5709 * Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we
5710 * should handle it ourselves in L0 (and then continue L2). Only call this
5711 * when in is_guest_mode (L2).
5712 */
5713static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
5714{
5715 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
5716 u32 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
5717 struct vcpu_vmx *vmx = to_vmx(vcpu);
5718 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
5719
5720 if (vmx->nested.nested_run_pending)
5721 return 0;
5722
5723 if (unlikely(vmx->fail)) {
Jan Kiszkabd801582011-09-12 11:26:22 +02005724 pr_info_ratelimited("%s failed vm entry %x\n", __func__,
5725 vmcs_read32(VM_INSTRUCTION_ERROR));
Nadav Har'El644d7112011-05-25 23:12:35 +03005726 return 1;
5727 }
5728
5729 switch (exit_reason) {
5730 case EXIT_REASON_EXCEPTION_NMI:
5731 if (!is_exception(intr_info))
5732 return 0;
5733 else if (is_page_fault(intr_info))
5734 return enable_ept;
5735 return vmcs12->exception_bitmap &
5736 (1u << (intr_info & INTR_INFO_VECTOR_MASK));
5737 case EXIT_REASON_EXTERNAL_INTERRUPT:
5738 return 0;
5739 case EXIT_REASON_TRIPLE_FAULT:
5740 return 1;
5741 case EXIT_REASON_PENDING_INTERRUPT:
5742 case EXIT_REASON_NMI_WINDOW:
5743 /*
5744 * prepare_vmcs02() set the CPU_BASED_VIRTUAL_INTR_PENDING bit
5745 * (aka Interrupt Window Exiting) only when L1 turned it on,
5746 * so if we got a PENDING_INTERRUPT exit, this must be for L1.
5747 * Same for NMI Window Exiting.
5748 */
5749 return 1;
5750 case EXIT_REASON_TASK_SWITCH:
5751 return 1;
5752 case EXIT_REASON_CPUID:
5753 return 1;
5754 case EXIT_REASON_HLT:
5755 return nested_cpu_has(vmcs12, CPU_BASED_HLT_EXITING);
5756 case EXIT_REASON_INVD:
5757 return 1;
5758 case EXIT_REASON_INVLPG:
5759 return nested_cpu_has(vmcs12, CPU_BASED_INVLPG_EXITING);
5760 case EXIT_REASON_RDPMC:
5761 return nested_cpu_has(vmcs12, CPU_BASED_RDPMC_EXITING);
5762 case EXIT_REASON_RDTSC:
5763 return nested_cpu_has(vmcs12, CPU_BASED_RDTSC_EXITING);
5764 case EXIT_REASON_VMCALL: case EXIT_REASON_VMCLEAR:
5765 case EXIT_REASON_VMLAUNCH: case EXIT_REASON_VMPTRLD:
5766 case EXIT_REASON_VMPTRST: case EXIT_REASON_VMREAD:
5767 case EXIT_REASON_VMRESUME: case EXIT_REASON_VMWRITE:
5768 case EXIT_REASON_VMOFF: case EXIT_REASON_VMON:
5769 /*
5770 * VMX instructions trap unconditionally. This allows L1 to
5771 * emulate them for its L2 guest, i.e., allows 3-level nesting!
5772 */
5773 return 1;
5774 case EXIT_REASON_CR_ACCESS:
5775 return nested_vmx_exit_handled_cr(vcpu, vmcs12);
5776 case EXIT_REASON_DR_ACCESS:
5777 return nested_cpu_has(vmcs12, CPU_BASED_MOV_DR_EXITING);
5778 case EXIT_REASON_IO_INSTRUCTION:
5779 /* TODO: support IO bitmaps */
5780 return 1;
5781 case EXIT_REASON_MSR_READ:
5782 case EXIT_REASON_MSR_WRITE:
5783 return nested_vmx_exit_handled_msr(vcpu, vmcs12, exit_reason);
5784 case EXIT_REASON_INVALID_STATE:
5785 return 1;
5786 case EXIT_REASON_MWAIT_INSTRUCTION:
5787 return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
5788 case EXIT_REASON_MONITOR_INSTRUCTION:
5789 return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);
5790 case EXIT_REASON_PAUSE_INSTRUCTION:
5791 return nested_cpu_has(vmcs12, CPU_BASED_PAUSE_EXITING) ||
5792 nested_cpu_has2(vmcs12,
5793 SECONDARY_EXEC_PAUSE_LOOP_EXITING);
5794 case EXIT_REASON_MCE_DURING_VMENTRY:
5795 return 0;
5796 case EXIT_REASON_TPR_BELOW_THRESHOLD:
5797 return 1;
5798 case EXIT_REASON_APIC_ACCESS:
5799 return nested_cpu_has2(vmcs12,
5800 SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
5801 case EXIT_REASON_EPT_VIOLATION:
5802 case EXIT_REASON_EPT_MISCONFIG:
5803 return 0;
5804 case EXIT_REASON_WBINVD:
5805 return nested_cpu_has2(vmcs12, SECONDARY_EXEC_WBINVD_EXITING);
5806 case EXIT_REASON_XSETBV:
5807 return 1;
5808 default:
5809 return 1;
5810 }
5811}
5812
Avi Kivity586f9602010-11-18 13:09:54 +02005813static void vmx_get_exit_info(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2)
5814{
5815 *info1 = vmcs_readl(EXIT_QUALIFICATION);
5816 *info2 = vmcs_read32(VM_EXIT_INTR_INFO);
5817}
5818
Avi Kivity6aa8b732006-12-10 02:21:36 -08005819/*
5820 * The guest has exited. See if we can fix it or if we need userspace
5821 * assistance.
5822 */
Avi Kivity851ba692009-08-24 11:10:17 +03005823static int vmx_handle_exit(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08005824{
Avi Kivity29bd8a72007-09-10 17:27:03 +03005825 struct vcpu_vmx *vmx = to_vmx(vcpu);
Andi Kleena0861c02009-06-08 17:37:09 +08005826 u32 exit_reason = vmx->exit_reason;
Avi Kivity1155f762007-11-22 11:30:47 +02005827 u32 vectoring_info = vmx->idt_vectoring_info;
Avi Kivity29bd8a72007-09-10 17:27:03 +03005828
Mohammed Gamal80ced182009-09-01 12:48:18 +02005829 /* If guest state is invalid, start emulating */
5830 if (vmx->emulation_required && emulate_invalid_guest_state)
5831 return handle_invalid_guest_state(vcpu);
Guillaume Thouvenin1d5a4d92008-10-29 09:39:42 +01005832
Nadav Har'Elb6f12502011-05-25 23:13:06 +03005833 /*
5834 * the KVM_REQ_EVENT optimization bit is only on for one entry, and if
5835 * we did not inject a still-pending event to L1 now because of
5836 * nested_run_pending, we need to re-enable this bit.
5837 */
5838 if (vmx->nested.nested_run_pending)
5839 kvm_make_request(KVM_REQ_EVENT, vcpu);
5840
Nadav Har'El509c75e2011-06-02 11:54:52 +03005841 if (!is_guest_mode(vcpu) && (exit_reason == EXIT_REASON_VMLAUNCH ||
5842 exit_reason == EXIT_REASON_VMRESUME))
Nadav Har'El644d7112011-05-25 23:12:35 +03005843 vmx->nested.nested_run_pending = 1;
5844 else
5845 vmx->nested.nested_run_pending = 0;
5846
5847 if (is_guest_mode(vcpu) && nested_vmx_exit_handled(vcpu)) {
5848 nested_vmx_vmexit(vcpu);
5849 return 1;
5850 }
5851
Mohammed Gamal51207022010-05-31 22:40:54 +03005852 if (exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY) {
5853 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
5854 vcpu->run->fail_entry.hardware_entry_failure_reason
5855 = exit_reason;
5856 return 0;
5857 }
5858
Avi Kivity29bd8a72007-09-10 17:27:03 +03005859 if (unlikely(vmx->fail)) {
Avi Kivity851ba692009-08-24 11:10:17 +03005860 vcpu->run->exit_reason = KVM_EXIT_FAIL_ENTRY;
5861 vcpu->run->fail_entry.hardware_entry_failure_reason
Avi Kivity29bd8a72007-09-10 17:27:03 +03005862 = vmcs_read32(VM_INSTRUCTION_ERROR);
5863 return 0;
5864 }
Avi Kivity6aa8b732006-12-10 02:21:36 -08005865
Mike Dayd77c26f2007-10-08 09:02:08 -04005866 if ((vectoring_info & VECTORING_INFO_VALID_MASK) &&
Sheng Yang14394422008-04-28 12:24:45 +08005867 (exit_reason != EXIT_REASON_EXCEPTION_NMI &&
Jan Kiszka60637aa2008-09-26 09:30:47 +02005868 exit_reason != EXIT_REASON_EPT_VIOLATION &&
5869 exit_reason != EXIT_REASON_TASK_SWITCH))
5870 printk(KERN_WARNING "%s: unexpected, valid vectoring info "
5871 "(0x%x) and exit reason is 0x%x\n",
5872 __func__, vectoring_info, exit_reason);
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005873
Nadav Har'El644d7112011-05-25 23:12:35 +03005874 if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked &&
5875 !(is_guest_mode(vcpu) && nested_cpu_has_virtual_nmis(
5876 get_vmcs12(vcpu), vcpu)))) {
Gleb Natapovc4282df2009-04-21 17:45:07 +03005877 if (vmx_interrupt_allowed(vcpu)) {
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005878 vmx->soft_vnmi_blocked = 0;
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005879 } else if (vmx->vnmi_blocked_time > 1000000000LL &&
Jan Kiszka45312202008-12-11 16:54:54 +01005880 vcpu->arch.nmi_pending) {
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005881 /*
5882 * This CPU don't support us in finding the end of an
5883 * NMI-blocked window if the guest runs with IRQs
5884 * disabled. So we pull the trigger after 1 s of
5885 * futile waiting, but inform the user about this.
5886 */
5887 printk(KERN_WARNING "%s: Breaking out of NMI-blocked "
5888 "state on VCPU %d after 1 s timeout\n",
5889 __func__, vcpu->vcpu_id);
5890 vmx->soft_vnmi_blocked = 0;
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005891 }
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005892 }
5893
Avi Kivity6aa8b732006-12-10 02:21:36 -08005894 if (exit_reason < kvm_vmx_max_exit_handlers
5895 && kvm_vmx_exit_handlers[exit_reason])
Avi Kivity851ba692009-08-24 11:10:17 +03005896 return kvm_vmx_exit_handlers[exit_reason](vcpu);
Avi Kivity6aa8b732006-12-10 02:21:36 -08005897 else {
Avi Kivity851ba692009-08-24 11:10:17 +03005898 vcpu->run->exit_reason = KVM_EXIT_UNKNOWN;
5899 vcpu->run->hw.hardware_exit_reason = exit_reason;
Avi Kivity6aa8b732006-12-10 02:21:36 -08005900 }
5901 return 0;
5902}
5903
Gleb Natapov95ba8273132009-04-21 17:45:08 +03005904static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
Yang, Sheng6e5d8652007-09-12 18:03:11 +08005905{
Gleb Natapov95ba8273132009-04-21 17:45:08 +03005906 if (irr == -1 || tpr < irr) {
Yang, Sheng6e5d8652007-09-12 18:03:11 +08005907 vmcs_write32(TPR_THRESHOLD, 0);
5908 return;
5909 }
5910
Gleb Natapov95ba8273132009-04-21 17:45:08 +03005911 vmcs_write32(TPR_THRESHOLD, irr);
Yang, Sheng6e5d8652007-09-12 18:03:11 +08005912}
5913
Avi Kivity51aa01d2010-07-20 14:31:20 +03005914static void vmx_complete_atomic_exit(struct vcpu_vmx *vmx)
Avi Kivitycf393f72008-07-01 16:20:21 +03005915{
Avi Kivity00eba012011-03-07 17:24:54 +02005916 u32 exit_intr_info;
5917
5918 if (!(vmx->exit_reason == EXIT_REASON_MCE_DURING_VMENTRY
5919 || vmx->exit_reason == EXIT_REASON_EXCEPTION_NMI))
5920 return;
5921
Avi Kivityc5ca8e52011-03-07 17:37:37 +02005922 vmx->exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
Avi Kivity00eba012011-03-07 17:24:54 +02005923 exit_intr_info = vmx->exit_intr_info;
Andi Kleena0861c02009-06-08 17:37:09 +08005924
5925 /* Handle machine checks before interrupts are enabled */
Avi Kivity00eba012011-03-07 17:24:54 +02005926 if (is_machine_check(exit_intr_info))
Andi Kleena0861c02009-06-08 17:37:09 +08005927 kvm_machine_check();
5928
Gleb Natapov20f65982009-05-11 13:35:55 +03005929 /* We need to handle NMIs before interrupts are enabled */
Avi Kivity00eba012011-03-07 17:24:54 +02005930 if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
Zhang, Yanminff9d07a2010-04-19 13:32:45 +08005931 (exit_intr_info & INTR_INFO_VALID_MASK)) {
5932 kvm_before_handle_nmi(&vmx->vcpu);
Gleb Natapov20f65982009-05-11 13:35:55 +03005933 asm("int $2");
Zhang, Yanminff9d07a2010-04-19 13:32:45 +08005934 kvm_after_handle_nmi(&vmx->vcpu);
5935 }
Avi Kivity51aa01d2010-07-20 14:31:20 +03005936}
Gleb Natapov20f65982009-05-11 13:35:55 +03005937
Avi Kivity51aa01d2010-07-20 14:31:20 +03005938static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx)
5939{
Avi Kivityc5ca8e52011-03-07 17:37:37 +02005940 u32 exit_intr_info;
Avi Kivity51aa01d2010-07-20 14:31:20 +03005941 bool unblock_nmi;
5942 u8 vector;
5943 bool idtv_info_valid;
5944
5945 idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK;
Gleb Natapov20f65982009-05-11 13:35:55 +03005946
Avi Kivitycf393f72008-07-01 16:20:21 +03005947 if (cpu_has_virtual_nmis()) {
Avi Kivity9d58b932011-03-07 16:52:07 +02005948 if (vmx->nmi_known_unmasked)
5949 return;
Avi Kivityc5ca8e52011-03-07 17:37:37 +02005950 /*
5951 * Can't use vmx->exit_intr_info since we're not sure what
5952 * the exit reason is.
5953 */
5954 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
Avi Kivitycf393f72008-07-01 16:20:21 +03005955 unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0;
5956 vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
5957 /*
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03005958 * SDM 3: 27.7.1.2 (September 2008)
Avi Kivitycf393f72008-07-01 16:20:21 +03005959 * Re-set bit "block by NMI" before VM entry if vmexit caused by
5960 * a guest IRET fault.
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03005961 * SDM 3: 23.2.2 (September 2008)
5962 * Bit 12 is undefined in any of the following cases:
5963 * If the VM exit sets the valid bit in the IDT-vectoring
5964 * information field.
5965 * If the VM exit is due to a double fault.
Avi Kivitycf393f72008-07-01 16:20:21 +03005966 */
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03005967 if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi &&
5968 vector != DF_VECTOR && !idtv_info_valid)
Avi Kivitycf393f72008-07-01 16:20:21 +03005969 vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
5970 GUEST_INTR_STATE_NMI);
Avi Kivity9d58b932011-03-07 16:52:07 +02005971 else
5972 vmx->nmi_known_unmasked =
5973 !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO)
5974 & GUEST_INTR_STATE_NMI);
Jan Kiszka3b86cd92008-09-26 09:30:57 +02005975 } else if (unlikely(vmx->soft_vnmi_blocked))
5976 vmx->vnmi_blocked_time +=
5977 ktime_to_ns(ktime_sub(ktime_get(), vmx->entry_time));
Avi Kivity51aa01d2010-07-20 14:31:20 +03005978}
5979
Avi Kivity83422e12010-07-20 14:43:23 +03005980static void __vmx_complete_interrupts(struct vcpu_vmx *vmx,
5981 u32 idt_vectoring_info,
5982 int instr_len_field,
5983 int error_code_field)
Avi Kivity51aa01d2010-07-20 14:31:20 +03005984{
Avi Kivity51aa01d2010-07-20 14:31:20 +03005985 u8 vector;
5986 int type;
5987 bool idtv_info_valid;
5988
5989 idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
Avi Kivity668f6122008-07-02 09:28:55 +03005990
Gleb Natapov37b96e92009-03-30 16:03:13 +03005991 vmx->vcpu.arch.nmi_injected = false;
5992 kvm_clear_exception_queue(&vmx->vcpu);
5993 kvm_clear_interrupt_queue(&vmx->vcpu);
5994
5995 if (!idtv_info_valid)
5996 return;
5997
Avi Kivity3842d132010-07-27 12:30:24 +03005998 kvm_make_request(KVM_REQ_EVENT, &vmx->vcpu);
5999
Avi Kivity668f6122008-07-02 09:28:55 +03006000 vector = idt_vectoring_info & VECTORING_INFO_VECTOR_MASK;
6001 type = idt_vectoring_info & VECTORING_INFO_TYPE_MASK;
Gleb Natapov37b96e92009-03-30 16:03:13 +03006002
Gleb Natapov64a7ec02009-03-30 16:03:29 +03006003 switch (type) {
Gleb Natapov37b96e92009-03-30 16:03:13 +03006004 case INTR_TYPE_NMI_INTR:
6005 vmx->vcpu.arch.nmi_injected = true;
Avi Kivity668f6122008-07-02 09:28:55 +03006006 /*
Gleb Natapov7b4a25c2009-03-30 16:03:08 +03006007 * SDM 3: 27.7.1.2 (September 2008)
Gleb Natapov37b96e92009-03-30 16:03:13 +03006008 * Clear bit "block by NMI" before VM entry if a NMI
6009 * delivery faulted.
Avi Kivity668f6122008-07-02 09:28:55 +03006010 */
Avi Kivity654f06f2011-03-23 15:02:47 +02006011 vmx_set_nmi_mask(&vmx->vcpu, false);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006012 break;
Gleb Natapov37b96e92009-03-30 16:03:13 +03006013 case INTR_TYPE_SOFT_EXCEPTION:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006014 vmx->vcpu.arch.event_exit_inst_len =
Avi Kivity83422e12010-07-20 14:43:23 +03006015 vmcs_read32(instr_len_field);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006016 /* fall through */
6017 case INTR_TYPE_HARD_EXCEPTION:
Avi Kivity35920a32008-07-03 14:50:12 +03006018 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
Avi Kivity83422e12010-07-20 14:43:23 +03006019 u32 err = vmcs_read32(error_code_field);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006020 kvm_queue_exception_e(&vmx->vcpu, vector, err);
Avi Kivity35920a32008-07-03 14:50:12 +03006021 } else
6022 kvm_queue_exception(&vmx->vcpu, vector);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006023 break;
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006024 case INTR_TYPE_SOFT_INTR:
6025 vmx->vcpu.arch.event_exit_inst_len =
Avi Kivity83422e12010-07-20 14:43:23 +03006026 vmcs_read32(instr_len_field);
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006027 /* fall through */
Gleb Natapov37b96e92009-03-30 16:03:13 +03006028 case INTR_TYPE_EXT_INTR:
Gleb Natapov66fd3f72009-05-11 13:35:50 +03006029 kvm_queue_interrupt(&vmx->vcpu, vector,
6030 type == INTR_TYPE_SOFT_INTR);
Gleb Natapov37b96e92009-03-30 16:03:13 +03006031 break;
6032 default:
6033 break;
Avi Kivityf7d92382008-07-03 16:14:28 +03006034 }
Avi Kivitycf393f72008-07-01 16:20:21 +03006035}
6036
Avi Kivity83422e12010-07-20 14:43:23 +03006037static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
6038{
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006039 if (is_guest_mode(&vmx->vcpu))
6040 return;
Avi Kivity83422e12010-07-20 14:43:23 +03006041 __vmx_complete_interrupts(vmx, vmx->idt_vectoring_info,
6042 VM_EXIT_INSTRUCTION_LEN,
6043 IDT_VECTORING_ERROR_CODE);
6044}
6045
Avi Kivityb463a6f2010-07-20 15:06:17 +03006046static void vmx_cancel_injection(struct kvm_vcpu *vcpu)
6047{
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006048 if (is_guest_mode(vcpu))
6049 return;
Avi Kivityb463a6f2010-07-20 15:06:17 +03006050 __vmx_complete_interrupts(to_vmx(vcpu),
6051 vmcs_read32(VM_ENTRY_INTR_INFO_FIELD),
6052 VM_ENTRY_INSTRUCTION_LEN,
6053 VM_ENTRY_EXCEPTION_ERROR_CODE);
6054
6055 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0);
6056}
6057
Gleb Natapovd7cd9792011-10-05 14:01:23 +02006058static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx)
6059{
6060 int i, nr_msrs;
6061 struct perf_guest_switch_msr *msrs;
6062
6063 msrs = perf_guest_get_msrs(&nr_msrs);
6064
6065 if (!msrs)
6066 return;
6067
6068 for (i = 0; i < nr_msrs; i++)
6069 if (msrs[i].host == msrs[i].guest)
6070 clear_atomic_switch_msr(vmx, msrs[i].msr);
6071 else
6072 add_atomic_switch_msr(vmx, msrs[i].msr, msrs[i].guest,
6073 msrs[i].host);
6074}
6075
Avi Kivityc8019492008-07-14 14:44:59 +03006076#ifdef CONFIG_X86_64
6077#define R "r"
6078#define Q "q"
6079#else
6080#define R "e"
6081#define Q "l"
6082#endif
6083
Lai Jiangshana3b5ba42011-02-11 14:29:40 +08006084static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
Avi Kivity6aa8b732006-12-10 02:21:36 -08006085{
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006086 struct vcpu_vmx *vmx = to_vmx(vcpu);
Avi Kivity104f2262010-11-18 13:12:52 +02006087
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006088 if (is_guest_mode(vcpu) && !vmx->nested.nested_run_pending) {
6089 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
6090 if (vmcs12->idt_vectoring_info_field &
6091 VECTORING_INFO_VALID_MASK) {
6092 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
6093 vmcs12->idt_vectoring_info_field);
6094 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
6095 vmcs12->vm_exit_instruction_len);
6096 if (vmcs12->idt_vectoring_info_field &
6097 VECTORING_INFO_DELIVER_CODE_MASK)
6098 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
6099 vmcs12->idt_vectoring_error_code);
6100 }
6101 }
6102
Avi Kivity104f2262010-11-18 13:12:52 +02006103 /* Record the guest's net vcpu time for enforced NMI injections. */
6104 if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked))
6105 vmx->entry_time = ktime_get();
6106
6107 /* Don't enter VMX if guest state is invalid, let the exit handler
6108 start emulation until we arrive back to a valid state */
6109 if (vmx->emulation_required && emulate_invalid_guest_state)
6110 return;
6111
6112 if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
6113 vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
6114 if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
6115 vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);
6116
6117 /* When single-stepping over STI and MOV SS, we must clear the
6118 * corresponding interruptibility bits in the guest state. Otherwise
6119 * vmentry fails as it then expects bit 14 (BS) in pending debug
6120 * exceptions being set, but that's not correct for the guest debugging
6121 * case. */
6122 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6123 vmx_set_interrupt_shadow(vcpu, 0);
6124
Gleb Natapovd7cd9792011-10-05 14:01:23 +02006125 atomic_switch_perf_msrs(vmx);
6126
Nadav Har'Eld462b812011-05-24 15:26:10 +03006127 vmx->__launched = vmx->loaded_vmcs->launched;
Avi Kivity104f2262010-11-18 13:12:52 +02006128 asm(
Avi Kivity6aa8b732006-12-10 02:21:36 -08006129 /* Store host registers */
Avi Kivityc8019492008-07-14 14:44:59 +03006130 "push %%"R"dx; push %%"R"bp;"
Avi Kivity40712fa2011-01-06 18:09:12 +02006131 "push %%"R"cx \n\t" /* placeholder for guest rcx */
Avi Kivityc8019492008-07-14 14:44:59 +03006132 "push %%"R"cx \n\t"
Avi Kivity313dbd42008-07-17 18:04:30 +03006133 "cmp %%"R"sp, %c[host_rsp](%0) \n\t"
6134 "je 1f \n\t"
6135 "mov %%"R"sp, %c[host_rsp](%0) \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006136 __ex(ASM_VMX_VMWRITE_RSP_RDX) "\n\t"
Avi Kivity313dbd42008-07-17 18:04:30 +03006137 "1: \n\t"
Avi Kivityd3edefc2009-06-16 12:33:56 +03006138 /* Reload cr2 if changed */
6139 "mov %c[cr2](%0), %%"R"ax \n\t"
6140 "mov %%cr2, %%"R"dx \n\t"
6141 "cmp %%"R"ax, %%"R"dx \n\t"
6142 "je 2f \n\t"
6143 "mov %%"R"ax, %%cr2 \n\t"
6144 "2: \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006145 /* Check if vmlaunch of vmresume is needed */
Avi Kivitye08aa782007-11-15 18:06:18 +02006146 "cmpl $0, %c[launched](%0) \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006147 /* Load guest registers. Don't clobber flags. */
Avi Kivityc8019492008-07-14 14:44:59 +03006148 "mov %c[rax](%0), %%"R"ax \n\t"
6149 "mov %c[rbx](%0), %%"R"bx \n\t"
6150 "mov %c[rdx](%0), %%"R"dx \n\t"
6151 "mov %c[rsi](%0), %%"R"si \n\t"
6152 "mov %c[rdi](%0), %%"R"di \n\t"
6153 "mov %c[rbp](%0), %%"R"bp \n\t"
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006154#ifdef CONFIG_X86_64
Avi Kivitye08aa782007-11-15 18:06:18 +02006155 "mov %c[r8](%0), %%r8 \n\t"
6156 "mov %c[r9](%0), %%r9 \n\t"
6157 "mov %c[r10](%0), %%r10 \n\t"
6158 "mov %c[r11](%0), %%r11 \n\t"
6159 "mov %c[r12](%0), %%r12 \n\t"
6160 "mov %c[r13](%0), %%r13 \n\t"
6161 "mov %c[r14](%0), %%r14 \n\t"
6162 "mov %c[r15](%0), %%r15 \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006163#endif
Avi Kivityc8019492008-07-14 14:44:59 +03006164 "mov %c[rcx](%0), %%"R"cx \n\t" /* kills %0 (ecx) */
6165
Avi Kivity6aa8b732006-12-10 02:21:36 -08006166 /* Enter guest mode */
Avi Kivitycd2276a2007-05-14 20:41:13 +03006167 "jne .Llaunched \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006168 __ex(ASM_VMX_VMLAUNCH) "\n\t"
Avi Kivitycd2276a2007-05-14 20:41:13 +03006169 "jmp .Lkvm_vmx_return \n\t"
Avi Kivity4ecac3f2008-05-13 13:23:38 +03006170 ".Llaunched: " __ex(ASM_VMX_VMRESUME) "\n\t"
Avi Kivitycd2276a2007-05-14 20:41:13 +03006171 ".Lkvm_vmx_return: "
Avi Kivity6aa8b732006-12-10 02:21:36 -08006172 /* Save guest registers, load host registers, keep flags */
Avi Kivity40712fa2011-01-06 18:09:12 +02006173 "mov %0, %c[wordsize](%%"R"sp) \n\t"
6174 "pop %0 \n\t"
Avi Kivityc8019492008-07-14 14:44:59 +03006175 "mov %%"R"ax, %c[rax](%0) \n\t"
6176 "mov %%"R"bx, %c[rbx](%0) \n\t"
Avi Kivity1c696d02011-01-06 18:09:11 +02006177 "pop"Q" %c[rcx](%0) \n\t"
Avi Kivityc8019492008-07-14 14:44:59 +03006178 "mov %%"R"dx, %c[rdx](%0) \n\t"
6179 "mov %%"R"si, %c[rsi](%0) \n\t"
6180 "mov %%"R"di, %c[rdi](%0) \n\t"
6181 "mov %%"R"bp, %c[rbp](%0) \n\t"
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006182#ifdef CONFIG_X86_64
Avi Kivitye08aa782007-11-15 18:06:18 +02006183 "mov %%r8, %c[r8](%0) \n\t"
6184 "mov %%r9, %c[r9](%0) \n\t"
6185 "mov %%r10, %c[r10](%0) \n\t"
6186 "mov %%r11, %c[r11](%0) \n\t"
6187 "mov %%r12, %c[r12](%0) \n\t"
6188 "mov %%r13, %c[r13](%0) \n\t"
6189 "mov %%r14, %c[r14](%0) \n\t"
6190 "mov %%r15, %c[r15](%0) \n\t"
Avi Kivity6aa8b732006-12-10 02:21:36 -08006191#endif
Avi Kivityc8019492008-07-14 14:44:59 +03006192 "mov %%cr2, %%"R"ax \n\t"
6193 "mov %%"R"ax, %c[cr2](%0) \n\t"
6194
Avi Kivity1c696d02011-01-06 18:09:11 +02006195 "pop %%"R"bp; pop %%"R"dx \n\t"
Avi Kivitye08aa782007-11-15 18:06:18 +02006196 "setbe %c[fail](%0) \n\t"
6197 : : "c"(vmx), "d"((unsigned long)HOST_RSP),
Nadav Har'Eld462b812011-05-24 15:26:10 +03006198 [launched]"i"(offsetof(struct vcpu_vmx, __launched)),
Avi Kivitye08aa782007-11-15 18:06:18 +02006199 [fail]"i"(offsetof(struct vcpu_vmx, fail)),
Avi Kivity313dbd42008-07-17 18:04:30 +03006200 [host_rsp]"i"(offsetof(struct vcpu_vmx, host_rsp)),
Zhang Xiantaoad312c72007-12-13 23:50:52 +08006201 [rax]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RAX])),
6202 [rbx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBX])),
6203 [rcx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RCX])),
6204 [rdx]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDX])),
6205 [rsi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RSI])),
6206 [rdi]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RDI])),
6207 [rbp]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_RBP])),
Avi Kivity05b3e0c2006-12-13 00:33:45 -08006208#ifdef CONFIG_X86_64
Zhang Xiantaoad312c72007-12-13 23:50:52 +08006209 [r8]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R8])),
6210 [r9]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R9])),
6211 [r10]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R10])),
6212 [r11]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R11])),
6213 [r12]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R12])),
6214 [r13]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R13])),
6215 [r14]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R14])),
6216 [r15]"i"(offsetof(struct vcpu_vmx, vcpu.arch.regs[VCPU_REGS_R15])),
Avi Kivity6aa8b732006-12-10 02:21:36 -08006217#endif
Avi Kivity40712fa2011-01-06 18:09:12 +02006218 [cr2]"i"(offsetof(struct vcpu_vmx, vcpu.arch.cr2)),
6219 [wordsize]"i"(sizeof(ulong))
Laurent Vivierc2036302007-10-25 14:18:52 +02006220 : "cc", "memory"
Jan Kiszka07d6f552010-09-28 16:37:42 +02006221 , R"ax", R"bx", R"di", R"si"
Laurent Vivierc2036302007-10-25 14:18:52 +02006222#ifdef CONFIG_X86_64
Laurent Vivierc2036302007-10-25 14:18:52 +02006223 , "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
6224#endif
6225 );
Avi Kivity6aa8b732006-12-10 02:21:36 -08006226
Avi Kivity6de4f3a2009-05-31 22:58:47 +03006227 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)
Avi Kivity6de12732011-03-07 12:51:22 +02006228 | (1 << VCPU_EXREG_RFLAGS)
Avi Kivity69c73022011-03-07 15:26:44 +02006229 | (1 << VCPU_EXREG_CPL)
Avi Kivityaff48ba2010-12-05 18:56:11 +02006230 | (1 << VCPU_EXREG_PDPTR)
Avi Kivity2fb92db2011-04-27 19:42:18 +03006231 | (1 << VCPU_EXREG_SEGMENTS)
Avi Kivityaff48ba2010-12-05 18:56:11 +02006232 | (1 << VCPU_EXREG_CR3));
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03006233 vcpu->arch.regs_dirty = 0;
6234
Avi Kivity1155f762007-11-22 11:30:47 +02006235 vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
6236
Nadav Har'El66c78ae2011-05-25 23:14:07 +03006237 if (is_guest_mode(vcpu)) {
6238 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
6239 vmcs12->idt_vectoring_info_field = vmx->idt_vectoring_info;
6240 if (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) {
6241 vmcs12->idt_vectoring_error_code =
6242 vmcs_read32(IDT_VECTORING_ERROR_CODE);
6243 vmcs12->vm_exit_instruction_len =
6244 vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
6245 }
6246 }
6247
Mike Dayd77c26f2007-10-08 09:02:08 -04006248 asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
Nadav Har'Eld462b812011-05-24 15:26:10 +03006249 vmx->loaded_vmcs->launched = 1;
Avi Kivity1b6269d2007-10-09 12:12:19 +02006250
Avi Kivity51aa01d2010-07-20 14:31:20 +03006251 vmx->exit_reason = vmcs_read32(VM_EXIT_REASON);
Jan Kiszka1e2b1dd2011-09-12 10:52:24 +02006252 trace_kvm_exit(vmx->exit_reason, vcpu, KVM_ISA_VMX);
Avi Kivity51aa01d2010-07-20 14:31:20 +03006253
6254 vmx_complete_atomic_exit(vmx);
6255 vmx_recover_nmi_blocking(vmx);
Avi Kivitycf393f72008-07-01 16:20:21 +03006256 vmx_complete_interrupts(vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006257}
6258
Avi Kivityc8019492008-07-14 14:44:59 +03006259#undef R
6260#undef Q
6261
Avi Kivity6aa8b732006-12-10 02:21:36 -08006262static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
6263{
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006264 struct vcpu_vmx *vmx = to_vmx(vcpu);
6265
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08006266 free_vpid(vmx);
Nadav Har'Elec378ae2011-05-25 23:02:54 +03006267 free_nested(vmx);
Nadav Har'Eld462b812011-05-24 15:26:10 +03006268 free_loaded_vmcs(vmx->loaded_vmcs);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006269 kfree(vmx->guest_msrs);
6270 kvm_vcpu_uninit(vcpu);
Rusty Russella4770342007-08-01 14:46:11 +10006271 kmem_cache_free(kvm_vcpu_cache, vmx);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006272}
6273
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006274static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
Avi Kivity6aa8b732006-12-10 02:21:36 -08006275{
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006276 int err;
Rusty Russellc16f8622007-07-30 21:12:19 +10006277 struct vcpu_vmx *vmx = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
Avi Kivity15ad7142007-07-11 18:17:21 +03006278 int cpu;
Avi Kivity6aa8b732006-12-10 02:21:36 -08006279
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006280 if (!vmx)
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006281 return ERR_PTR(-ENOMEM);
6282
Sheng Yang2384d2b2008-01-17 15:14:33 +08006283 allocate_vpid(vmx);
6284
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006285 err = kvm_vcpu_init(&vmx->vcpu, kvm, id);
6286 if (err)
6287 goto free_vcpu;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006288
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006289 vmx->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
Jan Kiszkabe6d05c2011-04-13 01:27:55 +02006290 err = -ENOMEM;
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006291 if (!vmx->guest_msrs) {
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006292 goto uninit_vcpu;
6293 }
Ingo Molnar965b58a2007-01-05 16:36:23 -08006294
Nadav Har'Eld462b812011-05-24 15:26:10 +03006295 vmx->loaded_vmcs = &vmx->vmcs01;
6296 vmx->loaded_vmcs->vmcs = alloc_vmcs();
6297 if (!vmx->loaded_vmcs->vmcs)
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006298 goto free_msrs;
Nadav Har'Eld462b812011-05-24 15:26:10 +03006299 if (!vmm_exclusive)
6300 kvm_cpu_vmxon(__pa(per_cpu(vmxarea, raw_smp_processor_id())));
6301 loaded_vmcs_init(vmx->loaded_vmcs);
6302 if (!vmm_exclusive)
6303 kvm_cpu_vmxoff();
Gregory Haskinsa2fa3e92007-07-27 08:13:10 -04006304
Avi Kivity15ad7142007-07-11 18:17:21 +03006305 cpu = get_cpu();
6306 vmx_vcpu_load(&vmx->vcpu, cpu);
Zachary Amsdene48672f2010-08-19 22:07:23 -10006307 vmx->vcpu.cpu = cpu;
Rusty Russell8b9cf982007-07-30 16:31:43 +10006308 err = vmx_vcpu_setup(vmx);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006309 vmx_vcpu_put(&vmx->vcpu);
Avi Kivity15ad7142007-07-11 18:17:21 +03006310 put_cpu();
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006311 if (err)
6312 goto free_vmcs;
Marcelo Tosatti5e4a0b32008-02-14 21:21:43 -02006313 if (vm_need_virtualize_apic_accesses(kvm))
Jan Kiszkabe6d05c2011-04-13 01:27:55 +02006314 err = alloc_apic_access_page(kvm);
6315 if (err)
Marcelo Tosatti5e4a0b32008-02-14 21:21:43 -02006316 goto free_vmcs;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006317
Sheng Yangb927a3c2009-07-21 10:42:48 +08006318 if (enable_ept) {
6319 if (!kvm->arch.ept_identity_map_addr)
6320 kvm->arch.ept_identity_map_addr =
6321 VMX_EPT_IDENTITY_PAGETABLE_ADDR;
Gleb Natapov93ea5382011-02-21 12:07:59 +02006322 err = -ENOMEM;
Sheng Yangb7ebfb02008-04-25 21:44:52 +08006323 if (alloc_identity_pagetable(kvm) != 0)
6324 goto free_vmcs;
Gleb Natapov93ea5382011-02-21 12:07:59 +02006325 if (!init_rmode_identity_map(kvm))
6326 goto free_vmcs;
Sheng Yangb927a3c2009-07-21 10:42:48 +08006327 }
Sheng Yangb7ebfb02008-04-25 21:44:52 +08006328
Nadav Har'Ela9d30f32011-05-25 23:03:55 +03006329 vmx->nested.current_vmptr = -1ull;
6330 vmx->nested.current_vmcs12 = NULL;
6331
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006332 return &vmx->vcpu;
Ingo Molnar965b58a2007-01-05 16:36:23 -08006333
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006334free_vmcs:
Nadav Har'Eld462b812011-05-24 15:26:10 +03006335 free_vmcs(vmx->loaded_vmcs->vmcs);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006336free_msrs:
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006337 kfree(vmx->guest_msrs);
6338uninit_vcpu:
6339 kvm_vcpu_uninit(&vmx->vcpu);
6340free_vcpu:
Lai Jiangshancdbecfc2010-04-17 16:41:47 +08006341 free_vpid(vmx);
Rusty Russella4770342007-08-01 14:46:11 +10006342 kmem_cache_free(kvm_vcpu_cache, vmx);
Rusty Russellfb3f0f52007-07-27 17:16:56 +10006343 return ERR_PTR(err);
Avi Kivity6aa8b732006-12-10 02:21:36 -08006344}
6345
Yang, Sheng002c7f72007-07-31 14:23:01 +03006346static void __init vmx_check_processor_compat(void *rtn)
6347{
6348 struct vmcs_config vmcs_conf;
6349
6350 *(int *)rtn = 0;
6351 if (setup_vmcs_config(&vmcs_conf) < 0)
6352 *(int *)rtn = -EIO;
6353 if (memcmp(&vmcs_config, &vmcs_conf, sizeof(struct vmcs_config)) != 0) {
6354 printk(KERN_ERR "kvm: CPU %d feature inconsistency!\n",
6355 smp_processor_id());
6356 *(int *)rtn = -EIO;
6357 }
6358}
6359
Sheng Yang67253af2008-04-25 10:20:22 +08006360static int get_ept_level(void)
6361{
6362 return VMX_EPT_DEFAULT_GAW + 1;
6363}
6364
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006365static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
Sheng Yang64d4d522008-10-09 16:01:57 +08006366{
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006367 u64 ret;
6368
Sheng Yang522c68c2009-04-27 20:35:43 +08006369 /* For VT-d and EPT combination
6370 * 1. MMIO: always map as UC
6371 * 2. EPT with VT-d:
6372 * a. VT-d without snooping control feature: can't guarantee the
6373 * result, try to trust guest.
6374 * b. VT-d with snooping control feature: snooping control feature of
6375 * VT-d engine can guarantee the cache correctness. Just set it
6376 * to WB to keep consistent with host. So the same as item 3.
Sheng Yanga19a6d12010-02-09 16:41:53 +08006377 * 3. EPT without VT-d: always map as WB and set IPAT=1 to keep
Sheng Yang522c68c2009-04-27 20:35:43 +08006378 * consistent with host MTRR
6379 */
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006380 if (is_mmio)
6381 ret = MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT;
Sheng Yang522c68c2009-04-27 20:35:43 +08006382 else if (vcpu->kvm->arch.iommu_domain &&
6383 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY))
6384 ret = kvm_get_guest_memory_type(vcpu, gfn) <<
6385 VMX_EPT_MT_EPTE_SHIFT;
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006386 else
Sheng Yang522c68c2009-04-27 20:35:43 +08006387 ret = (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT)
Sheng Yanga19a6d12010-02-09 16:41:53 +08006388 | VMX_EPT_IPAT_BIT;
Sheng Yang4b12f0d2009-04-27 20:35:42 +08006389
6390 return ret;
Sheng Yang64d4d522008-10-09 16:01:57 +08006391}
6392
Sheng Yang17cc3932010-01-05 19:02:27 +08006393static int vmx_get_lpage_level(void)
Joerg Roedel344f4142009-07-27 16:30:48 +02006394{
Sheng Yang878403b2010-01-05 19:02:29 +08006395 if (enable_ept && !cpu_has_vmx_ept_1g_page())
6396 return PT_DIRECTORY_LEVEL;
6397 else
6398 /* For shadow and EPT supported 1GB page */
6399 return PT_PDPE_LEVEL;
Joerg Roedel344f4142009-07-27 16:30:48 +02006400}
6401
Sheng Yang0e851882009-12-18 16:48:46 +08006402static void vmx_cpuid_update(struct kvm_vcpu *vcpu)
6403{
Sheng Yang4e47c7a2009-12-18 16:48:47 +08006404 struct kvm_cpuid_entry2 *best;
6405 struct vcpu_vmx *vmx = to_vmx(vcpu);
6406 u32 exec_control;
6407
6408 vmx->rdtscp_enabled = false;
6409 if (vmx_rdtscp_supported()) {
6410 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL);
6411 if (exec_control & SECONDARY_EXEC_RDTSCP) {
6412 best = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
6413 if (best && (best->edx & bit(X86_FEATURE_RDTSCP)))
6414 vmx->rdtscp_enabled = true;
6415 else {
6416 exec_control &= ~SECONDARY_EXEC_RDTSCP;
6417 vmcs_write32(SECONDARY_VM_EXEC_CONTROL,
6418 exec_control);
6419 }
6420 }
6421 }
Sheng Yang0e851882009-12-18 16:48:46 +08006422}
6423
Joerg Roedeld4330ef2010-04-22 12:33:11 +02006424static void vmx_set_supported_cpuid(u32 func, struct kvm_cpuid_entry2 *entry)
6425{
Nadav Har'El7b8050f2011-05-25 23:16:10 +03006426 if (func == 1 && nested)
6427 entry->ecx |= bit(X86_FEATURE_VMX);
Joerg Roedeld4330ef2010-04-22 12:33:11 +02006428}
6429
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03006430/*
6431 * prepare_vmcs02 is called when the L1 guest hypervisor runs its nested
6432 * L2 guest. L1 has a vmcs for L2 (vmcs12), and this function "merges" it
6433 * with L0's requirements for its guest (a.k.a. vmsc01), so we can run the L2
6434 * guest in a way that will both be appropriate to L1's requests, and our
6435 * needs. In addition to modifying the active vmcs (which is vmcs02), this
6436 * function also has additional necessary side-effects, like setting various
6437 * vcpu->arch fields.
6438 */
6439static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6440{
6441 struct vcpu_vmx *vmx = to_vmx(vcpu);
6442 u32 exec_control;
6443
6444 vmcs_write16(GUEST_ES_SELECTOR, vmcs12->guest_es_selector);
6445 vmcs_write16(GUEST_CS_SELECTOR, vmcs12->guest_cs_selector);
6446 vmcs_write16(GUEST_SS_SELECTOR, vmcs12->guest_ss_selector);
6447 vmcs_write16(GUEST_DS_SELECTOR, vmcs12->guest_ds_selector);
6448 vmcs_write16(GUEST_FS_SELECTOR, vmcs12->guest_fs_selector);
6449 vmcs_write16(GUEST_GS_SELECTOR, vmcs12->guest_gs_selector);
6450 vmcs_write16(GUEST_LDTR_SELECTOR, vmcs12->guest_ldtr_selector);
6451 vmcs_write16(GUEST_TR_SELECTOR, vmcs12->guest_tr_selector);
6452 vmcs_write32(GUEST_ES_LIMIT, vmcs12->guest_es_limit);
6453 vmcs_write32(GUEST_CS_LIMIT, vmcs12->guest_cs_limit);
6454 vmcs_write32(GUEST_SS_LIMIT, vmcs12->guest_ss_limit);
6455 vmcs_write32(GUEST_DS_LIMIT, vmcs12->guest_ds_limit);
6456 vmcs_write32(GUEST_FS_LIMIT, vmcs12->guest_fs_limit);
6457 vmcs_write32(GUEST_GS_LIMIT, vmcs12->guest_gs_limit);
6458 vmcs_write32(GUEST_LDTR_LIMIT, vmcs12->guest_ldtr_limit);
6459 vmcs_write32(GUEST_TR_LIMIT, vmcs12->guest_tr_limit);
6460 vmcs_write32(GUEST_GDTR_LIMIT, vmcs12->guest_gdtr_limit);
6461 vmcs_write32(GUEST_IDTR_LIMIT, vmcs12->guest_idtr_limit);
6462 vmcs_write32(GUEST_ES_AR_BYTES, vmcs12->guest_es_ar_bytes);
6463 vmcs_write32(GUEST_CS_AR_BYTES, vmcs12->guest_cs_ar_bytes);
6464 vmcs_write32(GUEST_SS_AR_BYTES, vmcs12->guest_ss_ar_bytes);
6465 vmcs_write32(GUEST_DS_AR_BYTES, vmcs12->guest_ds_ar_bytes);
6466 vmcs_write32(GUEST_FS_AR_BYTES, vmcs12->guest_fs_ar_bytes);
6467 vmcs_write32(GUEST_GS_AR_BYTES, vmcs12->guest_gs_ar_bytes);
6468 vmcs_write32(GUEST_LDTR_AR_BYTES, vmcs12->guest_ldtr_ar_bytes);
6469 vmcs_write32(GUEST_TR_AR_BYTES, vmcs12->guest_tr_ar_bytes);
6470 vmcs_writel(GUEST_ES_BASE, vmcs12->guest_es_base);
6471 vmcs_writel(GUEST_CS_BASE, vmcs12->guest_cs_base);
6472 vmcs_writel(GUEST_SS_BASE, vmcs12->guest_ss_base);
6473 vmcs_writel(GUEST_DS_BASE, vmcs12->guest_ds_base);
6474 vmcs_writel(GUEST_FS_BASE, vmcs12->guest_fs_base);
6475 vmcs_writel(GUEST_GS_BASE, vmcs12->guest_gs_base);
6476 vmcs_writel(GUEST_LDTR_BASE, vmcs12->guest_ldtr_base);
6477 vmcs_writel(GUEST_TR_BASE, vmcs12->guest_tr_base);
6478 vmcs_writel(GUEST_GDTR_BASE, vmcs12->guest_gdtr_base);
6479 vmcs_writel(GUEST_IDTR_BASE, vmcs12->guest_idtr_base);
6480
6481 vmcs_write64(GUEST_IA32_DEBUGCTL, vmcs12->guest_ia32_debugctl);
6482 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
6483 vmcs12->vm_entry_intr_info_field);
6484 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE,
6485 vmcs12->vm_entry_exception_error_code);
6486 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
6487 vmcs12->vm_entry_instruction_len);
6488 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
6489 vmcs12->guest_interruptibility_info);
6490 vmcs_write32(GUEST_ACTIVITY_STATE, vmcs12->guest_activity_state);
6491 vmcs_write32(GUEST_SYSENTER_CS, vmcs12->guest_sysenter_cs);
6492 vmcs_writel(GUEST_DR7, vmcs12->guest_dr7);
6493 vmcs_writel(GUEST_RFLAGS, vmcs12->guest_rflags);
6494 vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS,
6495 vmcs12->guest_pending_dbg_exceptions);
6496 vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->guest_sysenter_esp);
6497 vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->guest_sysenter_eip);
6498
6499 vmcs_write64(VMCS_LINK_POINTER, -1ull);
6500
6501 vmcs_write32(PIN_BASED_VM_EXEC_CONTROL,
6502 (vmcs_config.pin_based_exec_ctrl |
6503 vmcs12->pin_based_vm_exec_control));
6504
6505 /*
6506 * Whether page-faults are trapped is determined by a combination of
6507 * 3 settings: PFEC_MASK, PFEC_MATCH and EXCEPTION_BITMAP.PF.
6508 * If enable_ept, L0 doesn't care about page faults and we should
6509 * set all of these to L1's desires. However, if !enable_ept, L0 does
6510 * care about (at least some) page faults, and because it is not easy
6511 * (if at all possible?) to merge L0 and L1's desires, we simply ask
6512 * to exit on each and every L2 page fault. This is done by setting
6513 * MASK=MATCH=0 and (see below) EB.PF=1.
6514 * Note that below we don't need special code to set EB.PF beyond the
6515 * "or"ing of the EB of vmcs01 and vmcs12, because when enable_ept,
6516 * vmcs01's EB.PF is 0 so the "or" will take vmcs12's value, and when
6517 * !enable_ept, EB.PF is 1, so the "or" will always be 1.
6518 *
6519 * A problem with this approach (when !enable_ept) is that L1 may be
6520 * injected with more page faults than it asked for. This could have
6521 * caused problems, but in practice existing hypervisors don't care.
6522 * To fix this, we will need to emulate the PFEC checking (on the L1
6523 * page tables), using walk_addr(), when injecting PFs to L1.
6524 */
6525 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK,
6526 enable_ept ? vmcs12->page_fault_error_code_mask : 0);
6527 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH,
6528 enable_ept ? vmcs12->page_fault_error_code_match : 0);
6529
6530 if (cpu_has_secondary_exec_ctrls()) {
6531 u32 exec_control = vmx_secondary_exec_control(vmx);
6532 if (!vmx->rdtscp_enabled)
6533 exec_control &= ~SECONDARY_EXEC_RDTSCP;
6534 /* Take the following fields only from vmcs12 */
6535 exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
6536 if (nested_cpu_has(vmcs12,
6537 CPU_BASED_ACTIVATE_SECONDARY_CONTROLS))
6538 exec_control |= vmcs12->secondary_vm_exec_control;
6539
6540 if (exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) {
6541 /*
6542 * Translate L1 physical address to host physical
6543 * address for vmcs02. Keep the page pinned, so this
6544 * physical address remains valid. We keep a reference
6545 * to it so we can release it later.
6546 */
6547 if (vmx->nested.apic_access_page) /* shouldn't happen */
6548 nested_release_page(vmx->nested.apic_access_page);
6549 vmx->nested.apic_access_page =
6550 nested_get_page(vcpu, vmcs12->apic_access_addr);
6551 /*
6552 * If translation failed, no matter: This feature asks
6553 * to exit when accessing the given address, and if it
6554 * can never be accessed, this feature won't do
6555 * anything anyway.
6556 */
6557 if (!vmx->nested.apic_access_page)
6558 exec_control &=
6559 ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
6560 else
6561 vmcs_write64(APIC_ACCESS_ADDR,
6562 page_to_phys(vmx->nested.apic_access_page));
6563 }
6564
6565 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
6566 }
6567
6568
6569 /*
6570 * Set host-state according to L0's settings (vmcs12 is irrelevant here)
6571 * Some constant fields are set here by vmx_set_constant_host_state().
6572 * Other fields are different per CPU, and will be set later when
6573 * vmx_vcpu_load() is called, and when vmx_save_host_state() is called.
6574 */
6575 vmx_set_constant_host_state();
6576
6577 /*
6578 * HOST_RSP is normally set correctly in vmx_vcpu_run() just before
6579 * entry, but only if the current (host) sp changed from the value
6580 * we wrote last (vmx->host_rsp). This cache is no longer relevant
6581 * if we switch vmcs, and rather than hold a separate cache per vmcs,
6582 * here we just force the write to happen on entry.
6583 */
6584 vmx->host_rsp = 0;
6585
6586 exec_control = vmx_exec_control(vmx); /* L0's desires */
6587 exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
6588 exec_control &= ~CPU_BASED_VIRTUAL_NMI_PENDING;
6589 exec_control &= ~CPU_BASED_TPR_SHADOW;
6590 exec_control |= vmcs12->cpu_based_vm_exec_control;
6591 /*
6592 * Merging of IO and MSR bitmaps not currently supported.
6593 * Rather, exit every time.
6594 */
6595 exec_control &= ~CPU_BASED_USE_MSR_BITMAPS;
6596 exec_control &= ~CPU_BASED_USE_IO_BITMAPS;
6597 exec_control |= CPU_BASED_UNCOND_IO_EXITING;
6598
6599 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, exec_control);
6600
6601 /* EXCEPTION_BITMAP and CR0_GUEST_HOST_MASK should basically be the
6602 * bitwise-or of what L1 wants to trap for L2, and what we want to
6603 * trap. Note that CR0.TS also needs updating - we do this later.
6604 */
6605 update_exception_bitmap(vcpu);
6606 vcpu->arch.cr0_guest_owned_bits &= ~vmcs12->cr0_guest_host_mask;
6607 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
6608
6609 /* Note: IA32_MODE, LOAD_IA32_EFER are modified by vmx_set_efer below */
6610 vmcs_write32(VM_EXIT_CONTROLS,
6611 vmcs12->vm_exit_controls | vmcs_config.vmexit_ctrl);
6612 vmcs_write32(VM_ENTRY_CONTROLS, vmcs12->vm_entry_controls |
6613 (vmcs_config.vmentry_ctrl & ~VM_ENTRY_IA32E_MODE));
6614
6615 if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PAT)
6616 vmcs_write64(GUEST_IA32_PAT, vmcs12->guest_ia32_pat);
6617 else if (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_PAT)
6618 vmcs_write64(GUEST_IA32_PAT, vmx->vcpu.arch.pat);
6619
6620
6621 set_cr4_guest_host_mask(vmx);
6622
Nadav Har'El27fc51b2011-08-02 15:54:52 +03006623 if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
6624 vmcs_write64(TSC_OFFSET,
6625 vmx->nested.vmcs01_tsc_offset + vmcs12->tsc_offset);
6626 else
6627 vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
Nadav Har'Elfe3ef052011-05-25 23:10:02 +03006628
6629 if (enable_vpid) {
6630 /*
6631 * Trivially support vpid by letting L2s share their parent
6632 * L1's vpid. TODO: move to a more elaborate solution, giving
6633 * each L2 its own vpid and exposing the vpid feature to L1.
6634 */
6635 vmcs_write16(VIRTUAL_PROCESSOR_ID, vmx->vpid);
6636 vmx_flush_tlb(vcpu);
6637 }
6638
6639 if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_EFER)
6640 vcpu->arch.efer = vmcs12->guest_ia32_efer;
6641 if (vmcs12->vm_entry_controls & VM_ENTRY_IA32E_MODE)
6642 vcpu->arch.efer |= (EFER_LMA | EFER_LME);
6643 else
6644 vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
6645 /* Note: modifies VM_ENTRY/EXIT_CONTROLS and GUEST/HOST_IA32_EFER */
6646 vmx_set_efer(vcpu, vcpu->arch.efer);
6647
6648 /*
6649 * This sets GUEST_CR0 to vmcs12->guest_cr0, with possibly a modified
6650 * TS bit (for lazy fpu) and bits which we consider mandatory enabled.
6651 * The CR0_READ_SHADOW is what L2 should have expected to read given
6652 * the specifications by L1; It's not enough to take
6653 * vmcs12->cr0_read_shadow because on our cr0_guest_host_mask we we
6654 * have more bits than L1 expected.
6655 */
6656 vmx_set_cr0(vcpu, vmcs12->guest_cr0);
6657 vmcs_writel(CR0_READ_SHADOW, nested_read_cr0(vmcs12));
6658
6659 vmx_set_cr4(vcpu, vmcs12->guest_cr4);
6660 vmcs_writel(CR4_READ_SHADOW, nested_read_cr4(vmcs12));
6661
6662 /* shadow page tables on either EPT or shadow page tables */
6663 kvm_set_cr3(vcpu, vmcs12->guest_cr3);
6664 kvm_mmu_reset_context(vcpu);
6665
6666 kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->guest_rsp);
6667 kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->guest_rip);
6668}
6669
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03006670/*
6671 * nested_vmx_run() handles a nested entry, i.e., a VMLAUNCH or VMRESUME on L1
6672 * for running an L2 nested guest.
6673 */
6674static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
6675{
6676 struct vmcs12 *vmcs12;
6677 struct vcpu_vmx *vmx = to_vmx(vcpu);
6678 int cpu;
6679 struct loaded_vmcs *vmcs02;
6680
6681 if (!nested_vmx_check_permission(vcpu) ||
6682 !nested_vmx_check_vmcs12(vcpu))
6683 return 1;
6684
6685 skip_emulated_instruction(vcpu);
6686 vmcs12 = get_vmcs12(vcpu);
6687
Nadav Har'El7c177932011-05-25 23:12:04 +03006688 /*
6689 * The nested entry process starts with enforcing various prerequisites
6690 * on vmcs12 as required by the Intel SDM, and act appropriately when
6691 * they fail: As the SDM explains, some conditions should cause the
6692 * instruction to fail, while others will cause the instruction to seem
6693 * to succeed, but return an EXIT_REASON_INVALID_STATE.
6694 * To speed up the normal (success) code path, we should avoid checking
6695 * for misconfigurations which will anyway be caught by the processor
6696 * when using the merged vmcs02.
6697 */
6698 if (vmcs12->launch_state == launch) {
6699 nested_vmx_failValid(vcpu,
6700 launch ? VMXERR_VMLAUNCH_NONCLEAR_VMCS
6701 : VMXERR_VMRESUME_NONLAUNCHED_VMCS);
6702 return 1;
6703 }
6704
6705 if ((vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_MSR_BITMAPS) &&
6706 !IS_ALIGNED(vmcs12->msr_bitmap, PAGE_SIZE)) {
6707 /*TODO: Also verify bits beyond physical address width are 0*/
6708 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6709 return 1;
6710 }
6711
6712 if (nested_cpu_has2(vmcs12, SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) &&
6713 !IS_ALIGNED(vmcs12->apic_access_addr, PAGE_SIZE)) {
6714 /*TODO: Also verify bits beyond physical address width are 0*/
6715 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6716 return 1;
6717 }
6718
6719 if (vmcs12->vm_entry_msr_load_count > 0 ||
6720 vmcs12->vm_exit_msr_load_count > 0 ||
6721 vmcs12->vm_exit_msr_store_count > 0) {
Jan Kiszkabd801582011-09-12 11:26:22 +02006722 pr_warn_ratelimited("%s: VMCS MSR_{LOAD,STORE} unsupported\n",
6723 __func__);
Nadav Har'El7c177932011-05-25 23:12:04 +03006724 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6725 return 1;
6726 }
6727
6728 if (!vmx_control_verify(vmcs12->cpu_based_vm_exec_control,
6729 nested_vmx_procbased_ctls_low, nested_vmx_procbased_ctls_high) ||
6730 !vmx_control_verify(vmcs12->secondary_vm_exec_control,
6731 nested_vmx_secondary_ctls_low, nested_vmx_secondary_ctls_high) ||
6732 !vmx_control_verify(vmcs12->pin_based_vm_exec_control,
6733 nested_vmx_pinbased_ctls_low, nested_vmx_pinbased_ctls_high) ||
6734 !vmx_control_verify(vmcs12->vm_exit_controls,
6735 nested_vmx_exit_ctls_low, nested_vmx_exit_ctls_high) ||
6736 !vmx_control_verify(vmcs12->vm_entry_controls,
6737 nested_vmx_entry_ctls_low, nested_vmx_entry_ctls_high))
6738 {
6739 nested_vmx_failValid(vcpu, VMXERR_ENTRY_INVALID_CONTROL_FIELD);
6740 return 1;
6741 }
6742
6743 if (((vmcs12->host_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
6744 ((vmcs12->host_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
6745 nested_vmx_failValid(vcpu,
6746 VMXERR_ENTRY_INVALID_HOST_STATE_FIELD);
6747 return 1;
6748 }
6749
6750 if (((vmcs12->guest_cr0 & VMXON_CR0_ALWAYSON) != VMXON_CR0_ALWAYSON) ||
6751 ((vmcs12->guest_cr4 & VMXON_CR4_ALWAYSON) != VMXON_CR4_ALWAYSON)) {
6752 nested_vmx_entry_failure(vcpu, vmcs12,
6753 EXIT_REASON_INVALID_STATE, ENTRY_FAIL_DEFAULT);
6754 return 1;
6755 }
6756 if (vmcs12->vmcs_link_pointer != -1ull) {
6757 nested_vmx_entry_failure(vcpu, vmcs12,
6758 EXIT_REASON_INVALID_STATE, ENTRY_FAIL_VMCS_LINK_PTR);
6759 return 1;
6760 }
6761
6762 /*
6763 * We're finally done with prerequisite checking, and can start with
6764 * the nested entry.
6765 */
6766
Nadav Har'Elcd232ad2011-05-25 23:10:33 +03006767 vmcs02 = nested_get_current_vmcs02(vmx);
6768 if (!vmcs02)
6769 return -ENOMEM;
6770
6771 enter_guest_mode(vcpu);
6772
6773 vmx->nested.vmcs01_tsc_offset = vmcs_read64(TSC_OFFSET);
6774
6775 cpu = get_cpu();
6776 vmx->loaded_vmcs = vmcs02;
6777 vmx_vcpu_put(vcpu);
6778 vmx_vcpu_load(vcpu, cpu);
6779 vcpu->cpu = cpu;
6780 put_cpu();
6781
6782 vmcs12->launch_state = 1;
6783
6784 prepare_vmcs02(vcpu, vmcs12);
6785
6786 /*
6787 * Note no nested_vmx_succeed or nested_vmx_fail here. At this point
6788 * we are no longer running L1, and VMLAUNCH/VMRESUME has not yet
6789 * returned as far as L1 is concerned. It will only return (and set
6790 * the success flag) when L2 exits (see nested_vmx_vmexit()).
6791 */
6792 return 1;
6793}
6794
Nadav Har'El4704d0b2011-05-25 23:11:34 +03006795/*
6796 * On a nested exit from L2 to L1, vmcs12.guest_cr0 might not be up-to-date
6797 * because L2 may have changed some cr0 bits directly (CRO_GUEST_HOST_MASK).
6798 * This function returns the new value we should put in vmcs12.guest_cr0.
6799 * It's not enough to just return the vmcs02 GUEST_CR0. Rather,
6800 * 1. Bits that neither L0 nor L1 trapped, were set directly by L2 and are now
6801 * available in vmcs02 GUEST_CR0. (Note: It's enough to check that L0
6802 * didn't trap the bit, because if L1 did, so would L0).
6803 * 2. Bits that L1 asked to trap (and therefore L0 also did) could not have
6804 * been modified by L2, and L1 knows it. So just leave the old value of
6805 * the bit from vmcs12.guest_cr0. Note that the bit from vmcs02 GUEST_CR0
6806 * isn't relevant, because if L0 traps this bit it can set it to anything.
6807 * 3. Bits that L1 didn't trap, but L0 did. L1 believes the guest could have
6808 * changed these bits, and therefore they need to be updated, but L0
6809 * didn't necessarily allow them to be changed in GUEST_CR0 - and rather
6810 * put them in vmcs02 CR0_READ_SHADOW. So take these bits from there.
6811 */
6812static inline unsigned long
6813vmcs12_guest_cr0(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6814{
6815 return
6816 /*1*/ (vmcs_readl(GUEST_CR0) & vcpu->arch.cr0_guest_owned_bits) |
6817 /*2*/ (vmcs12->guest_cr0 & vmcs12->cr0_guest_host_mask) |
6818 /*3*/ (vmcs_readl(CR0_READ_SHADOW) & ~(vmcs12->cr0_guest_host_mask |
6819 vcpu->arch.cr0_guest_owned_bits));
6820}
6821
6822static inline unsigned long
6823vmcs12_guest_cr4(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6824{
6825 return
6826 /*1*/ (vmcs_readl(GUEST_CR4) & vcpu->arch.cr4_guest_owned_bits) |
6827 /*2*/ (vmcs12->guest_cr4 & vmcs12->cr4_guest_host_mask) |
6828 /*3*/ (vmcs_readl(CR4_READ_SHADOW) & ~(vmcs12->cr4_guest_host_mask |
6829 vcpu->arch.cr4_guest_owned_bits));
6830}
6831
6832/*
6833 * prepare_vmcs12 is part of what we need to do when the nested L2 guest exits
6834 * and we want to prepare to run its L1 parent. L1 keeps a vmcs for L2 (vmcs12),
6835 * and this function updates it to reflect the changes to the guest state while
6836 * L2 was running (and perhaps made some exits which were handled directly by L0
6837 * without going back to L1), and to reflect the exit reason.
6838 * Note that we do not have to copy here all VMCS fields, just those that
6839 * could have changed by the L2 guest or the exit - i.e., the guest-state and
6840 * exit-information fields only. Other fields are modified by L1 with VMWRITE,
6841 * which already writes to vmcs12 directly.
6842 */
6843void prepare_vmcs12(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6844{
6845 /* update guest state fields: */
6846 vmcs12->guest_cr0 = vmcs12_guest_cr0(vcpu, vmcs12);
6847 vmcs12->guest_cr4 = vmcs12_guest_cr4(vcpu, vmcs12);
6848
6849 kvm_get_dr(vcpu, 7, (unsigned long *)&vmcs12->guest_dr7);
6850 vmcs12->guest_rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6851 vmcs12->guest_rip = kvm_register_read(vcpu, VCPU_REGS_RIP);
6852 vmcs12->guest_rflags = vmcs_readl(GUEST_RFLAGS);
6853
6854 vmcs12->guest_es_selector = vmcs_read16(GUEST_ES_SELECTOR);
6855 vmcs12->guest_cs_selector = vmcs_read16(GUEST_CS_SELECTOR);
6856 vmcs12->guest_ss_selector = vmcs_read16(GUEST_SS_SELECTOR);
6857 vmcs12->guest_ds_selector = vmcs_read16(GUEST_DS_SELECTOR);
6858 vmcs12->guest_fs_selector = vmcs_read16(GUEST_FS_SELECTOR);
6859 vmcs12->guest_gs_selector = vmcs_read16(GUEST_GS_SELECTOR);
6860 vmcs12->guest_ldtr_selector = vmcs_read16(GUEST_LDTR_SELECTOR);
6861 vmcs12->guest_tr_selector = vmcs_read16(GUEST_TR_SELECTOR);
6862 vmcs12->guest_es_limit = vmcs_read32(GUEST_ES_LIMIT);
6863 vmcs12->guest_cs_limit = vmcs_read32(GUEST_CS_LIMIT);
6864 vmcs12->guest_ss_limit = vmcs_read32(GUEST_SS_LIMIT);
6865 vmcs12->guest_ds_limit = vmcs_read32(GUEST_DS_LIMIT);
6866 vmcs12->guest_fs_limit = vmcs_read32(GUEST_FS_LIMIT);
6867 vmcs12->guest_gs_limit = vmcs_read32(GUEST_GS_LIMIT);
6868 vmcs12->guest_ldtr_limit = vmcs_read32(GUEST_LDTR_LIMIT);
6869 vmcs12->guest_tr_limit = vmcs_read32(GUEST_TR_LIMIT);
6870 vmcs12->guest_gdtr_limit = vmcs_read32(GUEST_GDTR_LIMIT);
6871 vmcs12->guest_idtr_limit = vmcs_read32(GUEST_IDTR_LIMIT);
6872 vmcs12->guest_es_ar_bytes = vmcs_read32(GUEST_ES_AR_BYTES);
6873 vmcs12->guest_cs_ar_bytes = vmcs_read32(GUEST_CS_AR_BYTES);
6874 vmcs12->guest_ss_ar_bytes = vmcs_read32(GUEST_SS_AR_BYTES);
6875 vmcs12->guest_ds_ar_bytes = vmcs_read32(GUEST_DS_AR_BYTES);
6876 vmcs12->guest_fs_ar_bytes = vmcs_read32(GUEST_FS_AR_BYTES);
6877 vmcs12->guest_gs_ar_bytes = vmcs_read32(GUEST_GS_AR_BYTES);
6878 vmcs12->guest_ldtr_ar_bytes = vmcs_read32(GUEST_LDTR_AR_BYTES);
6879 vmcs12->guest_tr_ar_bytes = vmcs_read32(GUEST_TR_AR_BYTES);
6880 vmcs12->guest_es_base = vmcs_readl(GUEST_ES_BASE);
6881 vmcs12->guest_cs_base = vmcs_readl(GUEST_CS_BASE);
6882 vmcs12->guest_ss_base = vmcs_readl(GUEST_SS_BASE);
6883 vmcs12->guest_ds_base = vmcs_readl(GUEST_DS_BASE);
6884 vmcs12->guest_fs_base = vmcs_readl(GUEST_FS_BASE);
6885 vmcs12->guest_gs_base = vmcs_readl(GUEST_GS_BASE);
6886 vmcs12->guest_ldtr_base = vmcs_readl(GUEST_LDTR_BASE);
6887 vmcs12->guest_tr_base = vmcs_readl(GUEST_TR_BASE);
6888 vmcs12->guest_gdtr_base = vmcs_readl(GUEST_GDTR_BASE);
6889 vmcs12->guest_idtr_base = vmcs_readl(GUEST_IDTR_BASE);
6890
6891 vmcs12->guest_activity_state = vmcs_read32(GUEST_ACTIVITY_STATE);
6892 vmcs12->guest_interruptibility_info =
6893 vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
6894 vmcs12->guest_pending_dbg_exceptions =
6895 vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS);
6896
6897 /* TODO: These cannot have changed unless we have MSR bitmaps and
6898 * the relevant bit asks not to trap the change */
6899 vmcs12->guest_ia32_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL);
6900 if (vmcs12->vm_entry_controls & VM_EXIT_SAVE_IA32_PAT)
6901 vmcs12->guest_ia32_pat = vmcs_read64(GUEST_IA32_PAT);
6902 vmcs12->guest_sysenter_cs = vmcs_read32(GUEST_SYSENTER_CS);
6903 vmcs12->guest_sysenter_esp = vmcs_readl(GUEST_SYSENTER_ESP);
6904 vmcs12->guest_sysenter_eip = vmcs_readl(GUEST_SYSENTER_EIP);
6905
6906 /* update exit information fields: */
6907
6908 vmcs12->vm_exit_reason = vmcs_read32(VM_EXIT_REASON);
6909 vmcs12->exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
6910
6911 vmcs12->vm_exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
6912 vmcs12->vm_exit_intr_error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
6913 vmcs12->idt_vectoring_info_field =
6914 vmcs_read32(IDT_VECTORING_INFO_FIELD);
6915 vmcs12->idt_vectoring_error_code =
6916 vmcs_read32(IDT_VECTORING_ERROR_CODE);
6917 vmcs12->vm_exit_instruction_len = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
6918 vmcs12->vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
6919
6920 /* clear vm-entry fields which are to be cleared on exit */
6921 if (!(vmcs12->vm_exit_reason & VMX_EXIT_REASONS_FAILED_VMENTRY))
6922 vmcs12->vm_entry_intr_info_field &= ~INTR_INFO_VALID_MASK;
6923}
6924
6925/*
6926 * A part of what we need to when the nested L2 guest exits and we want to
6927 * run its L1 parent, is to reset L1's guest state to the host state specified
6928 * in vmcs12.
6929 * This function is to be called not only on normal nested exit, but also on
6930 * a nested entry failure, as explained in Intel's spec, 3B.23.7 ("VM-Entry
6931 * Failures During or After Loading Guest State").
6932 * This function should be called when the active VMCS is L1's (vmcs01).
6933 */
6934void load_vmcs12_host_state(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
6935{
6936 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_EFER)
6937 vcpu->arch.efer = vmcs12->host_ia32_efer;
6938 if (vmcs12->vm_exit_controls & VM_EXIT_HOST_ADDR_SPACE_SIZE)
6939 vcpu->arch.efer |= (EFER_LMA | EFER_LME);
6940 else
6941 vcpu->arch.efer &= ~(EFER_LMA | EFER_LME);
6942 vmx_set_efer(vcpu, vcpu->arch.efer);
6943
6944 kvm_register_write(vcpu, VCPU_REGS_RSP, vmcs12->host_rsp);
6945 kvm_register_write(vcpu, VCPU_REGS_RIP, vmcs12->host_rip);
6946 /*
6947 * Note that calling vmx_set_cr0 is important, even if cr0 hasn't
6948 * actually changed, because it depends on the current state of
6949 * fpu_active (which may have changed).
6950 * Note that vmx_set_cr0 refers to efer set above.
6951 */
6952 kvm_set_cr0(vcpu, vmcs12->host_cr0);
6953 /*
6954 * If we did fpu_activate()/fpu_deactivate() during L2's run, we need
6955 * to apply the same changes to L1's vmcs. We just set cr0 correctly,
6956 * but we also need to update cr0_guest_host_mask and exception_bitmap.
6957 */
6958 update_exception_bitmap(vcpu);
6959 vcpu->arch.cr0_guest_owned_bits = (vcpu->fpu_active ? X86_CR0_TS : 0);
6960 vmcs_writel(CR0_GUEST_HOST_MASK, ~vcpu->arch.cr0_guest_owned_bits);
6961
6962 /*
6963 * Note that CR4_GUEST_HOST_MASK is already set in the original vmcs01
6964 * (KVM doesn't change it)- no reason to call set_cr4_guest_host_mask();
6965 */
6966 vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK);
6967 kvm_set_cr4(vcpu, vmcs12->host_cr4);
6968
6969 /* shadow page tables on either EPT or shadow page tables */
6970 kvm_set_cr3(vcpu, vmcs12->host_cr3);
6971 kvm_mmu_reset_context(vcpu);
6972
6973 if (enable_vpid) {
6974 /*
6975 * Trivially support vpid by letting L2s share their parent
6976 * L1's vpid. TODO: move to a more elaborate solution, giving
6977 * each L2 its own vpid and exposing the vpid feature to L1.
6978 */
6979 vmx_flush_tlb(vcpu);
6980 }
6981
6982
6983 vmcs_write32(GUEST_SYSENTER_CS, vmcs12->host_ia32_sysenter_cs);
6984 vmcs_writel(GUEST_SYSENTER_ESP, vmcs12->host_ia32_sysenter_esp);
6985 vmcs_writel(GUEST_SYSENTER_EIP, vmcs12->host_ia32_sysenter_eip);
6986 vmcs_writel(GUEST_IDTR_BASE, vmcs12->host_idtr_base);
6987 vmcs_writel(GUEST_GDTR_BASE, vmcs12->host_gdtr_base);
6988 vmcs_writel(GUEST_TR_BASE, vmcs12->host_tr_base);
6989 vmcs_writel(GUEST_GS_BASE, vmcs12->host_gs_base);
6990 vmcs_writel(GUEST_FS_BASE, vmcs12->host_fs_base);
6991 vmcs_write16(GUEST_ES_SELECTOR, vmcs12->host_es_selector);
6992 vmcs_write16(GUEST_CS_SELECTOR, vmcs12->host_cs_selector);
6993 vmcs_write16(GUEST_SS_SELECTOR, vmcs12->host_ss_selector);
6994 vmcs_write16(GUEST_DS_SELECTOR, vmcs12->host_ds_selector);
6995 vmcs_write16(GUEST_FS_SELECTOR, vmcs12->host_fs_selector);
6996 vmcs_write16(GUEST_GS_SELECTOR, vmcs12->host_gs_selector);
6997 vmcs_write16(GUEST_TR_SELECTOR, vmcs12->host_tr_selector);
6998
6999 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PAT)
7000 vmcs_write64(GUEST_IA32_PAT, vmcs12->host_ia32_pat);
7001 if (vmcs12->vm_exit_controls & VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
7002 vmcs_write64(GUEST_IA32_PERF_GLOBAL_CTRL,
7003 vmcs12->host_ia32_perf_global_ctrl);
7004}
7005
7006/*
7007 * Emulate an exit from nested guest (L2) to L1, i.e., prepare to run L1
7008 * and modify vmcs12 to make it see what it would expect to see there if
7009 * L2 was its real guest. Must only be called when in L2 (is_guest_mode())
7010 */
7011static void nested_vmx_vmexit(struct kvm_vcpu *vcpu)
7012{
7013 struct vcpu_vmx *vmx = to_vmx(vcpu);
7014 int cpu;
7015 struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
7016
7017 leave_guest_mode(vcpu);
7018 prepare_vmcs12(vcpu, vmcs12);
7019
7020 cpu = get_cpu();
7021 vmx->loaded_vmcs = &vmx->vmcs01;
7022 vmx_vcpu_put(vcpu);
7023 vmx_vcpu_load(vcpu, cpu);
7024 vcpu->cpu = cpu;
7025 put_cpu();
7026
7027 /* if no vmcs02 cache requested, remove the one we used */
7028 if (VMCS02_POOL_SIZE == 0)
7029 nested_free_vmcs02(vmx, vmx->nested.current_vmptr);
7030
7031 load_vmcs12_host_state(vcpu, vmcs12);
7032
Nadav Har'El27fc51b2011-08-02 15:54:52 +03007033 /* Update TSC_OFFSET if TSC was changed while L2 ran */
Nadav Har'El4704d0b2011-05-25 23:11:34 +03007034 vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
7035
7036 /* This is needed for same reason as it was needed in prepare_vmcs02 */
7037 vmx->host_rsp = 0;
7038
7039 /* Unpin physical memory we referred to in vmcs02 */
7040 if (vmx->nested.apic_access_page) {
7041 nested_release_page(vmx->nested.apic_access_page);
7042 vmx->nested.apic_access_page = 0;
7043 }
7044
7045 /*
7046 * Exiting from L2 to L1, we're now back to L1 which thinks it just
7047 * finished a VMLAUNCH or VMRESUME instruction, so we need to set the
7048 * success or failure flag accordingly.
7049 */
7050 if (unlikely(vmx->fail)) {
7051 vmx->fail = 0;
7052 nested_vmx_failValid(vcpu, vmcs_read32(VM_INSTRUCTION_ERROR));
7053 } else
7054 nested_vmx_succeed(vcpu);
7055}
7056
Nadav Har'El7c177932011-05-25 23:12:04 +03007057/*
7058 * L1's failure to enter L2 is a subset of a normal exit, as explained in
7059 * 23.7 "VM-entry failures during or after loading guest state" (this also
7060 * lists the acceptable exit-reason and exit-qualification parameters).
7061 * It should only be called before L2 actually succeeded to run, and when
7062 * vmcs01 is current (it doesn't leave_guest_mode() or switch vmcss).
7063 */
7064static void nested_vmx_entry_failure(struct kvm_vcpu *vcpu,
7065 struct vmcs12 *vmcs12,
7066 u32 reason, unsigned long qualification)
7067{
7068 load_vmcs12_host_state(vcpu, vmcs12);
7069 vmcs12->vm_exit_reason = reason | VMX_EXIT_REASONS_FAILED_VMENTRY;
7070 vmcs12->exit_qualification = qualification;
7071 nested_vmx_succeed(vcpu);
7072}
7073
Joerg Roedel8a76d7f2011-04-04 12:39:27 +02007074static int vmx_check_intercept(struct kvm_vcpu *vcpu,
7075 struct x86_instruction_info *info,
7076 enum x86_intercept_stage stage)
7077{
7078 return X86EMUL_CONTINUE;
7079}
7080
Christian Ehrhardtcbdd1be2007-09-09 15:41:59 +03007081static struct kvm_x86_ops vmx_x86_ops = {
Avi Kivity6aa8b732006-12-10 02:21:36 -08007082 .cpu_has_kvm_support = cpu_has_kvm_support,
7083 .disabled_by_bios = vmx_disabled_by_bios,
7084 .hardware_setup = hardware_setup,
7085 .hardware_unsetup = hardware_unsetup,
Yang, Sheng002c7f72007-07-31 14:23:01 +03007086 .check_processor_compatibility = vmx_check_processor_compat,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007087 .hardware_enable = hardware_enable,
7088 .hardware_disable = hardware_disable,
Sheng Yang04547152009-04-01 15:52:31 +08007089 .cpu_has_accelerated_tpr = report_flexpriority,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007090
7091 .vcpu_create = vmx_create_vcpu,
7092 .vcpu_free = vmx_free_vcpu,
Avi Kivity04d2cc72007-09-10 18:10:54 +03007093 .vcpu_reset = vmx_vcpu_reset,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007094
Avi Kivity04d2cc72007-09-10 18:10:54 +03007095 .prepare_guest_switch = vmx_save_host_state,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007096 .vcpu_load = vmx_vcpu_load,
7097 .vcpu_put = vmx_vcpu_put,
7098
7099 .set_guest_debug = set_guest_debug,
7100 .get_msr = vmx_get_msr,
7101 .set_msr = vmx_set_msr,
7102 .get_segment_base = vmx_get_segment_base,
7103 .get_segment = vmx_get_segment,
7104 .set_segment = vmx_set_segment,
Izik Eidus2e4d2652008-03-24 19:38:34 +02007105 .get_cpl = vmx_get_cpl,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007106 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
Avi Kivitye8467fd2009-12-29 18:43:06 +02007107 .decache_cr0_guest_bits = vmx_decache_cr0_guest_bits,
Avi Kivityaff48ba2010-12-05 18:56:11 +02007108 .decache_cr3 = vmx_decache_cr3,
Anthony Liguori25c4c272007-04-27 09:29:21 +03007109 .decache_cr4_guest_bits = vmx_decache_cr4_guest_bits,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007110 .set_cr0 = vmx_set_cr0,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007111 .set_cr3 = vmx_set_cr3,
7112 .set_cr4 = vmx_set_cr4,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007113 .set_efer = vmx_set_efer,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007114 .get_idt = vmx_get_idt,
7115 .set_idt = vmx_set_idt,
7116 .get_gdt = vmx_get_gdt,
7117 .set_gdt = vmx_set_gdt,
Gleb Natapov020df072010-04-13 10:05:23 +03007118 .set_dr7 = vmx_set_dr7,
Marcelo Tosatti5fdbf972008-06-27 14:58:02 -03007119 .cache_reg = vmx_cache_reg,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007120 .get_rflags = vmx_get_rflags,
7121 .set_rflags = vmx_set_rflags,
Avi Kivityebcbab42010-02-07 11:56:52 +02007122 .fpu_activate = vmx_fpu_activate,
Avi Kivity02daab22009-12-30 12:40:26 +02007123 .fpu_deactivate = vmx_fpu_deactivate,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007124
7125 .tlb_flush = vmx_flush_tlb,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007126
Avi Kivity6aa8b732006-12-10 02:21:36 -08007127 .run = vmx_vcpu_run,
Avi Kivity6062d012009-03-23 17:35:17 +02007128 .handle_exit = vmx_handle_exit,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007129 .skip_emulated_instruction = skip_emulated_instruction,
Glauber Costa2809f5d2009-05-12 16:21:05 -04007130 .set_interrupt_shadow = vmx_set_interrupt_shadow,
7131 .get_interrupt_shadow = vmx_get_interrupt_shadow,
Ingo Molnar102d8322007-02-19 14:37:47 +02007132 .patch_hypercall = vmx_patch_hypercall,
Eddie Dong2a8067f2007-08-06 16:29:07 +03007133 .set_irq = vmx_inject_irq,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007134 .set_nmi = vmx_inject_nmi,
Avi Kivity298101d2007-11-25 13:41:11 +02007135 .queue_exception = vmx_queue_exception,
Avi Kivityb463a6f2010-07-20 15:06:17 +03007136 .cancel_injection = vmx_cancel_injection,
Gleb Natapov78646122009-03-23 12:12:11 +02007137 .interrupt_allowed = vmx_interrupt_allowed,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007138 .nmi_allowed = vmx_nmi_allowed,
Jan Kiszka3cfc3092009-11-12 01:04:25 +01007139 .get_nmi_mask = vmx_get_nmi_mask,
7140 .set_nmi_mask = vmx_set_nmi_mask,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007141 .enable_nmi_window = enable_nmi_window,
7142 .enable_irq_window = enable_irq_window,
7143 .update_cr8_intercept = update_cr8_intercept,
Gleb Natapov95ba8273132009-04-21 17:45:08 +03007144
Izik Eiduscbc94022007-10-25 00:29:55 +02007145 .set_tss_addr = vmx_set_tss_addr,
Sheng Yang67253af2008-04-25 10:20:22 +08007146 .get_tdp_level = get_ept_level,
Sheng Yang4b12f0d2009-04-27 20:35:42 +08007147 .get_mt_mask = vmx_get_mt_mask,
Marcelo Tosatti229456f2009-06-17 09:22:14 -03007148
Avi Kivity586f9602010-11-18 13:09:54 +02007149 .get_exit_info = vmx_get_exit_info,
Avi Kivity586f9602010-11-18 13:09:54 +02007150
Sheng Yang17cc3932010-01-05 19:02:27 +08007151 .get_lpage_level = vmx_get_lpage_level,
Sheng Yang0e851882009-12-18 16:48:46 +08007152
7153 .cpuid_update = vmx_cpuid_update,
Sheng Yang4e47c7a2009-12-18 16:48:47 +08007154
7155 .rdtscp_supported = vmx_rdtscp_supported,
Joerg Roedeld4330ef2010-04-22 12:33:11 +02007156
7157 .set_supported_cpuid = vmx_set_supported_cpuid,
Sheng Yangf5f48ee2010-06-30 12:25:15 +08007158
7159 .has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,
Zachary Amsden99e3e302010-08-19 22:07:17 -10007160
Joerg Roedel4051b182011-03-25 09:44:49 +01007161 .set_tsc_khz = vmx_set_tsc_khz,
Zachary Amsden99e3e302010-08-19 22:07:17 -10007162 .write_tsc_offset = vmx_write_tsc_offset,
Zachary Amsdene48672f2010-08-19 22:07:23 -10007163 .adjust_tsc_offset = vmx_adjust_tsc_offset,
Joerg Roedel857e4092011-03-25 09:44:50 +01007164 .compute_tsc_offset = vmx_compute_tsc_offset,
Nadav Har'Eld5c17852011-08-02 15:54:20 +03007165 .read_l1_tsc = vmx_read_l1_tsc,
Joerg Roedel1c97f0a2010-09-10 17:30:41 +02007166
7167 .set_tdp_cr3 = vmx_set_cr3,
Joerg Roedel8a76d7f2011-04-04 12:39:27 +02007168
7169 .check_intercept = vmx_check_intercept,
Avi Kivity6aa8b732006-12-10 02:21:36 -08007170};
7171
7172static int __init vmx_init(void)
7173{
Avi Kivity26bb0982009-09-07 11:14:12 +03007174 int r, i;
7175
7176 rdmsrl_safe(MSR_EFER, &host_efer);
7177
7178 for (i = 0; i < NR_VMX_MSR; ++i)
7179 kvm_define_shared_msr(i, vmx_msr_index[i]);
He, Qingfdef3ad2007-04-30 09:45:24 +03007180
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007181 vmx_io_bitmap_a = (unsigned long *)__get_free_page(GFP_KERNEL);
He, Qingfdef3ad2007-04-30 09:45:24 +03007182 if (!vmx_io_bitmap_a)
7183 return -ENOMEM;
7184
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007185 vmx_io_bitmap_b = (unsigned long *)__get_free_page(GFP_KERNEL);
He, Qingfdef3ad2007-04-30 09:45:24 +03007186 if (!vmx_io_bitmap_b) {
7187 r = -ENOMEM;
7188 goto out;
7189 }
7190
Avi Kivity58972972009-02-24 22:26:47 +02007191 vmx_msr_bitmap_legacy = (unsigned long *)__get_free_page(GFP_KERNEL);
7192 if (!vmx_msr_bitmap_legacy) {
Sheng Yang25c5f222008-03-28 13:18:56 +08007193 r = -ENOMEM;
7194 goto out1;
7195 }
7196
Avi Kivity58972972009-02-24 22:26:47 +02007197 vmx_msr_bitmap_longmode = (unsigned long *)__get_free_page(GFP_KERNEL);
7198 if (!vmx_msr_bitmap_longmode) {
7199 r = -ENOMEM;
7200 goto out2;
7201 }
7202
He, Qingfdef3ad2007-04-30 09:45:24 +03007203 /*
7204 * Allow direct access to the PC debug port (it is often used for I/O
7205 * delays, but the vmexits simply slow things down).
7206 */
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007207 memset(vmx_io_bitmap_a, 0xff, PAGE_SIZE);
7208 clear_bit(0x80, vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007209
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007210 memset(vmx_io_bitmap_b, 0xff, PAGE_SIZE);
He, Qingfdef3ad2007-04-30 09:45:24 +03007211
Avi Kivity58972972009-02-24 22:26:47 +02007212 memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE);
7213 memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE);
Sheng Yang25c5f222008-03-28 13:18:56 +08007214
Sheng Yang2384d2b2008-01-17 15:14:33 +08007215 set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
7216
Avi Kivity0ee75be2010-04-28 15:39:01 +03007217 r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx),
7218 __alignof__(struct vcpu_vmx), THIS_MODULE);
He, Qingfdef3ad2007-04-30 09:45:24 +03007219 if (r)
Avi Kivity58972972009-02-24 22:26:47 +02007220 goto out3;
Sheng Yang25c5f222008-03-28 13:18:56 +08007221
Avi Kivity58972972009-02-24 22:26:47 +02007222 vmx_disable_intercept_for_msr(MSR_FS_BASE, false);
7223 vmx_disable_intercept_for_msr(MSR_GS_BASE, false);
7224 vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true);
7225 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
7226 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
7227 vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
He, Qingfdef3ad2007-04-30 09:45:24 +03007228
Avi Kivity089d0342009-03-23 18:26:32 +02007229 if (enable_ept) {
Sheng Yang534e38b2008-09-08 15:12:30 +08007230 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
Sheng Yang4b12f0d2009-04-27 20:35:42 +08007231 VMX_EPT_EXECUTABLE_MASK);
Xiao Guangrongce88dec2011-07-12 03:33:44 +08007232 ept_set_mmio_spte_mask();
Sheng Yang5fdbcb92008-07-16 09:25:40 +08007233 kvm_enable_tdp();
7234 } else
7235 kvm_disable_tdp();
Sheng Yang14394422008-04-28 12:24:45 +08007236
He, Qingfdef3ad2007-04-30 09:45:24 +03007237 return 0;
7238
Avi Kivity58972972009-02-24 22:26:47 +02007239out3:
7240 free_page((unsigned long)vmx_msr_bitmap_longmode);
Sheng Yang25c5f222008-03-28 13:18:56 +08007241out2:
Avi Kivity58972972009-02-24 22:26:47 +02007242 free_page((unsigned long)vmx_msr_bitmap_legacy);
He, Qingfdef3ad2007-04-30 09:45:24 +03007243out1:
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007244 free_page((unsigned long)vmx_io_bitmap_b);
He, Qingfdef3ad2007-04-30 09:45:24 +03007245out:
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007246 free_page((unsigned long)vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007247 return r;
Avi Kivity6aa8b732006-12-10 02:21:36 -08007248}
7249
7250static void __exit vmx_exit(void)
7251{
Avi Kivity58972972009-02-24 22:26:47 +02007252 free_page((unsigned long)vmx_msr_bitmap_legacy);
7253 free_page((unsigned long)vmx_msr_bitmap_longmode);
Avi Kivity3e7c73e2009-02-24 21:46:19 +02007254 free_page((unsigned long)vmx_io_bitmap_b);
7255 free_page((unsigned long)vmx_io_bitmap_a);
He, Qingfdef3ad2007-04-30 09:45:24 +03007256
Zhang Xiantaocb498ea2007-11-14 20:39:31 +08007257 kvm_exit();
Avi Kivity6aa8b732006-12-10 02:21:36 -08007258}
7259
7260module_init(vmx_init)
7261module_exit(vmx_exit)