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Mark Brownc9fbf7e2010-03-26 16:49:15 +00001/*
2 * wm8994-irq.c -- Interrupt controller support for Wolfson WM8994
3 *
4 * Copyright 2010 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/irq.h>
19#include <linux/mfd/core.h>
20#include <linux/interrupt.h>
Mark Brown8ab30692011-10-25 10:19:04 +020021#include <linux/regmap.h>
Mark Brownc9fbf7e2010-03-26 16:49:15 +000022
23#include <linux/mfd/wm8994/core.h>
24#include <linux/mfd/wm8994/registers.h>
25
26#include <linux/delay.h>
27
Mark Brown8ab30692011-10-25 10:19:04 +020028static struct regmap_irq wm8994_irqs[] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +000029 [WM8994_IRQ_TEMP_SHUT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020030 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000031 .mask = WM8994_TEMP_SHUT_EINT,
32 },
33 [WM8994_IRQ_MIC1_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020034 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000035 .mask = WM8994_MIC1_DET_EINT,
36 },
37 [WM8994_IRQ_MIC1_SHRT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020038 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000039 .mask = WM8994_MIC1_SHRT_EINT,
40 },
41 [WM8994_IRQ_MIC2_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020042 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000043 .mask = WM8994_MIC2_DET_EINT,
44 },
45 [WM8994_IRQ_MIC2_SHRT] = {
Mark Brown8ab30692011-10-25 10:19:04 +020046 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000047 .mask = WM8994_MIC2_SHRT_EINT,
48 },
49 [WM8994_IRQ_FLL1_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020050 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000051 .mask = WM8994_FLL1_LOCK_EINT,
52 },
53 [WM8994_IRQ_FLL2_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020054 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000055 .mask = WM8994_FLL2_LOCK_EINT,
56 },
57 [WM8994_IRQ_SRC1_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020058 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000059 .mask = WM8994_SRC1_LOCK_EINT,
60 },
61 [WM8994_IRQ_SRC2_LOCK] = {
Mark Brown8ab30692011-10-25 10:19:04 +020062 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000063 .mask = WM8994_SRC2_LOCK_EINT,
64 },
65 [WM8994_IRQ_AIF1DRC1_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020066 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000067 .mask = WM8994_AIF1DRC1_SIG_DET,
68 },
69 [WM8994_IRQ_AIF1DRC2_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020070 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000071 .mask = WM8994_AIF1DRC2_SIG_DET_EINT,
72 },
73 [WM8994_IRQ_AIF2DRC_SIG_DET] = {
Mark Brown8ab30692011-10-25 10:19:04 +020074 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000075 .mask = WM8994_AIF2DRC_SIG_DET_EINT,
76 },
77 [WM8994_IRQ_FIFOS_ERR] = {
Mark Brown8ab30692011-10-25 10:19:04 +020078 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000079 .mask = WM8994_FIFOS_ERR_EINT,
80 },
81 [WM8994_IRQ_WSEQ_DONE] = {
Mark Brown8ab30692011-10-25 10:19:04 +020082 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000083 .mask = WM8994_WSEQ_DONE_EINT,
84 },
85 [WM8994_IRQ_DCS_DONE] = {
Mark Brown8ab30692011-10-25 10:19:04 +020086 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000087 .mask = WM8994_DCS_DONE_EINT,
88 },
89 [WM8994_IRQ_TEMP_WARN] = {
Mark Brown8ab30692011-10-25 10:19:04 +020090 .reg_offset = 1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +000091 .mask = WM8994_TEMP_WARN_EINT,
92 },
93 [WM8994_IRQ_GPIO(1)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +000094 .mask = WM8994_GP1_EINT,
95 },
96 [WM8994_IRQ_GPIO(2)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +000097 .mask = WM8994_GP2_EINT,
98 },
99 [WM8994_IRQ_GPIO(3)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000100 .mask = WM8994_GP3_EINT,
101 },
102 [WM8994_IRQ_GPIO(4)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000103 .mask = WM8994_GP4_EINT,
104 },
105 [WM8994_IRQ_GPIO(5)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000106 .mask = WM8994_GP5_EINT,
107 },
108 [WM8994_IRQ_GPIO(6)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000109 .mask = WM8994_GP6_EINT,
110 },
111 [WM8994_IRQ_GPIO(7)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000112 .mask = WM8994_GP7_EINT,
113 },
114 [WM8994_IRQ_GPIO(8)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000115 .mask = WM8994_GP8_EINT,
116 },
117 [WM8994_IRQ_GPIO(9)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000118 .mask = WM8994_GP8_EINT,
119 },
120 [WM8994_IRQ_GPIO(10)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000121 .mask = WM8994_GP10_EINT,
122 },
123 [WM8994_IRQ_GPIO(11)] = {
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000124 .mask = WM8994_GP11_EINT,
125 },
126};
127
Mark Brown8ab30692011-10-25 10:19:04 +0200128static struct regmap_irq_chip wm8994_irq_chip = {
129 .name = "wm8994",
130 .irqs = wm8994_irqs,
131 .num_irqs = ARRAY_SIZE(wm8994_irqs),
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000132
Mark Brown8ab30692011-10-25 10:19:04 +0200133 .num_regs = 2,
134 .status_base = WM8994_INTERRUPT_STATUS_1,
135 .mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
136 .ack_base = WM8994_INTERRUPT_STATUS_1,
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000137};
138
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000139int wm8994_irq_init(struct wm8994 *wm8994)
140{
Mark Brown8ab30692011-10-25 10:19:04 +0200141 int ret;
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000142
143 if (!wm8994->irq) {
144 dev_warn(wm8994->dev,
145 "No interrupt specified, no interrupts\n");
146 wm8994->irq_base = 0;
147 return 0;
148 }
149
150 if (!wm8994->irq_base) {
151 dev_err(wm8994->dev,
152 "No interrupt base specified, no interrupts\n");
153 return 0;
154 }
155
Mark Brown8ab30692011-10-25 10:19:04 +0200156 ret = regmap_add_irq_chip(wm8994->regmap, wm8994->irq,
157 IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
158 wm8994->irq_base, &wm8994_irq_chip,
159 &wm8994->irq_data);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000160 if (ret != 0) {
Mark Brown8ab30692011-10-25 10:19:04 +0200161 dev_err(wm8994->dev, "Failed to register IRQ chip: %d\n", ret);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000162 return ret;
163 }
164
165 /* Enable top level interrupt if it was masked */
166 wm8994_reg_write(wm8994, WM8994_INTERRUPT_CONTROL, 0);
167
168 return 0;
169}
170
171void wm8994_irq_exit(struct wm8994 *wm8994)
172{
Mark Brown8ab30692011-10-25 10:19:04 +0200173 regmap_del_irq_chip(wm8994->irq, wm8994->irq_data);
Mark Brownc9fbf7e2010-03-26 16:49:15 +0000174}