Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-sa1100/clock.c |
| 3 | */ |
| 4 | #include <linux/module.h> |
| 5 | #include <linux/kernel.h> |
| 6 | #include <linux/list.h> |
| 7 | #include <linux/errno.h> |
| 8 | #include <linux/err.h> |
| 9 | #include <linux/string.h> |
| 10 | #include <linux/clk.h> |
| 11 | #include <linux/spinlock.h> |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/delay.h> |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 14 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 15 | #include <asm/clkdev.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 16 | #include <mach/pxa2xx-regs.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 17 | #include <mach/hardware.h> |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 18 | |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 19 | #include "devices.h" |
| 20 | #include "generic.h" |
| 21 | #include "clock.h" |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 22 | |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 23 | static DEFINE_SPINLOCK(clocks_lock); |
| 24 | |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 25 | int clk_enable(struct clk *clk) |
| 26 | { |
| 27 | unsigned long flags; |
| 28 | |
| 29 | spin_lock_irqsave(&clocks_lock, flags); |
| 30 | if (clk->enabled++ == 0) |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 31 | clk->ops->enable(clk); |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 32 | spin_unlock_irqrestore(&clocks_lock, flags); |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 33 | |
| 34 | if (clk->delay) |
| 35 | udelay(clk->delay); |
| 36 | |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 37 | return 0; |
| 38 | } |
| 39 | EXPORT_SYMBOL(clk_enable); |
| 40 | |
| 41 | void clk_disable(struct clk *clk) |
| 42 | { |
| 43 | unsigned long flags; |
| 44 | |
| 45 | WARN_ON(clk->enabled == 0); |
| 46 | |
| 47 | spin_lock_irqsave(&clocks_lock, flags); |
| 48 | if (--clk->enabled == 0) |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 49 | clk->ops->disable(clk); |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 50 | spin_unlock_irqrestore(&clocks_lock, flags); |
| 51 | } |
| 52 | EXPORT_SYMBOL(clk_disable); |
| 53 | |
| 54 | unsigned long clk_get_rate(struct clk *clk) |
| 55 | { |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 56 | unsigned long rate; |
| 57 | |
| 58 | rate = clk->rate; |
| 59 | if (clk->ops->getrate) |
| 60 | rate = clk->ops->getrate(clk); |
| 61 | |
| 62 | return rate; |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 63 | } |
| 64 | EXPORT_SYMBOL(clk_get_rate); |
| 65 | |
| 66 | |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 67 | void clk_cken_enable(struct clk *clk) |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 68 | { |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 69 | CKEN |= 1 << clk->cken; |
| 70 | } |
| 71 | |
| 72 | void clk_cken_disable(struct clk *clk) |
| 73 | { |
| 74 | CKEN &= ~(1 << clk->cken); |
| 75 | } |
| 76 | |
| 77 | const struct clkops clk_cken_ops = { |
| 78 | .enable = clk_cken_enable, |
| 79 | .disable = clk_cken_disable, |
| 80 | }; |
| 81 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 82 | void clks_register(struct clk_lookup *clks, size_t num) |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 83 | { |
| 84 | int i; |
| 85 | |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 86 | for (i = 0; i < num; i++) |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 87 | clkdev_add(&clks[i]); |
Russell King | 97d654f | 2006-03-15 15:54:37 +0000 | [diff] [blame] | 88 | } |