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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2412/s3c2412.c
Ben Dooks68d9ab32006-06-24 21:21:27 +01002 *
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://armlinux.simtec.co.uk/.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
Ben Dooks68d9ab32006-06-24 21:21:27 +010011*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/sysdev.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010020#include <linux/serial_core.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010021#include <linux/platform_device.h>
22
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25#include <asm/mach/irq.h>
26
27#include <asm/hardware.h>
Ben Dooksc84cbb22006-09-14 13:29:15 +010028#include <asm/proc-fns.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010029#include <asm/io.h>
30#include <asm/irq.h>
31
Ben Dooksc84cbb22006-09-14 13:29:15 +010032#include <asm/arch/idle.h>
33
Ben Dooks68d9ab32006-06-24 21:21:27 +010034#include <asm/arch/regs-clock.h>
35#include <asm/arch/regs-serial.h>
Ben Dooksc84cbb22006-09-14 13:29:15 +010036#include <asm/arch/regs-power.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010037#include <asm/arch/regs-gpio.h>
38#include <asm/arch/regs-gpioj.h>
39#include <asm/arch/regs-dsc.h>
Sandeep Sanjay Patile9033822007-05-16 10:51:45 +010040#include <asm/arch/regs-spi.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010041
Ben Dooksa21765a2007-02-11 18:31:01 +010042#include <asm/plat-s3c24xx/s3c2412.h>
43#include <asm/plat-s3c24xx/cpu.h>
44#include <asm/plat-s3c24xx/devs.h>
45#include <asm/plat-s3c24xx/clock.h>
46#include <asm/plat-s3c24xx/pm.h>
Ben Dooks68d9ab32006-06-24 21:21:27 +010047
48#ifndef CONFIG_CPU_S3C2412_ONLY
49void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
Ben Dooks50dedf12006-09-18 10:19:06 +010050
51static inline void s3c2412_init_gpio2(void)
52{
53 s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
54}
55#else
56#define s3c2412_init_gpio2() do { } while(0)
Ben Dooks68d9ab32006-06-24 21:21:27 +010057#endif
58
59/* Initial IO mappings */
60
61static struct map_desc s3c2412_iodesc[] __initdata = {
62 IODESC_ENT(CLKPWR),
63 IODESC_ENT(LCD),
64 IODESC_ENT(TIMER),
Ben Dooks68d9ab32006-06-24 21:21:27 +010065 IODESC_ENT(WATCHDOG),
66};
67
68/* uart registration process */
69
70void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
71{
72 s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
73
74 /* rename devices that are s3c2412/s3c2413 specific */
75 s3c_device_sdi.name = "s3c2412-sdi";
Ben Dooks72d70d02006-09-20 20:46:09 +010076 s3c_device_lcd.name = "s3c2412-lcd";
Ben Dooks68d9ab32006-06-24 21:21:27 +010077 s3c_device_nand.name = "s3c2412-nand";
Sandeep Sanjay Patile9033822007-05-16 10:51:45 +010078
79 /* spi channel related changes, s3c2412/13 specific */
80 s3c_device_spi0.name = "s3c2412-spi";
81 s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24;
82 s3c_device_spi1.name = "s3c2412-spi";
83 s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1;
84 s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24;
85
Ben Dooks68d9ab32006-06-24 21:21:27 +010086}
87
Ben Dooksc84cbb22006-09-14 13:29:15 +010088/* s3c2412_idle
89 *
90 * use the standard idle call by ensuring the idle mode
91 * in power config, then issuing the idle co-processor
92 * instruction
93*/
94
95static void s3c2412_idle(void)
96{
97 unsigned long tmp;
98
99 /* ensure our idle mode is to go to idle */
100
101 tmp = __raw_readl(S3C2412_PWRCFG);
102 tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
103 tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
104 __raw_writel(tmp, S3C2412_PWRCFG);
105
106 cpu_do_idle();
107}
108
Ben Dooks68d9ab32006-06-24 21:21:27 +0100109/* s3c2412_map_io
110 *
111 * register the standard cpu IO areas, and any passed in from the
112 * machine specific initialisation.
113*/
114
115void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
116{
117 /* move base of IO */
118
Ben Dooks50dedf12006-09-18 10:19:06 +0100119 s3c2412_init_gpio2();
Ben Dooks68d9ab32006-06-24 21:21:27 +0100120
Ben Dooksc84cbb22006-09-14 13:29:15 +0100121 /* set our idle function */
122
123 s3c24xx_idle = s3c2412_idle;
124
Ben Dooks68d9ab32006-06-24 21:21:27 +0100125 /* register our io-tables */
126
127 iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
128 iotable_init(mach_desc, mach_size);
129}
130
131void __init s3c2412_init_clocks(int xtal)
132{
133 unsigned long tmp;
134 unsigned long fclk;
135 unsigned long hclk;
136 unsigned long pclk;
137
138 /* now we've got our machine bits initialised, work out what
139 * clocks we've got */
140
141 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
142
143 tmp = __raw_readl(S3C2410_CLKDIVN);
144
145 /* work out clock scalings */
146
147 hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
148 hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
149 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
150
151 /* print brieft summary of clocks, etc */
152
153 printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
154 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
155
156 /* initialise the clocks here, to allow other things like the
157 * console to use them
158 */
159
160 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
161 s3c2412_baseclk_add();
162}
163
164/* need to register class before we actually register the device, and
165 * we also need to ensure that it has been initialised before any of the
166 * drivers even try to use it (even if not on an s3c2412 based system)
167 * as a driver which may support both 2410 and 2440 may try and use it.
168*/
169
Ben Dooks68d9ab32006-06-24 21:21:27 +0100170struct sysdev_class s3c2412_sysclass = {
171 set_kset_name("s3c2412-core"),
Ben Dooks68d9ab32006-06-24 21:21:27 +0100172};
173
174static int __init s3c2412_core_init(void)
175{
176 return sysdev_class_register(&s3c2412_sysclass);
177}
178
179core_initcall(s3c2412_core_init);
180
181static struct sys_device s3c2412_sysdev = {
182 .cls = &s3c2412_sysclass,
183};
184
185int __init s3c2412_init(void)
186{
187 printk("S3C2412: Initialising architecture\n");
188
189 return sysdev_register(&s3c2412_sysdev);
190}