blob: e1f0e61ca24aa95c8c43ae744e2fffcdad92cd31 [file] [log] [blame]
Xiaozhe Shifaa942c2013-02-21 10:52:03 -08001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&spmi_bus {
14 #address-cells = <1>;
15 #size-cells = <0>;
16 interrupt-controller;
17 #interrupt-cells = <3>;
Xiaozhe Shifaa942c2013-02-21 10:52:03 -080018
19 qcom,pm8110@0 {
20 spmi-slave-container;
21 reg = <0x0>;
22 #address-cells = <1>;
23 #size-cells = <1>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -070024
Amy Malochee4aaca22013-04-01 20:34:09 -070025 qcom,power-on@800 {
26 compatible = "qcom,qpnp-power-on";
27 reg = <0x800 0x100>;
28 interrupts = <0x0 0x8 0x0>,
29 <0x0 0x8 0x1>,
30 <0x0 0x8 0x4>;
31 interrupt-names = "kpdpwr", "resin", "resin-bark";
32 qcom,pon-dbc-delay = <15625>;
33 qcom,system-reset;
34
35 qcom,pon_1 {
36 qcom,pon-type = <0>;
37 qcom,pull-up = <1>;
38 linux,code = <116>;
39 };
40
41 qcom,pon_2 {
42 qcom,pon-type = <1>;
43 qcom,pull-up = <1>;
44 linux,code = <114>;
45 };
46 };
47
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070048 pm8110_chg: qcom,charger {
49 spmi-dev-container;
50 compatible = "qcom,qpnp-charger";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 status = "disabled";
54
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070055 qcom,vddmax-mv = <4200>;
56 qcom,vddsafe-mv = <4200>;
57 qcom,vinmin-mv = <4200>;
58 qcom,vbatdet-mv = <4100>;
59 qcom,ibatmax-ma = <1500>;
60 qcom,ibatterm-ma = <200>;
61 qcom,ibatsafe-ma = <1500>;
62 qcom,thermal-mitigation = <1500 700 600 325>;
Xiaozhe Shi8b502bc2013-04-18 15:55:56 -070063 qcom,vbatdet-delta-mv = <350>;
64 qcom,tchg-mins = <150>;
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070065
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070066 qcom,chgr@1000 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070067 status = "disabled";
68 reg = <0x1000 0x100>;
69 interrupts = <0x0 0x10 0x0>,
70 <0x0 0x10 0x1>,
71 <0x0 0x10 0x2>,
72 <0x0 0x10 0x3>,
73 <0x0 0x10 0x4>,
74 <0x0 0x10 0x5>,
75 <0x0 0x10 0x6>,
76 <0x0 0x10 0x7>;
77
78 interrupt-names = "vbat-det-lo",
79 "vbat-det-hi",
80 "chgwdog",
81 "state-change",
82 "trkl-chg-on",
83 "fast-chg-on",
84 "chg-failed",
85 "chg-done";
86 };
87
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -070088 qcom,buck@1100 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -070089 status = "disabled";
90 reg = <0x1100 0x100>;
91 interrupts = <0x0 0x11 0x0>,
92 <0x0 0x11 0x1>,
93 <0x0 0x11 0x2>,
94 <0x0 0x11 0x3>,
95 <0x0 0x11 0x4>,
96 <0x0 0x11 0x5>,
97 <0x0 0x11 0x6>;
98
99 interrupt-names = "vbat-ov",
100 "vreg-ov",
101 "overtemp",
102 "vchg-loop",
103 "ichg-loop",
104 "ibat-loop",
105 "vdd-loop";
106 };
107
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700108 qcom,bat-if@1200 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700109 status = "disabled";
110 reg = <0x1200 0x100>;
111 interrupts = <0x0 0x12 0x0>,
112 <0x0 0x12 0x1>,
113 <0x0 0x12 0x2>,
114 <0x0 0x12 0x3>,
115 <0x0 0x12 0x4>;
116
117 interrupt-names = "batt-pres",
118 "bat-temp-ok",
119 "bat-fet-on",
120 "vcp-on",
121 "psi";
122 };
123
Xiaozhe Shi8bc042a2013-04-18 15:44:08 -0700124 qcom,usb-chgpth@1300 {
Xiaozhe Shif7d9daf2013-04-08 15:29:55 -0700125 status = "disabled";
126 reg = <0x1300 0x100>;
127 interrupts = <0 0x13 0x0>,
128 <0 0x13 0x1>,
129 <0x0 0x13 0x2>;
130
131 interrupt-names = "coarse-det-usb",
132 "usbin-valid",
133 "chg-gone";
134 };
135
136 qcom,chg-misc@1600 {
137 status = "disabled";
138 reg = <0x1600 0x100>;
139 };
140 };
141
Xiaozhe Shi67ba76b2013-04-18 18:20:05 -0700142 pm8110_gpios: gpios {
143 spmi-dev-container;
144 compatible = "qcom,qpnp-pin";
145 gpio-controller;
146 #gpio-cells = <2>;
147 #address-cells = <1>;
148 #size-cells = <1>;
149 label = "pm8110-gpio";
150
151 gpio@c000 {
152 reg = <0xc000 0x100>;
153 qcom,pin-num = <1>;
154 };
155
156 gpio@c100 {
157 reg = <0xc100 0x100>;
158 qcom,pin-num = <2>;
159 };
160
161 gpio@c200 {
162 reg = <0xc200 0x100>;
163 qcom,pin-num = <3>;
164 };
165
166 gpio@c300 {
167 reg = <0xc300 0x100>;
168 qcom,pin-num = <4>;
169 };
170 };
171
172 pm8110_mpps: mpps {
173 spmi-dev-container;
174 compatible = "qcom,qpnp-pin";
175 gpio-controller;
176 #gpio-cells = <2>;
177 #address-cells = <1>;
178 #size-cells = <1>;
179 label = "pm8110-mpp";
180
181 mpp@a000 {
182 reg = <0xa000 0x100>;
183 qcom,pin-num = <1>;
184 };
185
186 mpp@a100 {
187 reg = <0xa100 0x100>;
188 qcom,pin-num = <2>;
189 };
190
191 mpp@a200 {
192 reg = <0xa200 0x100>;
193 qcom,pin-num = <3>;
194 };
195
196 mpp@a300 {
197 reg = <0xa300 0x100>;
198 qcom,pin-num = <4>;
199 };
200 };
201
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700202 pm8110_vadc: vadc@3100 {
203 compatible = "qcom,qpnp-vadc";
204 reg = <0x3100 0x100>;
205 #address-cells = <1>;
206 #size-cells = <0>;
207 interrupts = <0x0 0x31 0x0>;
208 interrupt-names = "eoc-int-en-set";
209 qcom,adc-bit-resolution = <15>;
210 qcom,adc-vdd-reference = <1800>;
211
212 chan@8 {
213 label = "die_temp";
214 reg = <8>;
215 qcom,decimation = <0>;
216 qcom,pre-div-channel-scaling = <0>;
217 qcom,calibration-type = "absolute";
218 qcom,scale-function = <3>;
219 qcom,hw-settle-time = <0>;
220 qcom,fast-avg-setup = <0>;
221 };
222
223 chan@9 {
224 label = "ref_625mv";
225 reg = <9>;
226 qcom,decimation = <0>;
227 qcom,pre-div-channel-scaling = <0>;
228 qcom,calibration-type = "absolute";
229 qcom,scale-function = <0>;
230 qcom,hw-settle-time = <0>;
231 qcom,fast-avg-setup = <0>;
232 };
233
234 chan@a {
235 label = "ref_1250v";
236 reg = <0xa>;
237 qcom,decimation = <0>;
238 qcom,pre-div-channel-scaling = <0>;
239 qcom,calibration-type = "absolute";
240 qcom,scale-function = <0>;
241 qcom,hw-settle-time = <0>;
242 qcom,fast-avg-setup = <0>;
243 };
244 };
245
246 iadc@3600 {
247 compatible = "qcom,qpnp-iadc";
248 reg = <0x3600 0x100>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 interrupts = <0x0 0x36 0x0>;
252 interrupt-names = "eoc-int-en-set";
253 qcom,adc-bit-resolution = <16>;
254 qcom,adc-vdd-reference = <1800>;
Siddartha Mohanadoss0f664a82013-03-11 22:52:01 -0700255
256 chan@0 {
257 label = "internal_rsense";
258 reg = <0>;
259 qcom,decimation = <0>;
260 qcom,pre-div-channel-scaling = <1>;
261 qcom,calibration-type = "absolute";
262 qcom,scale-function = <0>;
263 qcom,hw-settle-time = <0>;
264 qcom,fast-avg-setup = <0>;
265 };
266 };
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530267
Xiaozhe Shi294c7e22013-04-17 14:59:15 -0700268 pm8110_bms: qcom,bms {
269 spmi-dev-container;
270 compatible = "qcom,qpnp-bms";
271 #address-cells = <1>;
272 #size-cells = <1>;
273 status = "disabled";
274
275 qcom,r-sense-uohm = <10000>;
276 qcom,v-cutoff-uv = <3400000>;
277 qcom,max-voltage-uv = <4200000>;
278 qcom,r-conn-mohm = <0>;
279 qcom,shutdown-soc-valid-limit = <20>;
280 qcom,adjust-soc-low-threshold = <15>;
281 qcom,ocv-voltage-high-threshold-uv = <3750000>;
282 qcom,ocv-voltage-low-threshold-uv = <3650000>;
283 qcom,low-soc-calculate-soc-threshold = <15>;
284 qcom,low-soc-calculate-soc-ms = <5000>;
285 qcom,calculate-soc-ms = <20000>;
286 qcom,chg-term-ua = <100000>;
287 qcom,batt-type = <0>;
288 qcom,low-voltage-threshold = <3420000>;
Xiaozhe Shi535494d2013-04-05 12:27:51 -0700289 qcom,tm-temp-margin = <5000>;
Xiaozhe Shi294c7e22013-04-17 14:59:15 -0700290 qcom,low-ocv-correction-limit-uv = <100>;
291 qcom,high-ocv-correction-limit-uv = <50>;
292 qcom,hold-soc-est = <3>;
293
294 qcom,bms-iadc@3800 {
295 reg = <0x3800 0x100>;
296 };
297
298 qcom,bms-bms@4000 {
299 reg = <0x4000 0x100>;
300 interrupts = <0x0 0x40 0x0>,
301 <0x0 0x40 0x1>,
302 <0x0 0x40 0x2>,
303 <0x0 0x40 0x3>,
304 <0x0 0x40 0x4>,
305 <0x0 0x40 0x5>,
306 <0x0 0x40 0x6>,
307 <0x0 0x40 0x7>;
308
309 interrupt-names = "vsense_for_r",
310 "vsense_avg",
311 "sw_cc_thr",
312 "ocv_thr",
313 "charge_begin",
314 "good_ocv",
315 "ocv_for_r",
316 "cc_thr";
317 };
318 };
319
Ashay Jaiswalad1db362013-04-01 11:11:41 +0530320 qcom,pm8110_rtc {
321 spmi-dev-container;
322 compatible = "qcom,qpnp-rtc";
323 #address-cells = <1>;
324 #size-cells = <1>;
325 qcom,qpnp-rtc-write = <0>;
326 qcom,qpnp-rtc-alarm-pwrup = <0>;
327
328 qcom,pm8110_rtc_rw@6000 {
329 reg = <0x6000 0x100>;
330 };
331
332 qcom,pm8110_rtc_alarm@6100 {
333 reg = <0x6100 0x100>;
334 interrupts = <0x0 0x61 0x1>;
335 };
336 };
Amy Maloche9a113c12013-04-11 19:46:20 -0700337
Chun Zhang9e808b82013-04-18 15:38:18 -0700338 qcom,leds@a100 {
339 compatible = "qcom,leds-qpnp";
340 reg = <0xa100 0x100>;
341 label = "mpp";
342 };
343
Amy Maloche9a113c12013-04-11 19:46:20 -0700344 qcom,leds@a200 {
345 compatible = "qcom,leds-qpnp";
346 reg = <0xa200 0x100>;
347 label = "mpp";
348 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800349 };
350
351 qcom,pm8110@1 {
352 spmi-slave-container;
353 reg = <0x1>;
354 #address-cells = <1>;
355 #size-cells = <1>;
Xiaozhe Shia9571ca2013-02-21 10:52:03 -0800356
357 regulator@1400 {
358 compatible = "qcom,qpnp-regulator";
359 regulator-name = "8110_s1";
360 spmi-dev-container;
361 #address-cells = <1>;
362 #size-cells = <1>;
363 reg = <0x1400 0x300>;
364 status = "disabled";
365
366 qcom,ctl@1400 {
367 reg = <0x1400 0x100>;
368 };
369 qcom,ps@1500 {
370 reg = <0x1500 0x100>;
371 };
372 qcom,freq@1600 {
373 reg = <0x1600 0x100>;
374 };
375 };
376
377 regulator@1700 {
378 compatible = "qcom,qpnp-regulator";
379 regulator-name = "8110_s2";
380 spmi-dev-container;
381 #address-cells = <1>;
382 #size-cells = <1>;
383 reg = <0x1700 0x300>;
384 status = "disabled";
385
386 qcom,ctl@1700 {
387 reg = <0x1700 0x100>;
388 };
389 qcom,ps@1800 {
390 reg = <0x1800 0x100>;
391 };
392 qcom,freq@1900 {
393 reg = <0x1900 0x100>;
394 };
395 };
396
397 regulator@1a00 {
398 compatible = "qcom,qpnp-regulator";
399 regulator-name = "8110_s3";
400 spmi-dev-container;
401 #address-cells = <1>;
402 #size-cells = <1>;
403 reg = <0x1a00 0x300>;
404 status = "disabled";
405
406 qcom,ctl@1a00 {
407 reg = <0x1a00 0x100>;
408 };
409 qcom,ps@1b00 {
410 reg = <0x1b00 0x100>;
411 };
412 qcom,freq@1c00 {
413 reg = <0x1c00 0x100>;
414 };
415 };
416
417 regulator@1d00 {
418 compatible = "qcom,qpnp-regulator";
419 regulator-name = "8110_s4";
420 spmi-dev-container;
421 #address-cells = <1>;
422 #size-cells = <1>;
423 reg = <0x1d00 0x300>;
424 status = "disabled";
425
426 qcom,ctl@1d00 {
427 reg = <0x1d00 0x100>;
428 };
429 qcom,ps@1e00 {
430 reg = <0x1e00 0x100>;
431 };
432 qcom,freq@1f00 {
433 reg = <0x1f00 0x100>;
434 };
435 };
436
437 regulator@4000 {
438 compatible = "qcom,qpnp-regulator";
439 regulator-name = "8110_l1";
440 reg = <0x4000 0x100>;
441 status = "disabled";
442 };
443
444 regulator@4100 {
445 compatible = "qcom,qpnp-regulator";
446 regulator-name = "8110_l2";
447 reg = <0x4100 0x100>;
448 status = "disabled";
449 };
450
451 regulator@4200 {
452 compatible = "qcom,qpnp-regulator";
453 regulator-name = "8110_l3";
454 reg = <0x4200 0x100>;
455 status = "disabled";
456 };
457
458 regulator@4300 {
459 compatible = "qcom,qpnp-regulator";
460 regulator-name = "8110_l4";
461 reg = <0x4300 0x100>;
462 status = "disabled";
463 };
464
465 regulator@4400 {
466 compatible = "qcom,qpnp-regulator";
467 regulator-name = "8110_l5";
468 reg = <0x4400 0x100>;
469 status = "disabled";
470 };
471
472 regulator@4500 {
473 compatible = "qcom,qpnp-regulator";
474 regulator-name = "8110_l6";
475 reg = <0x4500 0x100>;
476 status = "disabled";
477 };
478
479 regulator@4600 {
480 compatible = "qcom,qpnp-regulator";
481 regulator-name = "8110_l7";
482 reg = <0x4600 0x100>;
483 status = "disabled";
484 };
485
486 regulator@4700 {
487 compatible = "qcom,qpnp-regulator";
488 regulator-name = "8110_l8";
489 reg = <0x4700 0x100>;
490 status = "disabled";
491 };
492
493 regulator@4800 {
494 compatible = "qcom,qpnp-regulator";
495 regulator-name = "8110_l9";
496 reg = <0x4800 0x100>;
497 status = "disabled";
498 };
499
500 regulator@4900 {
501 compatible = "qcom,qpnp-regulator";
502 regulator-name = "8110_l10";
503 reg = <0x4900 0x100>;
504 status = "disabled";
505 };
506
507 regulator@4b00 {
508 compatible = "qcom,qpnp-regulator";
509 regulator-name = "8110_l12";
510 reg = <0x4b00 0x100>;
511 status = "disabled";
512 };
513
514 regulator@4d00 {
515 compatible = "qcom,qpnp-regulator";
516 regulator-name = "8110_l14";
517 reg = <0x4d00 0x100>;
518 status = "disabled";
519 };
520
521 regulator@4e00 {
522 compatible = "qcom,qpnp-regulator";
523 regulator-name = "8110_l15";
524 reg = <0x4e00 0x100>;
525 status = "disabled";
526 };
527
528 regulator@4f00 {
529 compatible = "qcom,qpnp-regulator";
530 regulator-name = "8110_l16";
531 reg = <0x4f00 0x100>;
532 status = "disabled";
533 };
534
535 regulator@5000 {
536 compatible = "qcom,qpnp-regulator";
537 regulator-name = "8110_l17";
538 reg = <0x5000 0x100>;
539 status = "disabled";
540 };
541
542 regulator@5100 {
543 compatible = "qcom,qpnp-regulator";
544 regulator-name = "8110_l18";
545 reg = <0x5100 0x100>;
546 status = "disabled";
547 };
548
549 regulator@5200 {
550 compatible = "qcom,qpnp-regulator";
551 regulator-name = "8110_l19";
552 reg = <0x5200 0x100>;
553 status = "disabled";
554 };
555
556 regulator@5300 {
557 compatible = "qcom,qpnp-regulator";
558 regulator-name = "8110_l20";
559 reg = <0x5300 0x100>;
560 status = "disabled";
561 };
562
563 regulator@5400 {
564 compatible = "qcom,qpnp-regulator";
565 regulator-name = "8110_l21";
566 reg = <0x5400 0x100>;
567 status = "disabled";
568 };
569
570 regulator@5500 {
571 compatible = "qcom,qpnp-regulator";
572 regulator-name = "8110_l22";
573 reg = <0x5500 0x100>;
574 status = "disabled";
575 };
Chun Zhang3450f832013-04-15 11:46:29 -0700576
577 qcom,vibrator@c000 {
578 compatible = "qcom,qpnp-vibrator";
579 reg = <0xc000 0x100>;
580 label = "vibrator";
581 status = "disabled";
582 };
Xiaozhe Shifaa942c2013-02-21 10:52:03 -0800583 };
Kenneth Heitkedb6e1b12012-11-20 15:24:42 -0700584};